WO2020061886A1

WO2020061886A1 - Pixel circuit and display panel

Info

Publication number: WO2020061886A1
Application number: PCT/CN2018/107890
Authority: WO
Inventors: 郑武
Original assignee: 深圳市柔宇科技有限公司
Priority date: 2018-09-27
Filing date: 2018-09-27
Publication date: 2020-04-02
Also published as: CN112639949A

Abstract

A pixel circuit and a display panel, the pixel circuit comprising: a data signal input unit (10), used for inputting a data signal according to a current-level scanning signal; a driving unit (30), used for outputting a driving signal when turned on; a drive control unit (20), used for controlling the driving unit (30) to be turned on according to a light-emitting control signal, or controlling the driving unit (30) to be turned on according to a previous-level scanning signal and a light-emitting control signal, wherein a capacitor is provided between a data signal input end of the drive control unit (20) and a signal output end of the drive control unit (20); and a switch circuit (40), used for being turned on according to the light-emitting control signal when the driving unit (30) is turned on and transmitting the driving signal outputted by the driving unit (30) to a light emitting unit so as to drive the light emitting unit to emit light. The implementation of the present pixel circuit may eliminate the influence of power supply voltage on brightness, and ensure consistency in the brightness of a display screen.

Description

Pixel circuit and display panel

Technical field

The present invention relates to the field of display, and more particularly, to a pixel circuit and a display panel.

Background technique

With the development of the times and technology, large-sized and high-resolution AMOLED display devices have gradually developed. Large-sized AMOLED display devices also require larger-sized panels and a larger number of pixels. The greater the resistance, the power supply voltage will inevitably cause a voltage drop (IR Drop), and the voltage drop of each pixel circuit is different, which results in different power supply voltages for each pixel circuit. Therefore, under the same data signal voltage input, different pixel circuits will have different brightness outputs, which will lead to the entire The display brightness of the panel is uneven, and the picture is different, the IR of the pixel Drop will also be different, so that the entire display screen appears brighter near the Driver IC (driving chip), darker away from the Driver IC, and uneven brightness.

technical problem

The technical problem to be solved by the present invention is to provide a pixel circuit and a display panel in response to the defects of the above-mentioned influence of the power supply voltage on the brightness in the prior art.

Technical solutions

The technical solution adopted by the present invention to solve its technical problems is: a pixel circuit including:

A data signal input unit, configured to input a data signal according to the scanning signal of the current stage;

A driving unit for outputting a driving signal when being turned on;

A drive control unit, configured to control the drive unit to be turned on according to a light emission control signal; or to control the drive unit to be turned on according to a scan signal and a light emission control signal of a previous stage; a data signal input terminal of the drive control unit and A capacitor is disposed between the signal output terminals of the drive control unit;

The switch circuit is configured to be turned on according to the light-emitting control signal when the driving unit is turned on, and transmit a driving signal output by the driving unit to the light-emitting unit to drive the light-emitting unit to emit light.

Preferably, the data signal input unit includes: a first transistor;

A first electrode of the first transistor is connected to a current group scan signal, a second electrode of the first transistor is connected to a data signal, a third electrode of the first transistor is connected to a data signal input terminal of the drive control unit. connection.

Preferably, the drive control unit includes: a second transistor and a capacitor;

A first terminal of the capacitor and a second electrode of the second transistor are connected to a third electrode of the first transistor together, and a second terminal of the capacitor is connected to a control terminal of the driving unit; the second A first electrode of the transistor is connected to a light emission control signal, and a third electrode of the second transistor is connected to a reference signal;

A first terminal of the capacitor is a data signal input terminal of the drive control unit, and a second terminal of the capacitor is a signal output terminal of the drive control unit.

Preferably, the driving unit includes: a third transistor and a fifth transistor;

A third electrode of the third transistor is connected to a second terminal of the capacitor, a second electrode of the third transistor is connected to a third electrode of the fifth transistor, and a first electrode of the third transistor is connected to the Scanning signal of current stage;

A second electrode of the fifth transistor is connected to a power signal, a first electrode of the fifth transistor is connected to a second terminal of the capacitor, and a third electrode of the fifth transistor is connected to the switching circuit;

The first electrode of the fifth transistor is a control terminal of the driving unit.

Preferably, the switching circuit includes: a fourth transistor;

A second electrode of the fourth transistor is connected to a third electrode of the fifth transistor, a first electrode of the fourth transistor is connected to the light emission control signal, and a third electrode of the fourth transistor is connected to the light emitting unit. Positive electrode.

Preferably, the driving control unit further includes: a sixth transistor;

A third electrode of the sixth transistor is connected to a discharge signal, a second electrode of the sixth transistor is connected to a second terminal of the capacitor, and a first electrode of the sixth transistor is connected to the scan signal of the previous stage.

Preferably, the driving unit further includes: a seventh transistor connected between the fourth transistor and the light emitting unit;

The first electrode of the seventh transistor is connected to the light emission control signal, the second electrode of the seventh transistor is connected to the third electrode of the fourth transistor, and the third electrode of the seventh transistor is connected to the The positive terminal of the light-emitting unit.

Preferably, the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, and the sixth transistor are all PMOS transistors;

Alternatively, the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, and the sixth transistor are all NMOS transistors.

Preferably, if the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, and the sixth transistor are PMOS transistors, the light-emission control signal is at a low level and the current stage is scanned. When the signal is high, the fourth transistor and the fifth transistor are turned on, and the third transistor is turned off.

Preferably, if the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, and the sixth transistor are NMOS transistors, the light emission control signal is at a high level and the current level is scanned. When the signal is low, the fourth transistor and the fifth transistor are turned on, and the third transistor is turned off.

The present invention also provides a display panel including the pixel circuit described above.

The present invention also provides a pixel circuit including a first node, a second node, a capacitor connected between the first node and the second node, and a driving transistor, and a gate of the driving transistor is connected to the second node. The source of the driving transistor is connected to the input voltage VDD, and the drain is used to output current to the light-emitting unit. During the driving period of the pixel circuit, the voltage of the first node during the first period is V1, and the first The voltage of the node in the second period is V3, where V1 is not equal to V3 and is independent of the input voltage. The current output from the drain satisfies the formula I = K (V1-V3) ² through the capacitive coupling effect of the second node, Where K is a parameter independent of the input voltage.

Preferably, the voltage of the second node during the first period is V2, and the voltage during the second period is V2 + V3-V1.

Preferably, the voltage of the second node during the first period is VDD-Vth, where Vth is a threshold voltage of the driving transistor.

Preferably, the first node receives the data voltage Vdata during the first period, the first node receives the reference voltage Vref during the second period, and the current output by the drain of the driving transistor satisfies I = K (Vdata-Vref) ² .

Preferably, the driving cycle further includes an initialization period earlier than the first period, and the voltage of the second node is initialized during the initialization period.

Preferably, a transistor T3 is connected between the gate and the drain of the driving transistor, and the transistor T3 is turned on in the first period and turned off in the second period.

Beneficial effect

By adopting the pixel circuit of the present invention, the current flowing through the light-emitting unit can be affected only by the data signal, and is no longer affected by the power supply voltage, thereby eliminating the influence of the change in the power supply voltage on the current flowing through the light-emitting unit, eliminating the power supply. The influence of voltage on brightness ensures the brightness consistency of the display screen.

BRIEF DESCRIPTION OF THE DRAWINGS

The present invention will be further described below with reference to the accompanying drawings and embodiments. In the drawings:

1 is a circuit diagram of a first embodiment of a pixel circuit provided by the present invention;

2 to 4 are timing diagrams of various signals of the pixel circuit according to the first embodiment of the present invention;

5 is a circuit diagram of a second embodiment of a pixel circuit provided by the present invention;

FIG. 6 to FIG. 7 are timing diagrams of respective signals of the second embodiment of the pixel circuit provided by the present invention.

Best Mode of the Invention

In the following, the technical solutions in the embodiments of the present invention will be clearly and completely described with reference to the drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, but not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by a person of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

FIG. 1 is a circuit diagram of a first embodiment of a pixel circuit provided by the present invention. The pixel circuit can be applied to a display panel. The display panel includes, but is not limited to, an OLED display panel, an AMLOED display panel, an LCD panel, an LED panel, and the like.

Further, the pixel circuit is disposed in a light-emitting area of the display panel.

As shown in FIG. 1, in this embodiment, the pixel circuit includes a data signal input unit 10, a driving unit 30, a driving control unit 20, and a switching circuit 40. The data signal input unit 10 is configured to input a data signal according to the scanning signal (Gn) of the current stage. The driving unit 30 is configured to output a driving signal when being turned on. The driving control unit 20 is configured to control the driving unit 30 to be turned on according to the light emission control signal (EM); or to control the driving unit 30 to be turned on according to the scanning signal (Gn-1) and the light emitting control signal of the previous stage; A capacitor C is disposed between the data signal input terminal and the signal output terminal of the drive control unit. When the drive control unit 20 controls the drive unit 30 to be turned on by the light emission control signal, the drive unit 30 is turned on during the valid period of the light emission control signal; when the drive control unit 20 controls the drive unit 30 by the light emission control signal and the previous stage scanning signal When it is turned on, the driving unit 30 is turned on during the active level period of the light emission control signal and the scan signal of the previous stage is in the invalid level period.

Further, the data signal input unit 10 includes: a first transistor T1, wherein a first electrode of the first transistor T1 is connected to a current-stage scan signal (Gn), and a second electrode of the first transistor T1 is connected to data (Vdata ), The third electrode of the first transistor T1 is connected to a data signal input terminal of the driving control unit 20. Optionally, in this embodiment, the first transistor T1 is a PMOS transistor. The first electrode of the first transistor T1 is the gate of the PMOS tube, the second electrode of the first transistor T1 is the source of the PMOS tube, and the third electrode of the first transistor T1 is the drain of the PMOS tube. In this embodiment, when the scanning signal (Gn) of the current stage is at a low level, the first transistor T1 is turned on.

In this embodiment, the drive control unit 20 includes a second transistor T2 and a sixth transistor T6. The first terminal of the capacitor C and the second electrode of the second transistor T2 are connected to the third electrode of the first transistor T1, the second terminal of the capacitor C is connected to the control terminal of the driving unit 30, and the first terminal of the second transistor T2 The electrode is connected to the light emission control signal (EM), the third electrode of the second transistor T2 is connected to the reference (Vref); the first electrode of the sixth transistor T6 is connected to the scan signal (Gn-1) of the previous stage, and the sixth transistor T6 is The two electrodes are connected to the second terminal of the capacitor C, and the third electrode of the sixth transistor T6 is connected to a discharge signal (Vinit). The first terminal of the capacitor C is a data signal input terminal of the driving control unit 20, and the second terminal of the capacitor C is a signal output terminal of the driving control unit 20. In this embodiment, the discharge signal (Vinit) is a low-level signal.

Optionally, the second transistor T2 and the sixth transistor T6 are both PMOS transistors, wherein a first electrode of the second transistor T2 is a gate of the PMOS tube, and a second electrode of the second transistor T2 is a source of the PMOS tube, The third electrode of the second transistor T2 is the drain of the PMOS tube; the first electrode of the sixth transistor T6 is the gate of the PMOS tube; the second electrode of the sixth transistor T6 is the source of the PMOS tube; The third electrode is the drain of the PMOS tube. In this embodiment, when the scan signal (Gn-1) of the previous stage is at a low level, the sixth transistor T6 is turned on, and when the light emission control signal is at a low level, the second transistor T2 is turned on.

In this embodiment, the driving unit 30 includes a third transistor T3 and a fifth transistor T5. The third electrode of the third transistor T3 is connected to the second terminal of the capacitor C, the second electrode of the third transistor T3 is connected to the third electrode of the fifth transistor T5, and the first electrode of the third transistor T3 Connected to the current stage scanning signal (Gn); the second electrode of the fifth transistor T5 is connected to the power signal (ELVDD); the first electrode of the fifth transistor T5 is connected to the second terminal of the capacitor C; The third electrode of the fifth transistor T5 is connected to the switching circuit 40; wherein the first electrode of the fifth transistor T5 is a control terminal of the driving unit 30.

In this embodiment, the fifth transistor T5 is a driving transistor of the pixel circuit of the present invention. When the scanning signal (Gn) of the current stage is at a low level, the third transistor T3 is turned on, and when the emission control signal (EM) is at a low level, the fourth transistor T4 is turned on.

In this embodiment, the switching circuit 40 includes a fourth transistor T4. The second electrode of the fourth transistor T4 is connected to the third electrode of the fifth transistor T5, the first electrode of the fourth transistor T4 is connected to the light emission control signal (EM), and the third electrode of the fourth transistor T4 is connected to the positive electrode of the light emitting unit (OLED). .

Of course, it is understandable that in other embodiments, a transistor may be added between the fourth transistor T4 and the light-emitting unit, that is, a seventh transistor T7 may be added between the fourth transistor T4 and the light-emitting unit (not shown in the figure). (Out), wherein the first electrode of the seventh transistor T7 is connected to the light emission control signal, the second electrode of the seventh transistor T7 is connected to the third electrode of the fourth transistor T4, and the first electrode of the seventh transistor T7 The three electrodes are connected to a positive electrode of the light emitting unit. The type of the seventh transistor T7 is the same as that of the fifth transistor T5. By adding a seventh transistor T7 between the fourth transistor T4 and the light emitting unit, the service life of the light emitting unit can be effectively extended.

Optionally, in this embodiment, the third transistor T3, the fourth transistor T4, and the fifth transistor T5 are all PMOS transistors, wherein the first electrode of the third transistor T3 is the gate of the PMOS transistor and the third transistor T3 The second electrode is the source of the PMOS tube, the third electrode of the third transistor T3 is the drain of the PMOS tube; the first electrode of the fourth transistor T4 is the gate of the PMOS tube, and the second electrode of the fourth transistor T4 is The source of the PMOS transistor, the third electrode of the fourth transistor T4 is the drain of the PMOS transistor; the first electrode of the fifth transistor T5 is the gate of the PMOS transistor, and the second electrode of the fifth transistor T5 is the source of the PMOS transistor. The third electrode of the fifth transistor T5 is the drain of the PMOS transistor.

It should be noted here that the scanning signal (Gn) of the current stage, the scanning signal (Gn-1) of the previous stage, the emission control signal (EM), the data signal (Vdata), and the reference signal (Vref) are all provided by the Driver. Provided by the IC, and the data signal (Vdata) is the data voltage output by the Driver IC for image display, and the reference signal (Vref) is the reference voltage output by the Driver IC.

It should be noted here that the first transistor T1, the second transistor T2, the third transistor T3, the fourth transistor T4, the fifth transistor T5, and the sixth transistor T6 in this embodiment may be a PMOS transistor or an NMOS transistor. And in the embodiment of the present invention, the types of the first transistor T1, the second transistor T2, the third transistor T3, the fourth transistor T4, the fifth transistor T5, and the sixth transistor T6 are the same, that is, when a PMOS tube is used, the A transistor T1, a second transistor T2, a third transistor T3, a fourth transistor T4, a fifth transistor T5, and a sixth transistor T6 are all PMOS transistors; when an NMOS transistor is used, the first transistor T1, the second transistor T2, the first transistor The three transistors T3, the fourth transistor T4, the fifth transistor T5, and the sixth transistor T6 are all NMOS transistors.

Moreover, when an NMOS tube is used, the effective level of the scanning signal (Gn) of the current stage is high level, the effective level of the emission control signal (EM) is high level, and the scanning signal (Gn-1 of the previous stage) ) The inactive level is low.

The working principle of the pixel circuit of this embodiment is described below with reference to the timing diagrams of FIGS. 2 to 4. In this embodiment, the first transistor T1, the second transistor T2, the third transistor T3, the fourth transistor T4, the fifth transistor T5, and the sixth transistor T6 are all PMOS transistors.

As shown in FIG. 2, first, during the period of t1, the scanning signal (Gn) of the current stage is high level, the first transistor T1 is turned off, and the data signal unit will The data signal is input, so the data signal cannot be input. Wherein, in this embodiment, the effective level of the scanning signal (Gn) of the current stage is a low level, the effective level of the emission control signal (EM) is a low level, and the scanning signal (Gn-1 of the previous stage) ) The inactive level is high. Specifically, in the period of t1, the scanning signal (Gn) of the current stage is at a high level, and the first transistor T1 is turned off; the light emission control signal (EM) is at a high level, and the second transistor T2, the third transistor T3, and the fourth transistor T4 is in the off state; the scan signal (Gn-1) of the previous stage is low, so the sixth transistor T6 is turned on and the fifth transistor T5 is also turned on. At this time, the second terminal of the capacitor C (point N2 ) The voltage is Vinit. Because Vinit is low (negative voltage) and the first transistor T1 is in the off state, the data signal (Vdata) cannot be input, so the capacitor C is in the discharging state.

Then, in the period t2 (as shown in FIG. 3), the scanning signal (Gn-1) of the previous stage is high, the scanning signal (Gn) of the current stage is low, and the light emission control signal (EM) is high Level. At this time, the first transistor T1, the third transistor T3 are turned on, the second transistor T2, the fourth transistor T4, and the sixth transistor are all turned off. Since the voltage of N2 in the previous frame is Vinit, the fifth transistor T5 is also turned on at this time. through. At this time, the data signal can be input to charge the capacitor C. The voltage at the first terminal (point N1) of the capacitor C is Vdata, and the voltage at the second terminal (point N2) of the capacitor C is ELVDD-Vth, where Vth is the fifth transistor T5. Threshold voltage.

Then, in the third period (as shown in FIG. 4), the scanning signal (Gn-1) of the previous stage is high, the scanning signal (Gn) of the current stage is high, and the light emission control signal (EM) Is low. At this time, the first transistor T1, the third transistor T3, and the sixth transistor T6 are all turned off, and the second transistor T2, the fourth transistor T4, and the fifth transistor T5 are all turned on. The voltage at point N1 is Vref. At this time, the voltage change at point N1 is: Vref-Vdata; it can be obtained from the coupling principle of the capacitor. At this time, the voltage at point N2 is: ELVDD-Vth + Vref-Vdata.

According to the conduction characteristics of the fifth transistor T5, the conduction voltage of the fifth transistor T5 is: Vgs-Vth, and Vgs = ELVDD-N2, so the conduction voltage of the fifth transistor T5 can be obtained: ELVDD- (ELVDD-Vth + Vref-Vdata) = Vdata-Vref. According to the current formula, the current flowing through the light-emitting unit (OLED) can be obtained as:

.

Among them, u is a constant, _Cox is a parasitic capacitance between a gate and a source and a drain of the fifth transistor T5, and W / L is a width-to-length ratio of the fifth transistor T5.

From the above current formula, it can be seen that the current flowing through the light-emitting unit (OLED) is only affected by the data voltage and reference voltage input by the data signal, and has nothing to do with the power supply voltage (ELVDD). The influence of the unit's current eliminates the influence of the power supply voltage on the brightness and ensures the consistency of the brightness of the display screen.

FIG. 5 is a circuit diagram of a second embodiment of a pixel circuit provided by the present invention. In this embodiment, the pixel circuit of this embodiment also includes a data signal input unit 10, a driving unit 30, and a driving control unit 20. The data signal input unit 10 and the driving unit 30 are the same as those in the first embodiment, and the sixth transistor T6 is omitted from the driving control unit 20.

The working principle of the pixel circuit of this embodiment is described below with reference to the timing diagrams of FIGS. 6 and 7. In this embodiment, the first transistor T1, the second transistor T2, the third transistor T3, the fourth transistor T4, and the fifth transistor T5 are all PMOS transistors. The effective level of the scanning signal (Gn) of the current stage is a low level, and the effective level of the light emission control signal (EM) is a low level.

As shown in FIG. 6, during a period of t1, the scanning signal (Gn) of the current stage is at a low level and the light emission control signal (EM) is at a high level. At this time, the first transistor T1 and the third transistor T3 are both turned on. The second transistor T2 and the fourth transistor T4 are both turned off, and the fifth transistor T5 is turned on due to the light emission condition of the previous frame. At this time, the voltage at the first terminal (point N1) of the capacitor C is Vdata, and the voltage at the second terminal (point N2) of the capacitor C is: ELVDD-Vth.

Then, in the period of t2, the scanning signal (Gn) of the current stage is high level and the light emission control signal (EM) is low level. At this time, the second transistor T2, the fourth transistor T4, and the fifth transistor T5 are all turned on. , And the first transistor T1 and the third transistor T3 are both turned off. The voltage at the point N1 is Vref. Therefore, the voltage variation at the point N1 is: Vref-Vdata; it can be obtained according to the capacitive coupling principle. At this time, the voltage at the point N2 is: ELVDD-Vth + Vref-Vdata.

According to the conduction characteristics of the fifth transistor T5, the conduction voltage of the fifth transistor T5 is: Vgs-Vth, and Vgs = ELVDD-N2, so the conduction voltage of the fifth transistor T5 can be obtained: ELVDD -(ELVDD-Vth + Vref-Vdata). According to the current formula, the current flowing through the light-emitting unit (OLED) can be obtained as:

.

From the above current formula, it can be seen that the current flowing through the light-emitting unit (OLED) is only affected by the data voltage and reference voltage input by the data signal, and has nothing to do with the power supply voltage (ELVDD). The influence of the unit current eliminates the influence of the power supply voltage on the brightness and ensures the consistency of the brightness of the display screen. In addition, in this embodiment, the resolution of the display panel can be further improved by removing the sixth transistor T6.

In summary, the present invention eliminates the effect of ELVDD on the magnitude of the current flowing through the driving transistor (the fifth transistor T5) in the pixel circuit, thereby eliminating the effect of the ELVDD voltage on the brightness, thereby ensuring the brightness consistency of the entire display screen.

The present invention also provides a display panel. The display panel includes a pixel circuit, and the pixel circuit is the pixel circuit described above. The display panel includes, but is not limited to, an OLED display panel, an AMLOED display panel, and the like.

The present invention also provides a pixel circuit including a first node N1, a second node N2, a capacitor C connected between the first node N1 and the second node N2, and a driving transistor T5 (that is, the aforementioned first Five transistors T5). The gate of the driving transistor T5 is connected to the second node N2. The source of the driving transistor T5 is connected to the input voltage VDD (ie, the aforementioned ELVDD). The drain is used to output current to the light-emitting unit. During the driving period of the circuit, the voltage of the first node N1 during the first period is V1, and the voltage of the first node N1 during the second period is V3, where V1 is not equal to V3 and is independent of the input voltage. The drain The output current satisfies the formula I = K (V1-V3) ² via the capacitance C coupling effect of the second node N2, where K is a parameter independent of the input voltage.

The voltage of the second node N2 during the first period is V2, and the voltage during the second period is V2 + V3-V1.

Alternatively, the voltage of the second node N2 during the first period is VDD-Vth, where Vth is the threshold voltage of the driving transistor T5.

The first node N1 receives the data voltage Vdata in the first period, and the first node N1 receives the reference voltage Vref in the second period. The current output from the drain of the driving transistor T5 satisfies I = K (Vdata-Vref) ² .

Further, the driving cycle further includes an initialization period earlier than the first period, and the voltage of the second node N2 is initialized during the initialization period.

A transistor T3 is connected between the gate and the drain of the driving transistor T5. The transistor T3 is turned on in the first period and turned off in the second period.

It can be seen from the foregoing that the current output from the drain of the driving transistor T5 satisfies I = K (Vdata-Vref) ^{2. It} can be seen that the current flowing into the light-emitting unit is not related to the power supply voltage, and is only affected by the data voltage and the reference voltage. The influence of the power supply voltage on the light emitting unit, thereby eliminating the influence of the power supply voltage on the brightness, and ensuring the consistency of the brightness of the display screen.

The above embodiments are only for explaining the technical concept and characteristics of the present invention, and the purpose thereof is to enable persons familiar with the technology to understand the content of the present invention and implement it accordingly, and should not limit the protection scope of the present invention. Any equivalent changes and modifications made to the scope of the claims of the present invention shall all fall within the scope of the claims of the present invention.

It should be understood that those skilled in the art can make improvements or changes according to the above description, and all these improvements and changes should fall within the protection scope of the appended claims of the present invention.

Claims

A pixel circuit, comprising:

A data signal input unit, configured to input a data signal according to the scanning signal of the current stage;

A driving unit for outputting a driving signal when being turned on;

A drive control unit, configured to control the drive unit to be turned on according to a light emission control signal; or to control the drive unit to be turned on according to a scan signal and a light emission control signal of a previous stage; a data signal input terminal of the drive control unit and A capacitor is disposed between the signal output terminals of the drive control unit;

The switch circuit is configured to transmit a driving signal output by the driving unit to a light emitting unit to drive the light emitting unit to emit light.
The pixel circuit according to claim 1, wherein the data signal input unit comprises: a first transistor;

A first electrode of the first transistor is connected to a current group scan signal, a second electrode of the first transistor is connected to a data signal, a third electrode of the first transistor is connected to a data signal input terminal of the drive control unit. connection.
The pixel circuit according to claim 2, wherein the driving control unit comprises: a second transistor;

A first terminal of the capacitor and a second electrode of the second transistor are connected to a third electrode of the first transistor together, and a second terminal of the capacitor is connected to a control terminal of the driving unit; the second A first electrode of the transistor is connected to a light emission control signal, and a third electrode of the second transistor is connected to a reference signal;

A first terminal of the capacitor is a data signal input terminal of the drive control unit, and a second terminal of the capacitor is a signal output terminal of the drive control unit.
The pixel circuit according to claim 3, wherein the driving unit comprises: a third transistor and a fifth transistor;

A third electrode of the third transistor is connected to a second terminal of the capacitor, a second electrode of the third transistor is connected to a third electrode of the fifth transistor, and a first electrode of the third transistor is connected to the Scanning signal of current stage;

A second electrode of the fifth transistor is connected to a power signal, a first electrode of the fifth transistor is connected to a second terminal of the capacitor, and a third electrode of the fifth transistor is connected to the switching circuit;

The first electrode of the fifth transistor is a control terminal of the driving unit.
The pixel circuit according to claim 4, wherein the switching circuit comprises: a fourth transistor;

A second electrode of the fourth transistor is connected to a third electrode of the fifth transistor, a first electrode of the fourth transistor is connected to the light emission control signal, and a third electrode of the fourth transistor is connected to the light emitting unit. Positive electrode.
The pixel circuit according to claim 5, wherein the driving control unit further comprises: a sixth transistor;

A third electrode of the sixth transistor is connected to a discharge signal, a second electrode of the sixth transistor is connected to a second terminal of the capacitor, and a first electrode of the sixth transistor is connected to the scan signal of the previous stage.
The pixel circuit according to claim 5 or 6, wherein the driving unit further comprises: a seventh transistor connected between the fourth transistor and the light emitting unit;

The first electrode of the seventh transistor is connected to the light emission control signal, the second electrode of the seventh transistor is connected to the third electrode of the fourth transistor, and the third electrode of the seventh transistor is connected to the The positive terminal of the light-emitting unit.
The pixel circuit according to claim 6, wherein the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, and the sixth transistor are all PMOS transistors;

Alternatively, the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, and the sixth transistor are all NMOS transistors.
The pixel circuit according to claim 8, wherein if the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, and the sixth transistor are PMOS transistors, the light emission control signal When the scanning signal is at a low level and the current level is at a high level, the fourth transistor and the fifth transistor are turned on, and the third transistor is turned off.
The pixel circuit according to claim 8, wherein if the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, and the sixth transistor are NMOS transistors, the light emission control signal When the scanning signal of the current level is high, the fourth transistor and the fifth transistor are turned on, and the third transistor is turned off.
A display panel, comprising the pixel circuit according to any one of claims 1-10.
A pixel circuit includes a first node, a second node, a capacitor connected between the first node and the second node, and a driving transistor, and a gate of the driving transistor is connected to the second node. The source of the driving transistor is connected to the input voltage VDD, and the drain is used to output current to the light-emitting unit. During the driving period of the pixel circuit, the voltage of the first node during the first period is V1, and the first The voltage of the node in the second period is V3, where V1 is not equal to V3 and is independent of the input voltage. The current output from the drain satisfies the formula I = K (V1-V3) 2 through the capacitive coupling effect of the second node, Where K is a parameter independent of the input voltage.
The pixel circuit according to claim 12, wherein a voltage of the second node during the first period is V2, and a voltage of the second node is V2 + V3-V1.
The pixel circuit according to claim 12, wherein a voltage of the second node during the first period is VDD-Vth, and Vth is a threshold voltage of the driving transistor.
The pixel circuit according to claim 12, wherein the first node receives a data voltage Vdata during a first period, the first node receives a reference voltage Vref during a second period, and a drain output of the driving transistor The current satisfies I = K (Vdata-Vref) 2 .
The pixel circuit according to claim 12, wherein the driving cycle further comprises an initialization period earlier than the first period, and the voltage of the second node is initialized during the initialization period.
The pixel circuit according to claim 12, wherein a transistor T3 is connected between a gate and a drain of the driving transistor, and the transistor T3 is turned on in a first period and turned off in a second period.

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