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WO2018001103A1 - 内嵌式触摸屏及其制作方法、显示装置 - Google Patents

内嵌式触摸屏及其制作方法、显示装置 Download PDF

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Publication number
WO2018001103A1
WO2018001103A1 PCT/CN2017/088443 CN2017088443W WO2018001103A1 WO 2018001103 A1 WO2018001103 A1 WO 2018001103A1 CN 2017088443 W CN2017088443 W CN 2017088443W WO 2018001103 A1 WO2018001103 A1 WO 2018001103A1
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WO
WIPO (PCT)
Prior art keywords
touch
line
insulating layer
electrode
layer
Prior art date
Application number
PCT/CN2017/088443
Other languages
English (en)
French (fr)
Inventor
詹小舟
孙建
李成
Original Assignee
京东方科技集团股份有限公司
鄂尔多斯市源盛光电有限责任公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 京东方科技集团股份有限公司, 鄂尔多斯市源盛光电有限责任公司 filed Critical 京东方科技集团股份有限公司
Priority to US15/571,724 priority Critical patent/US10496202B2/en
Publication of WO2018001103A1 publication Critical patent/WO2018001103A1/zh

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    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
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Definitions

  • At least one embodiment of the present disclosure relates to an in-cell touch panel, a method of fabricating the same, and a display device.
  • the Touch Screen Panel With the rapid development of display technology, the Touch Screen Panel has gradually spread throughout people's lives.
  • the touch screen can be divided into an add-on touch panel, an on-cell touch panel, and an in-cell touch panel according to the composition structure.
  • the external touch screen is produced by separately separating the touch screen from the liquid crystal display (LCD), and then bonding them together to form a liquid crystal display with touch function, but the external touch screen has high production cost and low light transmittance.
  • the module is thick and so on.
  • the in-cell touch panel is provided with the touch electrode unit of the touch screen disposed inside the liquid crystal display screen, which can reduce the overall thickness of the module and greatly reduce the manufacturing cost of the touch screen, and is favored by the major panel manufacturers.
  • the in-cell touch screen mainly uses the principle of mutual capacitance or self-capacitance to realize the detection of the finger touch position.
  • the self-capacitance principle is to set a plurality of independent and insulated electrode units corresponding to the touch block in the touch layer.
  • the capacitance of the respective capacitor electrodes is a fixed value.
  • the touch detection chip can detect the change of the capacitance value of each electrode block to determine the position touched by the human body.
  • At least one embodiment of the present disclosure is directed to an in-cell touch panel, a method of fabricating the same, and a display device for solving the problem of low pixel aperture ratio.
  • At least one embodiment of the present disclosure provides an in-cell touch panel including a base substrate, a signal line disposed on the base substrate, a touch electrode, and a touch line electrically connected to the touch electrode.
  • the touch line and the signal line extend in the same direction, and the touch line and the signal line at least partially overlap in a direction perpendicular to the base substrate.
  • At least one embodiment of the present disclosure further provides a method for fabricating an in-cell touch panel, including:
  • the touch line and the data line extend in the same direction, the touch line and the data line at least partially overlap in a direction perpendicular to the base substrate, or the touch line and the The gate lines extend in the same direction, and the touch lines and the gate lines at least partially overlap in a direction perpendicular to the base substrate.
  • At least one embodiment of the present disclosure also provides a display device including any of the above-described in-cell touch panels.
  • 1 is a top plan view of an in-cell touch panel
  • Figure 2 is a schematic cross-sectional view taken along line AB in Figure 1;
  • FIG. 3 is a schematic top view of an in-cell touch panel according to an embodiment of the present disclosure.
  • Figure 4 is a schematic cross-sectional view of the CD in Figure 3;
  • FIG. 5 is a top plan view of a touch electrode, a touch line, and a touch detection chip in an in-cell touch panel according to an embodiment of the present disclosure
  • FIG. 6 is a schematic diagram of a touch principle of an in-cell touch panel according to an embodiment of the present disclosure
  • FIG. 7 is a schematic diagram of time-division driving of an in-cell touch panel according to an embodiment of the present disclosure.
  • FIG. 8 is a flowchart of a method for manufacturing an in-cell touch panel according to an embodiment of the present disclosure
  • FIG. 9 is a schematic diagram of a method for fabricating an in-cell touch panel according to an embodiment of the present disclosure.
  • each manufacturer will have a different solution.
  • a scheme of adding a touch layer and a dual data line is added.
  • the touch layer is added to realize the signal extraction of the touch electrode block
  • the process bonding between the metal layers is the focus of adjustment.
  • the Dual Source solution is to add a metal trace (touch line) on the same layer as the source in the pixel area as a conductive line of the touch signal. For example, an additional touch line can be used to make the corresponding position.
  • the Black Matrix width needs to be increased, so that although there is no need to increase the process flow, the loss of pixel aperture ratio is relatively large, and the application of the product is greatly limited for high resolution products with increasing resolution.
  • FIG. 1 shows an in-cell touch panel
  • FIG. 2 is a cross-sectional view taken along line AB of FIG.
  • a light shielding layer (LS layer) 101 is disposed on the base substrate 100
  • a first insulating layer 102 is disposed on the light shielding layer 101
  • an active layer is disposed on the first insulating layer 102.
  • the layer 103 has a second insulating layer 104 disposed on the active layer 103, a gate electrode 105 disposed on the second insulating layer 104, a third insulating layer 106 disposed on the gate electrode 105, and a touch line 107 disposed on the third insulating layer 106.
  • the data line 108, the source 109 and the drain 110, and the source 109 and the drain 110 are electrically connected to the active layer 103 through the insulating layer vias 121 and 122, respectively, at the touch line 107, the data line 108, and the source 109.
  • a fourth insulating layer 111 is disposed on the drain 110, and a touch electrode 112 is disposed on the fourth insulating layer 111.
  • the touch electrode 112 is electrically connected to the touch line 107 through the insulating layer via 131, and is disposed on the touch electrode 112.
  • the fifth insulating layer 113 is provided with a pixel electrode 114 on the fifth insulating layer 113, and the pixel electrode 114 is electrically connected to the drain electrode 110 through the insulating layer via 132.
  • the base substrate 100 includes a plurality of gate lines 115 and a plurality of data lines 108 (the number of gate lines 115 and data lines 108 is not limited to that shown in the drawing), and a plurality of gate lines 115 and more The strips of data lines 108 intersect and are insulated from each other to define a plurality of sub-pixels 180.
  • One touch electrode 112 may correspond to one or more sub-pixels. In FIG. 1, one touch electrode 112 corresponds to four sub-pixels, but is not limited thereto. .
  • the presence of the touch line 107 causes a relatively large loss of pixel aperture ratio.
  • At least one embodiment of the present disclosure provides an in-cell touch panel including a base substrate 100, and signal lines, touch electrodes 112, and touches disposed on the base substrate 100.
  • the touch line 107 electrically connected to the electrode 112, the touch line 107 and the signal line extend in the same direction, and the touch line 107 and the signal line at least partially overlap in a direction perpendicular to the base substrate 100.
  • the touch line 107 and the signal line at least partially overlap in a direction perpendicular to the base substrate 100, the width of the black matrix at the position where the touch line 107 is disposed can be reduced, thereby reducing or eliminating the loss of the pixel aperture ratio.
  • At least partial overlap refers to, for example, a portion where the touch line 107 and the signal line have overlaps in a direction perpendicular to the base substrate 100, and excluding the overlapping portion, there is no exclusion of portions that do not overlap.
  • the embodiment of the present disclosure does not limit this.
  • the orthogonal projection of the touch line 107 on the base substrate 100 and the orthographic projection of the signal line on the base substrate 100 have overlapping portions.
  • the base substrate 100 includes a plurality of gate lines 115 and a plurality of data lines 108, and the plurality of gate lines 115 and the plurality of data lines 108 intersect and are insulated from each other to define a plurality of sub-pixels 180.
  • the touch electrode 112 may correspond to one or more sub-pixels.
  • FIG. 3 illustrates an example in which one touch electrode 112 corresponds to four sub-pixels. It should be noted that the embodiment of the present disclosure is not limited thereto.
  • the sub-pixel 180 may be defined by a plurality of gate lines 115 and a plurality of data lines 108, but is not limited thereto.
  • One sub-pixel 180 includes, for example, a gate line 115, a data line 108, a pixel electrode, and a switching element (the switching element includes, for example, a thin film transistor 171).
  • the sub-pixel 180 is the smallest unit in the array substrate for display.
  • the gate line can be used to provide an on or off signal to the thin film transistor.
  • the data line can be used to provide a data signal to the pixel electrode, and an electric field can be formed between the pixel electrode and the common electrode, which can be controlled by the magnitude of the electric field.
  • the degree of deflection of the liquid crystal is controlled to achieve gray scale display.
  • the signal line includes a data line 108 or a gate line 115.
  • a signal line is taken as an example of the data line 108.
  • the touch lines 107 and the signal lines completely overlap in a direction perpendicular to the base substrate 100. Thereby, it is possible to avoid a decrease in the aperture ratio due to the setting of the touch line 107, so that the touch panel can have the largest aperture ratio.
  • the complete overlap means, for example, that the orthographic projection of one of the touch line 107 and the signal line on the base substrate 100 falls within (or less than or equal to) another of the orthographic projections on the base substrate 100.
  • the orthographic projection of the touch line 107 on the base substrate 100 covers the orthographic projection of the signal line on the base substrate 100, or the orthographic projection of the signal line on the base substrate 100 covers the touch line 107 on the base substrate.
  • Orthographic projection on 100 For example, the touch line 107 corresponds to the position of the signal line, the width is the same, or the touch line 107 corresponds to the position of the signal line, and one of the widths is smaller than the other one.
  • the signal line is electrically insulated from the touch electrode 112 and the signal line is electrically insulated from the touch line 107.
  • the in-cell touch panel further includes a thin film transistor 171 including an active layer 103, a source 109, and a drain 110.
  • the source 109 is electrically connected to the data line 108, and the source is 109 and the drain 110 are electrically connected to the active layer 103, respectively, and the source 109 is closer to the base substrate 100 than the active layer 103 (the source 109 is disposed between the active layer 103 and the base substrate 100), and the active layer 103 is closer to the base substrate 100 than the drain 110 (the active layer 103 is disposed between the drain 110 and the base substrate 100).
  • the touch line 107 and the signal line can at least partially overlap in a direction perpendicular to the base substrate 100.
  • the source 109 is formed in the same layer as the data line 108, and the touch line 107 is formed in the same layer as the drain 110. Thereby, the process can be saved.
  • the source 109 and the data line 108 are electrically connected together, and may be integrally formed, and the touch line 107 and the drain 110 are insulated from each other.
  • the thin film transistor 171 further includes a gate electrode 105, the gate line 115 is electrically connected to the gate electrode 105, the gate line 115 and the gate electrode 105 are formed in the same layer, and the active layer 103 is closer to the lining than the gate electrode 105.
  • the base substrate 100 (the active layer 103 is disposed between the gate electrode 105 and the base substrate 100). Thereby, the process can be saved.
  • the thin film transistor 171 shown in FIG. 4 is a thin film transistor 171 of a top gate structure.
  • the gate line 115 and the gate electrode 105 may be integrally formed.
  • the integral formation is, for example, a combination, and the conductive members integrally formed in the same layer are electrically connected, and the components formed in the same layer may be electrically connected or insulated from each other, and may be provided as needed.
  • the in-cell touch panel further includes a light shielding layer 101.
  • the light shielding layer 101 is closer to the substrate substrate 100 than the active layer 103 (the light shielding layer 101 is disposed between the active layer 103 and the substrate substrate 100).
  • the data line 108, the source 109, and the light shielding layer 101 are formed in the same layer. Thereby, the process can be saved.
  • the light shielding layer 101 functions to block light, and the active layer 103 of the thin film transistor 171 can be protected.
  • the light shielding layer 101 and the source 109 are insulated from each other, and the light shielding layer 101 and the data line 108 are insulated from each other.
  • the in-cell touch panel further includes a pixel electrode 114, and the pixel electrode 114 and the drain electrode 110 are electrically connected through the fourth insulating layer via 040.
  • the touch electrodes 112 can be multiplexed into the common electrode 118, and the touch lines 107 can be multiplexed into the common electrode lines 117.
  • the signal line can be data line 108. That is, the touch line 107 and the data line The 108 extends in the same direction, and the touch line 107 and the data line 108 at least partially overlap in a direction perpendicular to the base substrate 100.
  • FIG. 5 shows a plurality of touch electrodes 112 (self-capacitance electrodes) that are independent of each other (the electrical connection between the self-capacitance electrodes is not electrically connected). Each touch electrode 112 (self-capacitance electrode) can be connected to the touch detection chip 151 through a touch line 107.
  • the touch electrode 112 can be designed as a square electrode of about 5 mm ⁇ 5 mm (self-capacitance electrode, the size is not limited to a given value), and then the touch electrode 112 is connected to the wire 112 by a wire (touch line 107).
  • the touch detection chip 151 applies a driving signal Tx to the touch electrode 112 through the touch detection chip, and the touch electrode 112 can receive the feedback signal by itself. Since the finger used for operation is directly coupled during the working process, the amount of touch change caused by the finger is relatively large.
  • touch lines 107 of the touch electrodes 112 shown in FIG. 5 may each overlap at least partially with the data lines 108 at corresponding positions, or there may be touch lines that do not overlap at least partially with the data lines 108. 107, the embodiment of the present disclosure does not limit this.
  • the touch line 107 and the data line 108 extend in the same direction, and the touch line 107 and the data line 108 are at least partially overlapped in a direction perpendicular to the base substrate 100 as an example.
  • the touch line 107 and the gate line 115 may extend in the same direction, and the touch line 107 and the gate line 115 at least partially overlap in a direction perpendicular to the base substrate 100 (FIG. Not shown).
  • the gate line 115 and the touch line 107 extend in a first direction
  • the data line 108 extends in a second direction, the first direction being perpendicular to the second direction.
  • the first direction may be, for example, a horizontal direction along the paper surface
  • the second direction may be, for example, a vertical direction along the paper surface.
  • the in-cell touch panel includes an array substrate 001 and a counter substrate 002 opposite to the array substrate 001.
  • the array substrate 001 and the opposite substrate 002 may be upper and lower substrates of the display panel.
  • a liquid crystal 003 is disposed between the array substrate 001 and the opposite substrate 002, and the touch electrode 112 is disposed on the array substrate 001.
  • the liquid crystal display panel may adopt an Advanced-Super Dimensional Switching (ADS) mode, a Vertical Alignment (VA) mode, or a Twisted Nematic (TN) mode, which is an embodiment of the present disclosure. It is not limited and is not limited thereto.
  • ADS Advanced-Super Dimensional Switching
  • VA Vertical Alignment
  • TN Twisted Nematic
  • the pixel electrodes may be slit electrodes, and the common electrode may be a plate electrode, but is not limited thereto.
  • the common electrode may be disposed on the opposite substrate 002, and the in-cell touch panel may be in the VA mode or the TN mode.
  • each touch electrode 112 is in a static equilibrium state with respect to the ground signal.
  • the Cf capacitance of the ground electrode is connected in parallel to the surface of the touch electrode 112, thereby causing a change in the self-capacitance of the original balance state, and determining the change of the self-capacitance of the touch electrode 112 can be determined. Touch the point position to achieve multi-touch.
  • the touch electrodes 112 are electrically connected to the common electrode 118 through the touch line 107 for multiplexing.
  • the touch-sensitive display can be implemented in a time-sharing manner. For example, the time when the touch screen displays one frame can be divided into a display time (Display Time) and a touch time period (Touch Time).
  • the touch detection chip loads the common electrode signal on the touch line 107 connected to the respective capacitor electrodes in the touch screen, and the scan signal can be loaded by the gate line, and the gray line signal is loaded by the data line 108 formed in the same layer as the LS. , to achieve display capabilities.
  • the touch detection chip applies a driving signal to the touch lines 107 connected to the respective capacitor electrodes, and simultaneously receives the feedback signals of the respective capacitor electrodes, and determines whether the touch occurs by analyzing the feedback signals to achieve touch. Control function.
  • the touch detection chip can also be integrated with the driver IC.
  • the display time and the touch time are alternately performed during the display time of one frame. The specific time allocation may be determined according to the touch scanning frequency and the processing capability of the IC chip, and is not specifically limited herein.
  • At least one embodiment of the present disclosure further provides a method for manufacturing an in-cell touch panel, including:
  • a pattern of the active layer 103 is formed on the first insulating layer 102, and the active layer 103 is electrically connected to the source 109 through the first insulating layer via 010;
  • a pattern of the touch line 107 and the drain 110 is formed on the third insulating layer 106 by a patterning process, and the drain 110 is electrically connected to the active layer 103 through the second insulating layer via 020; for example, the second insulating layer via 020 penetrates the third insulating layer 106 and the second insulating layer 104;
  • the touch line 107 and the data line 108 extend in the same direction, the touch line 107 and the data line 108 at least partially overlap in a direction perpendicular to the base substrate 100, or the touch line 107 and the gate line 115 extend in the same direction.
  • the touch line 107 and the gate line 115 at least partially overlap in a direction perpendicular to the base substrate 100.
  • the method for fabricating the in-cell touch panel provided by at least one embodiment of the present disclosure has a simple process.
  • the touch line 107 and the data line 108 completely overlap in a direction perpendicular to the base substrate 100; or, the touch line 107 and the gate line 115 are perpendicular to the base substrate 100.
  • the directions overlap completely.
  • the in-cell touch panel manufacturing method further includes forming a fifth insulating layer 113 on the pattern of the touch electrode 112, and forming a pattern of the pixel electrode 114 on the fifth insulating layer 113, and the pixel electrode 114 passes through the fourth insulating layer.
  • the hole 040 is electrically connected to the drain 110.
  • the fourth insulating layer via 040 penetrates the fifth insulating layer 113 and the fourth insulating layer 111.
  • the touch electrodes 112 can be multiplexed into the common electrode 118, and the touch lines 107 are multiplexed into the common electrode lines 117.
  • the insulating layer vias penetrating through the plurality of insulating layers may be formed by etching a different insulating layer by one patterning process, or by etching the last formed insulating layer on the basis of the previously formed insulating layer pattern.
  • the layer (one-time etching) is formed, and the embodiment of the present disclosure does not limit this.
  • first insulating layer 102 Forming a first insulating layer 102 on the pattern of the data line 108, the source 109, and the light shielding layer 101, and patterning the first insulating layer 102 to form a first insulating pattern;
  • a pattern of the pixel electrode 114 is formed on the fifth insulating pattern.
  • the active layer 103 is electrically connected to the source electrode 109 through the first insulating layer via 010, and the drain electrode 110 is electrically connected to the active layer 103 through the second insulating layer via 020.
  • the control electrode 112 is electrically connected to the touch line 107 through the third insulating layer via 030; the pixel electrode 114 is electrically connected to the drain 110 through the fourth insulating layer via 040.
  • the touch line 107 and the data line 108 extend in the same direction, the touch line 107 and the data line 108 at least partially overlap in a direction perpendicular to the base substrate 100, or the touch line 107 and the gate line 115 extend in the same direction.
  • the touch line 107 and the gate line 115 at least partially overlap in a direction perpendicular to the base substrate 100.
  • the second insulating layer via 020 penetrating the second insulating layer and the third insulating layer may be formed by using one masking process using the same mask, as shown in FIG. 9, a total of ten masks are used,
  • the LS metal layer acts as a light-shielding layer 101 of a Thin Film Transistor (TFT) and is used as a data signal transmission.
  • TFT Thin Film Transistor
  • a mask is used to form the first insulating pattern.
  • the drain layer serves as a conductive layer of the pixel TFT, and simultaneously transmits the touch signal, thereby achieving effective conduction between the touch signal and the individual touch electrodes 112.
  • the active layer-drain-pixel electrode is turned on through the second insulating layer via 020 and the fourth insulating layer via 040, and a touch line is formed in the same layer as the drain to realize wiring of the touch function.
  • the common electrode is electrically connected to the common electrode line through the third insulating layer via 030, and the common electrode serves as a self-capacitance touch electrode to realize the touch of the self-capacitance touch function.
  • the in-cell touch screen solution is simple in technology and does not have a loss of pixel aperture ratio, and is an ideal structural optimization scheme for the self-capacitive touch model.
  • At least one embodiment of the present disclosure also provides a display device including any of the above-described in-cell touch panels.
  • An embodiment of the present disclosure provides a self-capacitance in-cell touch panel and a display device.
  • the LS (Light Shielding) light-shielding layer 101 is simultaneously used as a conductive layer of the Data signal, and the drain layer is used as a conductive layer of the touch signal, and the common electrode layer is multiplexed as a self-capacitance electrode by the principle of self-capacitance.
  • the common electrode layer pattern is divided into a plurality of mutually independent capacitor electrodes, and the self-capacitive touch screen function is realized by the touch signal of the touch line in the same layer as the drain and the common electrode 118 being turned on.
  • the inline The touch screen solution has no influence on the pixel aperture ratio, and can ensure that the touch screen has the largest aperture ratio; at the same time, the touch line 107 formed in the same layer as the drain is directly connected to the common electrode 118 to realize the method of transmitting the touch signal, and there is no Increase the process issues introduced by the Touch Metal layer.
  • the first touch electrode 112 is formed in the same layer as the LS layer, and the second touch electrode 112 is formed in the same layer as the drain 110.
  • the first touch electrode 112 includes a plurality of parallel electrodes.
  • a touch bar the second touch electrode 112 includes a plurality of second touch bars that are parallel to each other, and the first touch bar intersects with the second touch bar.
  • the first touch bar and the second touch bar are insulated from each other. Therefore, the first touch electrode 112 and the second touch electrode 112 can be used as a touch driving electrode and the other as a touch sensing electrode.
  • the mutual capacitive touch screen includes a lateral electrode and a vertical electrode (one as a touch driving electrode and the other as a touch sensing electrode) made of a conductive material on a substrate, and a capacitor is formed where the two electrodes intersect.
  • a finger touches the capacitive screen, it affects the coupling between the two electrodes near the touch point, thereby changing the capacitance between the two electrodes.
  • the touch detection chip determines the touch position by detecting the change in the capacitance value.
  • the light shielding layer 101, the gate electrode 105, the source electrode 109, the drain electrode 110, and the touch line 107 may be made of a metal material, for example, aluminum, copper, molybdenum, titanium, silver, gold, tantalum, tungsten.
  • a metal such as a chromium element or an aluminum alloy may further be a Ti/Al/Ti metal material, for example, to reduce the line resistance, but is not limited thereto.
  • the touch electrode 112 may be a transparent conductive material such as ITO, but is not limited thereto.
  • the pixel electrode may be a transparent conductive material such as ITO, but is not limited thereto.
  • the active layer 103 may be polysilicon, amorphous silicon, or the like, but is not limited thereto.
  • the fourth insulating layer 111 may be an organic insulating layer, and the material of the organic insulating layer includes an acrylic resin or a polyimide resin.
  • the material of the first insulating layer 102, the second insulating layer 104, the third insulating layer 106, and the fifth insulating layer 113 includes one selected from the group consisting of silicon nitride (SiNx), silicon oxide (SiOx), and silicon oxynitride (SiNxOy). kind or more. It is to be noted that the foregoing is only an exemplification, and is not limited thereto, and other materials may be used. The embodiment of the present disclosure does not limit this.
  • “same layer” refers to a layer structure formed by forming a film layer for forming a specific pattern by the same film forming process, and then forming the pattern by one patterning process using the same mask.
  • a single patterning process may include multiple exposure, development or etching processes, and the particular pattern in the resulting layer structure may be continuous or discontinuous, and these particular patterns are also May be at different heights or have different thicknesses.

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Abstract

提供一种内嵌式触摸屏及其制作方法、显示装置。该内嵌式触摸屏包括衬底基板(100)，以及设置在所述衬底基板(100)上的信号线(115/108)、触控电极(112)以及与所述触控电极(112)电连接的触控线(107)，其中，所述触控线(107)和所述信号线(115/108)沿同一方向延伸，所述触控线(107)和所述信号线(115/108)在垂直于所述衬底基板(100)的方向上至少部分重叠。该内嵌式触摸屏及其制作方法、显示装置用以解决像素开口率低的问题。

Description

内嵌式触摸屏及其制作方法、显示装置 技术领域
本公开至少一实施例涉及一种内嵌式触摸屏及其制作方法、显示装置。
背景技术
随着显示技术的飞速发展，触摸屏(Touch Screen Panel)已经逐渐遍及人们生活中。通常，触摸屏按照组成结构可以分为：外挂式触摸屏(Add on Mode Touch Panel)、覆盖表面式触摸屏(On Cell Touch Panel)、以及内嵌式触摸屏(In Cell Touch Panel)。外挂式触摸屏是将触摸屏与液晶显示屏(Liquid Crystal Display，LCD)分开生产，然后贴合到一起成为具有触摸功能的液晶显示屏，但外挂式触摸屏存在制作成本较高、光透过率低、模组较厚等缺点。而内嵌式触摸屏是将触摸屏的触控电极单元设置在液晶显示屏的内部，既可以减少模组的整体厚度，又可以大大降低触摸屏制作成本，受到各大面板厂家的青睐。
内嵌式触摸屏主要是利用互电容或自电容的原理来实现手指触摸位置的检测。自电容原理是在触控层中设定与触摸块相对应的多个独立且绝缘的电极单元，当人体未触摸屏幕时，各自电容电极承受的电容为一固定值，当人体触摸屏幕时，相当于在电极块上并联了一相对于地的自电容，触控侦测芯片可以检测出各电极块的电容值的变化从而判断人体触摸的位置。
发明内容
本公开的至少一实施例涉及一种内嵌式触摸屏及其制作方法、显示装置，用以解决像素开口率低的问题。
本公开的至少一实施例提供一种内嵌式触摸屏，包括衬底基板，以及设置在所述衬底基板上的信号线、触控电极以及与所述触控电极电连接的触控线，其中，所述触控线和所述信号线沿同一方向延伸，所述触控线和所述信号线在垂直于所述衬底基板的方向上至少部分重叠。
本公开的至少一实施例还提供一种内嵌式触摸屏的制作方法，包括：
在衬底基板上采用一次构图工艺形成数据线、源极和遮光层的图形；
在所述数据线、源极和遮光层的图形上形成第一绝缘层；
在所述第一绝缘层上形成有源层的图形，所述有源层通过第一绝缘层过孔与所述源极电连接；
在所述有源层的图形上形成第二绝缘层；
在所述第二绝缘层上采用一次构图工艺形成栅极和栅线的图形；
在所述栅极和栅线的图形上形成第三绝缘层；
在所述第三绝缘层上采用一次构图工艺形成触控线和漏极的图形，所述漏极通过第二绝缘层过孔与所述有源层电连接；
在所述触控线和漏极的图形上形成第四绝缘层；
在所述第四绝缘层上形成触控电极的图形，所述触控电极通过第三绝缘层过孔与所述触控线电连接；
所述触控线和所述数据线沿同一方向延伸，所述触控线和所述数据线在垂直于所述衬底基板的方向上至少部分重叠，或者，所述触控线和所述栅线沿同一方向延伸，所述触控线和所述栅线在垂直于所述衬底基板的方向上至少部分重叠。
本公开的至少一实施例还提供一种显示装置，包括上述任一内嵌式触摸屏。
附图说明
为了更清楚地说明本公开实施例的技术方案，下面将对实施例的附图作简单地介绍，显而易见地，下面描述中的附图仅仅涉及本公开的一些实施例，而非对本公开的限制。
图1为一种内嵌式触摸屏俯视示意图；
图2为图1中AB处剖面示意图；
图3为本公开一实施例提供的一种内嵌式触摸屏俯视示意图；
图4为图3中CD处剖面示意图；
图5为本公开一实施例提供的内嵌式触摸屏中触控电极、触控线以及触控侦测芯片的俯视示意图；
图6为本公开一实施例提供的内嵌式触摸屏触摸原理示意图；
图7为本公开一实施例提供的一种内嵌式触摸屏的分时驱动示意图；
图8为本公开一实施例提供的一种内嵌式触摸屏制作方法的流程图；
图9为本公开一实施例提供的一种内嵌式触摸屏制作方法示意图。
附图标记：
100-衬底基板；101-遮光层；102-第一绝缘层；103-有源层；104-第二绝缘层；105-栅极；106-第三绝缘层；107-触控线；108-数据线；109-源极；110-漏极；111-第四绝缘层；112-触控电极；113-第五绝缘层；114-像素电极；115-栅线；117-公共电极线；118-公共电极；171-薄膜晶体管；121、122、131、132-绝缘层过孔；010-第一绝缘层过孔；020-第二绝缘层过孔；030-第三绝缘层过孔；040-第四绝缘层过孔；001-阵列基板；002-对置基板；003-液晶；151-触控侦测芯片。
具体实施方式
为使本公开实施例的目的、技术方案和优点更加清楚，下面将结合本公开实施例的附图，对本公开实施例的技术方案进行清楚、完整地描述。显然，所描述的实施例是本公开的一部分实施例，而不是全部的实施例。基于所描述的本公开的实施例，本领域普通技术人员在无需创造性劳动的前提下所获得的所有其他实施例，都属于本公开保护的范围。
除非另外定义，本公开使用的技术术语或者科学术语应当为本公开所属领域内具有一般技能的人士所理解的通常意义。本公开中使用的“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重要性，而只是用来区分不同的组成部分。同样，“一个”、“一”或者“该”等类似词语也不表示数量限制，而是表示存在至少一个。“包括”或者“包含”等类似的词语意指出现该词前面的元件或者物件涵盖出现在该词后面列举的元件或者物件及其等同，而不排除其他元件或者物件。“连接”或者“相连”等类似的词语并非限定于物理的或者机械的连接，而是可以包括电性的连接，不管是直接的还是间接的。“上”、“下”、“左”、“右”等仅用于表示相对位置关系，当被描述对象的绝对位置改变后，则该相对位置关系也可能相应地改变。
在上述自电容内嵌触摸屏的结构设计中，各个厂家会有不同的方案。通常包括增加触控层以及双重数据线(Dual Source)的方案，其中增加触控层来实现触控电极块信号导出的方案中，金属层间工艺搭接是调整的重点，所 以工艺上除增加一张用于形成触控层的掩膜版(Mask)外，一般还需要增加钝化膜层的沉积工艺。Dual Source的方案则是通过在像素区增加与源极(Source)同层的金属走线(触控线)作为触控信号的传导线，例如，因额外引入的触控线，可使得相应位置的黑矩阵(Black Matrix)宽度需要增加，从而，虽然无需增加工艺流程，但像素开口率的损失相对较大，对于分辨率不断提高的高分辨率产品，产品应用受到极大的限制。
因此，在内嵌触摸屏结构设计中，如何减小触摸板的厚度，降低工艺难度，提升产品光效品质，是亟待解决的重要技术课题。
图1示出了一种内嵌式触摸屏，图2为图1中AB处的剖面示意图。从图1和图2中可以看出，衬底基板100上设置遮光层(Light Shileding，LS层)101，在遮光层101上设置第一绝缘层102，在第一绝缘层102上设置有源层103，有源层103上设置第二绝缘层104，第二绝缘层104上设置栅极105，在栅极105上设置第三绝缘层106，在第三绝缘层106上设置触控线107、数据线108、源极109和漏极110，源极109和漏极110分别通过绝缘层过孔121、122与有源层103电连接，在触控线107、数据线108、源极109和漏极110上设置第四绝缘层111，在第四绝缘层111上设置触控电极112，触控电极112通过绝缘层过孔131与触控线107电连接，在触控电极112上设置第五绝缘层113，在第五绝缘层113上设置像素电极114，像素电极114通过绝缘层过孔132与漏极110电连接。
从图1中可以看出，衬底基板100包括多条栅线115和多条数据线108(栅线115和数据线108的条数不限于图中所示)，多条栅线115和多条数据线108交叉并相互绝缘界定多个子像素180，一个触控电极112可对应一个或多个子像素，图1中以一个触控电极112对应4个子像素为例进行说明，但并不限于此。
从图1和图2中可以看出，触控线107的存在使像素开口率的损失相对较大。
如图3和图4所示，本公开的至少一实施例提供一种内嵌式触摸屏，包括衬底基板100，以及设置在衬底基板100上的信号线、触控电极112以及与触控电极112电连接的触控线107，触控线107和信号线沿同一方向延伸，触控线107和信号线在垂直于衬底基板100的方向上至少部分重叠。
因触控线107和信号线在垂直于衬底基板100的方向上至少部分重叠，从而，可以减少设置触控线107位置处的黑矩阵的宽度，从而减小或消除像素开口率的损失。
需要说明的是，至少部分重叠例如是指触控线107和信号线在垂直于衬底基板100的方向上具有重叠的部分，而除了该重叠的部分外，并不排除还有不重叠的部分，本公开的实施例对此不作限定。例如，触控线107在衬底基板100上的正投影与信号线在衬底基板100上的正投影具有重叠的部分。
从图3中可以看出，衬底基板100包括多条栅线115和多条数据线108，多条栅线115和多条数据线108交叉并相互绝缘界定多个子像素180。例如，如图3所示，触控电极112可对应一个或多个子像素。图3中以一个触控电极112对应4个子像素为例进行说明，需要说明的是，本公开的实施例并不限于此。
需要说明的是，子像素180可以由多条栅线115和多条数据线108限定而得，但不限于此。一个子像素180例如包括一条栅线115、一条数据线108、一个像素电极和一个开关元件(开关元件例如包括薄膜晶体管171)。子像素180为阵列基板中最小的用以进行显示的单元。例如，栅线可用于向薄膜晶体管提供开启或关断信号，在液晶触摸屏中，数据线可用于向像素电极提供数据信号，像素电极和公共电极之间可形成电场，可通过控制电场的大小来控制液晶的偏转程度以实现灰度显示。
例如，信号线包括数据线108或栅线115。图3和图4中以信号线为数据线108为例进行说明。
例如，触控线107和信号线在垂直于衬底基板100的方向上完全重叠。从而，能够避免因触控线107的设置降低开口率，从而可使触摸屏具有最大的开口率。需要说明的是，完全重叠例如是指触控线107和信号线中的一个在衬底基板100上的正投影落入(小于或等于)另一个在衬底基板100上的正投影范围内。例如，触控线107在衬底基板100上的正投影覆盖信号线在衬底基板100上的正投影，或者，信号线在衬底基板100上的正投影覆盖触控线107在衬底基板100上的正投影。例如，触控线107和信号线位置对应，宽度相同，或者，触控线107和信号线位置对应，其中一个的宽度小于另外一个的宽度。
例如，信号线与触控电极112电绝缘，并且信号线与触控线107电绝缘。
例如，如图3和图4所示，内嵌式触摸屏还包括薄膜晶体管171，薄膜晶体管171包括有源层103、源极109和漏极110，源极109与数据线108电连接，源极109和漏极110分别与有源层103电连接，源极109比有源层103更靠近衬底基板100(源极109设置于有源层103和衬底基板100之间)，有源层103比漏极110更靠近衬底基板100(有源层103设置于漏极110和衬底基板100之间)。通过调整数据线108和源极109的位置，提供一种实现方式来使得触控线107和信号线可在垂直于衬底基板100的方向上至少部分重叠。
例如，如图4所示，源极109与数据线108同层形成，触控线107与漏极110同层形成。从而，可以节省工艺。例如，源极109与数据线108电连接在一起，可一体形成，触控线107与漏极110彼此绝缘。
例如，如图4所示，薄膜晶体管171还包括栅极105，栅线115与栅极105电连接，栅线115与栅极105可同层形成，有源层103比栅极105更靠近衬底基板100(有源层103设置于栅极105和衬底基板100之间)。从而，可以节省工艺。图4所示的薄膜晶体管171为顶栅结构的薄膜晶体管171。例如，栅线115与栅极105可一体形成。
本公开的实施例中，一体形成例如是指合而为一，同层一体形成的导电部件为电连接的状态，同层形成的部件可电连接，也可彼此绝缘，可根据需要设置。
例如，如图4所示，内嵌式触摸屏还包括遮光层101，遮光层101比有源层103更靠近衬底基板100(遮光层101设置于有源层103和衬底基板100之间)，数据线108、源极109以及遮光层101同层形成。从而，可以节省工艺。遮光层101起到遮挡光线的作用，可以保护薄膜晶体管171的有源层103。例如，遮光层101与源极109彼此绝缘，遮光层101与数据线108彼此绝缘。
例如，如图4所示，内嵌式触摸屏还包括像素电极114，像素电极114与漏极110通过第四绝缘层过孔040电连接。
例如，如图4所示，触控电极112可复用为公共电极118，触控线107可复用为公共电极线117。
如图3、4和5所示，信号线可为数据线108。即，触控线107和数据线 108沿同一方向延伸，触控线107和数据线108在垂直于衬底基板100的方向上至少部分重叠。图5中示出了多个相互独立(自电容电极之间不电连接)的触控电极112(自电容电极)。每一触控电极112(自电容电极)可通过一条触控线107连接至触控侦测芯片151。例如，可将触控电极112设计成5mm×5mm左右的方形电极(自电容电极，大小不限于给出的数值)，然后将该触控电极112用一根导线(触控线107)连接至触控侦测芯片151，通过触控侦测芯片给触控电极112施加驱动信号Tx，并且该触控电极112可以自己接收反馈信号。由于工作过程中，例如用于操作的手指为直接耦合的方式，故手指引起的触控变化量会比较大。
需要说明的是，图5中示出的各触控电极112的触控线107可均与其对应位置处的数据线108至少部分重叠，也可以存在不与数据线108至少部分重叠的触控线107，本公开的实施例对此不作限定。
图5以触控线107与数据线108沿同一方向延伸，触控线107和数据线108在垂直于衬底基板100的方向上至少部分重叠为例进行说明。需要说明的是，在另一些实施例中，还可以触控线107与栅线115沿同一方向延伸，触控线107和栅线115在垂直于衬底基板100的方向上至少部分重叠(图中未示出)。例如，栅线115和触控线107沿第一方向延伸，而数据线108沿第二方向延伸，第一方向垂直于第二方向。第一方向例如可为沿纸面的水平方向，第二方向例如可以为沿纸面的竖直方向。
如图6所示，内嵌式触摸屏包括阵列基板001和与阵列基板001对置的对置基板002，阵列基板001和对置基板002可为显示面板的上下两个基板。阵列基板001和对置基板002之间设置有液晶003，触控电极112设置在阵列基板001上。液晶显示面板可采用超维场转换技术(Advanced-super Dimensional Switching，ADS)模式、垂直取向(Vertical Alignment，VA)模式或者扭曲向列相(Twisted Nematic，TN)模式，本公开的实施例对此不作限定，且不限于此。例如，触控电极112复用为公共电极118的情况下，内嵌式触摸屏为ADS模式，像素电极可为狭缝状电极，公共电极可为板状电极，但不限于此。在触控电极112不复用为公共电极118的情况下，公共电极可设置在对置基板002上，内嵌式触摸屏可为VA模式或者TN模式。在触摸屏未进行触摸时，各触控电极112相对于地信号有处于静态平衡状态 的电容；当手指触摸到屏幕表面时，会在触控电极112表面并联对地的Cf电容，从而导致原平衡状态自电容的改变，根据侦测出触控电极112自电容的变化就可以确定触摸点位置，从而实现多点触控。
如图7所示，触控电极112(以自电容电极为例进行说明)复用为公共电极118的情况下，各触控电极112是通过触控线107导通至公共电极118实现复用的，可采用分时驱动方式的实现触控和显示。例如，可以将触摸屏显示一帧的时间分为显示时间段(Display Time)和触控时间段(Touch Time)。在显示时间段，触控侦测芯片对触摸屏中与各自电容电极连接的触控线107加载公共电极信号，可利用栅线加载扫描信号，利用与LS同层形成的数据线108加载灰阶信号，实现显示功能。在触控时间段，触控侦测芯片向与各自电容电极连接的触控线107施加驱动信号，同时接收各自电容电极的反馈信号，通过对反馈信号的分析判断是否发生触控，以实现触控功能。触控侦测芯片亦可与驱动IC集成。在一帧的显示时间内，显示时间和触控时间交替进行，具体时间分配可依据触控扫描频率以及IC芯片的处理能力而定，在此不做具体限定。
如图8所示，本公开至少一实施例还提供一种内嵌式触摸屏的制作方法，包括：
在衬底基板100上采用一次构图工艺形成数据线108、源极109和遮光层101的图形；
在数据线108、源极109和遮光层101的图形上形成第一绝缘层102；
在第一绝缘层102上形成有源层103的图形，有源层103通过第一绝缘层过孔010与源极109电连接；
在有源层103的图形上形成第二绝缘层104；
在第二绝缘层104上采用一次构图工艺形成栅极105和栅线115的图形；
在栅极105和栅线115的图形上形成第三绝缘层106；
在第三绝缘层106上采用一次构图工艺形成触控线107和漏极110的图形，漏极110通过第二绝缘层过孔020与有源层103电连接；例如，第二绝缘层过孔020贯穿第三绝缘层106和第二绝缘层104；
在触控线107和漏极110的图形上形成第四绝缘层111；
在第四绝缘层111上形成触控电极112的图形，触控电极112通过第三 绝缘层过孔030与触控线107电连接；
触控线107和数据线108沿同一方向延伸，触控线107和数据线108在垂直于衬底基板100的方向上至少部分重叠，或者，触控线107和栅线115沿同一方向延伸，触控线107和栅线115在垂直于衬底基板100的方向上至少部分重叠。
本公开至少一实施例提供的内嵌式触摸屏的制作方法，工艺简便。
例如，该内嵌式触摸屏制作方法中，触控线107和数据线108在垂直于衬底基板100的方向上完全重叠；或者，触控线107和栅线115在垂直于衬底基板100的方向上完全重叠。
例如，该内嵌式触摸屏制作方法还包括在触控电极112的图形上形成第五绝缘层113，以及在第五绝缘层113上形成像素电极114的图形，像素电极114通过第四绝缘层过孔040与漏极110电连接。例如，第四绝缘层过孔040贯穿第五绝缘层113和第四绝缘层111。
例如，为了节省制作工艺，该内嵌式触摸屏制作方法中，触控电极112可复用为公共电极118，触控线107复用为公共电极线117。
本公开的实施例中，贯穿多个绝缘层的绝缘层过孔可通过一次构图工艺刻蚀不同的绝缘层来形成，也可在先前形成的绝缘层图形的基础上通过刻蚀最后形成的绝缘层(一次刻蚀)来形成，本公开的实施例对此不作限定。
本公开一个实施例提供的一种内嵌式触摸屏的制作方法，包括：
在衬底基板100上采用一次构图工艺形成数据线108、源极109和遮光层101的图形；
在数据线108、源极109和遮光层101的图形上形成第一绝缘层102，并对第一绝缘层102进行构图形成第一绝缘图形；
在第一绝缘图形上形成有源层103的图形；
在有源层103的图形上形成第二绝缘层104；
在第二绝缘层104上采用一次构图工艺形成栅极105和栅线115的图形；
在栅极105和栅线115的图形上形成第三绝缘层106，并对第三绝缘层106和第二绝缘层104进行构图形成第二绝缘图形和第三绝缘图形；
在第三绝缘图形上采用一次构图工艺形成触控线107和漏极110的图形；
在触控线107和漏极110的图形上形成第四绝缘层111，并对第四绝缘 层111进行构图形成第四绝缘图形；
在第四绝缘图形上形成触控电极112的图形；
在触控电极112的图形上形成第五绝缘层113，并对第五绝缘层113进行构图形成第五绝缘图形；
在第五绝缘图形上形成像素电极114的图形。
该实施例形成的内嵌式触摸屏中，有源层103通过第一绝缘层过孔010与源极109电连接，漏极110通过第二绝缘层过孔020与有源层103电连接，触控电极112通过第三绝缘层过孔030与触控线107电连接；像素电极114通过第四绝缘层过孔040与漏极110电连接。触控线107和数据线108沿同一方向延伸，触控线107和数据线108在垂直于衬底基板100的方向上至少部分重叠，或者，触控线107和栅线115沿同一方向延伸，触控线107和栅线115在垂直于衬底基板100的方向上至少部分重叠。
在一示例中，贯穿第二绝缘层和第三绝缘层的第二绝缘层过孔020可采用同一掩膜版采用一次构图工艺形成，如图9所示，共使用十张掩膜版，在低温多晶硅(Low Temperature Poly-silicon，LTPS)顶栅结构中，LS金属层作为薄膜晶体管(Thin Film Transistor，TFT)的遮光层101，同时用作数据(Data)信号的传输，该过程中需要增加一张用以形成第一绝缘图形的掩膜版来实现。漏极层作为像素TFT的传导层，同时进行触控信号的传输，由此实现触控信号与各独立触控电极112的有效导通。通过第二绝缘层过孔020和第四绝缘层过孔040实现有源层-漏极-像素电极的导通，同时与漏极同层形成触控线，实现触控功能的布线。公共电极通过第三绝缘层过孔030与公共电极线实现导通，公共电极同时作为自电容触控电极，实现自电容触控功能的触控。该内嵌式触摸屏方案工艺上实现简便，同时不会有像素开口率的损失，是自电容式触控模型较为理想的结构优化方案。
本公开至少一实施例还提供一种显示装置，包括上述任一内嵌式触摸屏。
本公开一实施例提供一种自电容内嵌式触摸屏及显示装置。在LTPS顶栅结构中，将LS(Light Shielding)遮光层101同时作为Data信号的传导层，漏极层作为触控信号的传导层，利用自电容的原理复用公共电极层作为自电容电极，将公共电极层图形分割成多个相互独立的电容电极，通过与漏极同层的触控线的触控信号与公共电极118导通实现自电容触摸屏功能。该内嵌 式触摸屏方案对于像素开口率不会有影响，能够确保触摸屏具有最大开口率；同时与漏极同层形成的触控线107与公共电极118直接导通实现触控信号传输的方式，不会有增加触控金属层(Touch Metal)引入的工艺问题。
除了自电容电极外，本公开的实施例也可应用于互电容的电极。例如，在一个实施例中，与LS层同层形成第一触控电极112，与漏极110同层形成第二触控电极112，例如，第一触控电极112包括多个相互平行的第一触控条，第二触控电极112包括多个相互平行的第二触控条，并且，第一触控条与第二触控条交叉。同时，第一触控条与第二触控条之间互相绝缘。从而，第一触控电极112和第二触控电极112可以一个作为触控驱动电极，另一个作为触控感应电极。
互电容式触摸屏包括在基板上用导电材料制作的横向电极和纵向电极(一个作为触控驱动电极，另一个作为触控感应电极)，两组电极交叉的地方将会形成电容。当手指触摸到电容屏时，影响了触摸点附近两个电极之间的耦合，从而改变了这两个电极之间的电容量。触控侦测芯片通过检测这种电容值的变化从而判断出触控位置。
本公开的实施例中，遮光层101、栅极105、源极109、漏极110、触控线107可采用金属材质，例如包括：铝、铜、钼、钛、银、金、钽、钨、铬单质或铝合金等金属，进一步例如为降低线路阻抗，可采用Ti/Al/Ti金属材料，但不限于此。触控电极112可采用透明导电材料(例如ITO)，但不限于此。像素电极可采用透明导电材料(例如ITO)，但不限于此。有源层103可采用多晶硅、非晶硅等，但不限于此。第四绝缘层111可采用有机绝缘层，有机绝缘层的材料包括亚克力树脂或聚酰亚胺树脂。第一绝缘层102、第二绝缘层104、第三绝缘层106和第五绝缘层113的材质包括选自氮化硅(SiNx)，氧化硅(SiOx)，氮氧化硅(SiNxOy)中的一种或多种。需要说明的是，上述只是列举，并非限定，亦可采用其他材料，本公开的实施例对此不作限定。
在本公开的实施例中，“同层”指的是采用同一成膜工艺形成用于形成特定图形的膜层，然后利用同一掩模板通过一次构图工艺形成的层结构。根据特定图形的不同，一次构图工艺可能包括多次曝光、显影或刻蚀工艺，而形成的层结构中的特定图形可以是连续的也可以是不连续的，这些特定图形还 可能处于不同的高度或者具有不同的厚度。
还有以下几点需要说明：
(1)除非另作定义，本公开实施例及其附图中，同一附图标记代表同一含义。
(2)本公开实施例附图中，只涉及到与本公开实施例涉及到的结构，其他结构可参考通常设计。并且，各部件不限于图中示出的形状。
(3)为了清晰起见，在用于描述本公开的实施例的附图中，层或区域的厚度被放大。可以理解，当诸如层、膜、区域或基板之类的元件被称作位于另一元件“上”或“下”时，该元件可以“直接”位于另一元件“上”或“下”，或者可以存在中间元件。
(4)在不冲突的情况下，本公开的不同实施例以及同一实施例中的特征可以相互组合。
以上所述，仅为本公开的具体实施方式，但本公开的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本公开揭露的技术范围内，可轻易想到变化或替换，都应涵盖在本公开的保护范围之内。因此，本公开的保护范围应以所述权利要求的保护范围为准。
本专利申请要求于2016年6月28日递交的中国专利申请第201610493669.8号的优先权，在此全文引用上述中国专利申请公开的内容以作为本申请的一部分。

Claims (16)

  1. 一种内嵌式触摸屏，包括衬底基板，以及设置在所述衬底基板上的信号线、触控电极以及与所述触控电极电连接的触控线，其中，所述触控线和所述信号线沿同一方向延伸，所述触控线和所述信号线在垂直于所述衬底基板的方向上至少部分重叠。
  2. 根据权利要求1所述的内嵌式触摸屏，其中，所述触控线和所述信号线在垂直于所述衬底基板的方向上完全重叠。
  3. 根据权利要求1所述的内嵌式触摸屏，其中，所述信号线包括数据线或栅线。
  4. 根据权利要求3所述的内嵌式触摸屏，还包括薄膜晶体管，其中，所述薄膜晶体管包括有源层、源极和漏极，所述源极与所述数据线电连接，所述源极和所述漏极分别与所述有源层电连接，所述源极设置于所述有源层和所述衬底基板之间。
  5. 根据权利要求4所述的内嵌式触摸屏，其中，所述源极与所述数据线同层形成，所述触控线与所述漏极同层形成。
  6. 根据权利要求5所述的内嵌式触摸屏，其中，所述薄膜晶体管还包括栅极，其中，所述栅线与所述栅极电连接，所述栅线与所述栅极同层形成，所述有源层设置于所述栅极和所述衬底基板之间。
  7. 根据权利要求6所述的内嵌式触摸屏，还包括遮光层，其中，所述数据线、所述源极以及所述遮光层同层形成，所述遮光层设置于所述有源层和所述衬底基板之间。
  8. 根据权利要求1-7任一项所述的内嵌式触摸屏，还包括像素电极，其中，所述像素电极与所述漏极电连接。
  9. 根据权利要求1-7任一项所述的内嵌式触摸屏，其中，所述触控电极复用为公共电极，所述触控线复用为公共电极线。
  10. 根据权利要求1-7任一项所述的内嵌式触摸屏，其中，所述触控电极对应一个或多个子像素。
  11. 根据权利要求1-7任一项所述的内嵌式触摸屏，其中，所述信号线与所述触控电极电绝缘，并且所述信号线与所述触控线电绝缘。
  12. 一种内嵌式触摸屏的制作方法，包括：
    在衬底基板上采用一次构图工艺形成数据线、源极和遮光层的图形；
    在所述数据线、源极和遮光层的图形上形成第一绝缘层；
    在所述第一绝缘层上形成有源层的图形，所述有源层通过第一绝缘层过孔与所述源极电连接；
    在所述有源层的图形上形成第二绝缘层；
    在所述第二绝缘层上采用一次构图工艺形成栅极和栅线的图形；
    在所述栅极和栅线的图形上形成第三绝缘层；
    在所述第三绝缘层上采用一次构图工艺形成触控线和漏极的图形，所述漏极通过第二绝缘层过孔与所述有源层电连接；
    在所述触控线和漏极的图形上形成第四绝缘层；
    在所述第四绝缘层上形成触控电极的图形，所述触控电极通过第三绝缘层过孔与所述触控线电连接；
    所述触控线和所述数据线沿同一方向延伸，所述触控线和所述数据线在垂直于所述衬底基板的方向上至少部分重叠，或者，所述触控线和所述栅线沿同一方向延伸，所述触控线和所述栅线在垂直于所述衬底基板的方向上至少部分重叠。
  13. 根据权利要求12所述的内嵌式触摸屏制作方法，其中，所述触控线和所述数据线在垂直于所述衬底基板的方向上完全重叠；或者，所述触控线和所述栅线在垂直于所述衬底基板的方向上完全重叠。
  14. 根据权利要求12或13任一项所述的内嵌式触摸屏制作方法，还包括形成像素电极的图形，其中，所述像素电极通过第四绝缘层过孔与所述漏极电连接。
  15. 根据权利要求12或13任一项所述的内嵌式触摸屏制作方法，其中，所述触控电极复用为公共电极，所述触控线复用为公共电极线。
  16. 一种显示装置，包括权利要求1-11任一项所述内嵌式触摸屏。
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CN104991690A (zh) * 2015-08-11 2015-10-21 京东方科技集团股份有限公司 一种触控显示面板、其制作方法、驱动方法及显示装置
CN105572935A (zh) * 2015-12-16 2016-05-11 上海天马微电子有限公司 一种触控显示面板和显示装置
CN105487719A (zh) * 2016-01-29 2016-04-13 上海天马微电子有限公司 集成触控显示面板和包含其的集成触控显示装置
CN106168865A (zh) * 2016-06-28 2016-11-30 京东方科技集团股份有限公司 内嵌式触摸屏及其制作方法、显示装置

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