Nothing Special   »   [go: up one dir, main page]

WO2017009586A1 - Procede de brasage par frittage d'une poudre conductrice par thermo-compression ultrasonique et module electronique de puissance realise par ce procede - Google Patents

Procede de brasage par frittage d'une poudre conductrice par thermo-compression ultrasonique et module electronique de puissance realise par ce procede Download PDF

Info

Publication number
WO2017009586A1
WO2017009586A1 PCT/FR2016/051833 FR2016051833W WO2017009586A1 WO 2017009586 A1 WO2017009586 A1 WO 2017009586A1 FR 2016051833 W FR2016051833 W FR 2016051833W WO 2017009586 A1 WO2017009586 A1 WO 2017009586A1
Authority
WO
WIPO (PCT)
Prior art keywords
substrate
semiconductor chip
conductive powder
material supply
welding process
Prior art date
Application number
PCT/FR2016/051833
Other languages
English (en)
Inventor
Jean-Michel Morelle
Ky Lim Tan
Original Assignee
Valeo Equipements Electriques Moteur
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Valeo Equipements Electriques Moteur filed Critical Valeo Equipements Electriques Moteur
Priority to EP16750967.8A priority Critical patent/EP3323144A1/fr
Publication of WO2017009586A1 publication Critical patent/WO2017009586A1/fr

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49503Lead-frames or other flat leads characterised by the die pad
    • H01L23/49513Lead-frames or other flat leads characterised by the die pad having bonding material between chip and die pad
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49541Geometry of the lead-frame
    • H01L23/49562Geometry of the lead-frame for devices being provided for in H01L29/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/75Apparatus for connecting with bump connectors or layer connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/27Manufacturing methods
    • H01L2224/273Manufacturing methods by local deposition of the material of the layer connector
    • H01L2224/2731Manufacturing methods by local deposition of the material of the layer connector in liquid form
    • H01L2224/2732Screen printing, i.e. using a stencil
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/27Manufacturing methods
    • H01L2224/274Manufacturing methods by blanket deposition of the material of the layer connector
    • H01L2224/2743Manufacturing methods by blanket deposition of the material of the layer connector in solid form
    • H01L2224/27436Lamination of a preform, e.g. foil, sheet or layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298Fillers
    • H01L2224/29299Base material
    • H01L2224/293Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29301Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/29311Tin [Sn] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298Fillers
    • H01L2224/29299Base material
    • H01L2224/293Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29338Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29339Silver [Ag] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298Fillers
    • H01L2224/29299Base material
    • H01L2224/293Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29338Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29344Gold [Au] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298Fillers
    • H01L2224/29299Base material
    • H01L2224/293Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29338Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29347Copper [Cu] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/32227Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the layer connector connecting to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48105Connecting bonding areas at different heights
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/7525Means for applying energy, e.g. heating means
    • H01L2224/75251Means for applying energy, e.g. heating means in the lower part of the bonding apparatus, e.g. in the apparatus chuck
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/7525Means for applying energy, e.g. heating means
    • H01L2224/753Means for applying energy, e.g. heating means by means of pressure
    • H01L2224/75301Bonding head
    • H01L2224/75302Shape
    • H01L2224/75303Shape of the pressing surface
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/7525Means for applying energy, e.g. heating means
    • H01L2224/753Means for applying energy, e.g. heating means by means of pressure
    • H01L2224/75343Means for applying energy, e.g. heating means by means of pressure by ultrasonic vibrations
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/757Means for aligning
    • H01L2224/75743Suction holding means
    • H01L2224/75745Suction holding means in the upper part of the bonding apparatus, e.g. in the bonding head
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319Arrangement of the layer connectors prior to mounting
    • H01L2224/83191Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319Arrangement of the layer connectors prior to mounting
    • H01L2224/83192Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/832Applying energy for connecting
    • H01L2224/83201Compression bonding
    • H01L2224/83203Thermocompression bonding, e.g. diffusion bonding, pressure joining, thermocompression welding or solid-state welding
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/832Applying energy for connecting
    • H01L2224/83201Compression bonding
    • H01L2224/83205Ultrasonic bonding
    • H01L2224/83206Direction of oscillation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/832Applying energy for connecting
    • H01L2224/83201Compression bonding
    • H01L2224/83205Ultrasonic bonding
    • H01L2224/83207Thermosonic bonding
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83399Material
    • H01L2224/834Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/83438Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/83439Silver [Ag] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83399Material
    • H01L2224/834Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/83438Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/83444Gold [Au] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838Bonding techniques
    • H01L2224/8384Sintering
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • H01L23/3735Laminates or multilayers, e.g. direct bond copper ceramic substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/27Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/102Material of the semiconductor or solid state bodies
    • H01L2924/1025Semiconducting materials
    • H01L2924/10251Elemental semiconductors, i.e. Group IV
    • H01L2924/10253Silicon [Si]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/102Material of the semiconductor or solid state bodies
    • H01L2924/1025Semiconducting materials
    • H01L2924/1026Compound semiconductors
    • H01L2924/1027IV
    • H01L2924/10272Silicon Carbide [SiC]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/102Material of the semiconductor or solid state bodies
    • H01L2924/1025Semiconducting materials
    • H01L2924/1026Compound semiconductors
    • H01L2924/1032III-V
    • H01L2924/1033Gallium nitride [GaN]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191Disposition
    • H01L2924/19101Disposition of discrete passive components
    • H01L2924/19107Disposition of discrete passive components off-chip wires

Definitions

  • the present invention relates to a welding process with material supply for the realization of an electronic power module.
  • High lead solder has a melting point around 296 ° C which also has the disadvantage of reducing the life of a power module using semiconductors operating at a temperature above 200 ° C.
  • its brazing temperature profile is around 320 ° C, which requires choosing an expensive plastic material holding high temperature, such as PEEK polymer (acronym for "PolyEtherEtherKetone", that is to say polyetheretherketone) ) for overmolding a housing.
  • lead-free soldering used in electronics in general, does not meet the new requirements of power electronics applications in the automotive industry. Apart from a gold alloy, lead-free solders are not stable. Affordable lead free solders are generally high tin content and have a solidus temperature below 250 ° C (237 ° C for SnSb5, 223 ° C for SnAg3Cu1 Sb10). These solders do not meet the reliability requirements in a brazed joint subjected to high thermomechanical stresses.
  • Standard diffusion brazing which involves introducing a mounting bracket into a reflow oven to diffuse solder into a solid metal layer under a defined load, is also compelling because it requires a high solder cycle time. and it heats the entire housing, including the overmolded plastic, to a temperature profile around 250 ° C. It has also been proposed a thermo-ultrasonic method applied to a "Flip Chip” type assembly, that is to say consisting in a transfer of a semiconductor chip on a substrate by solder balls, but that it turns out to be complex to implement.
  • Thermo-compression welding processes are also known for the production of solder with material feed. But they generally require either a high application pressure (30 MPa to 40 MPa for micrometric silver sintering) or a high assembly cycle time for standard diffusion brazing.
  • the sintering under load of metal particles makes it possible to improve the service life of the solder joint thanks to the solidus temperatures of the metal and the intermetallic much higher than the operating temperature of the power module, while respecting the European directive on the limitation of the use of dangerous substances, such as lead.
  • the sintering performance is measured by the shear strength which is directly related to the densification of the joint. Densification depends mainly on the following parameters:
  • a compressive force is applied in two stages, and the temperature of the chip is controlled precisely, thanks to the use of a pyrometer.
  • the heating temperature can be up to
  • the present invention therefore aims to overcome the disadvantages of soldering processes of semiconductor chips known for the realization of electronic power modules.
  • It relates to a material-fed welding process for transferring a semiconductor chip to a substrate of the type in which an assembly brick is formed comprising:
  • a transverse vibratory motion is imparted to the assembly brick at an ultrasonic frequency.
  • this conductive powder consists of particles of silver or particles of intermetallic alloys, formed from metals selected from among a group comprising silver, copper, gold and aluminum. tin.
  • the substrate is further coated with a first anti-diffusion coating formed of nickel, and a second anti-oxidation coating formed of silver or gold deposited on the first coating.
  • the conductive powder layer is deposited on the substrate by a screen printing method.
  • the conductive powder layer is deposited on the semiconductor chip by a transfer film method.
  • a temperature of the heating plate is between 200 ° C. and 300 ° C.
  • the ultrasonic frequency is between 20 kHz and 80 kHz.
  • an ultrasonic power is included between
  • the pressure load applied to the assembly brick is between 1 and 10 MPa (MegaPascal).
  • said substrate is made of copper, or of DBC or AMB type.
  • the invention also relates to an electronic power module of the type of those made in IML technology comprising a substrate and at least one semiconductor chip.
  • this semiconductor chip is transferred to the substrate by the solder method of material described above.
  • Figure 1 illustrates the principle of the soldering process with material supply according to the invention.
  • FIG. 2 shows an example of application of the material-supply welding method according to the invention to a power module produced using IML technology.
  • the principle of the method according to the invention is a sintering brazing of a conductive powder by ultrasonic thermo-compression of the semiconductor chip 1 on the substrate 2, as shown in FIG.
  • An assembly brick comprising:
  • DBC direct Bonded Copper
  • AMB active Metal Brazing
  • the chip 1 semiconductor Si, SiC or GaN.
  • the particles of intermetallic alloys are made from silver, copper, gold or tin. These particles, such as silver particles, are micron sizes, or less than one micrometer, but greater than one nanometer to limit health risks.
  • the substrate 2 is coated with a first coating 4 formed of nickel, intended to prevent interdiffusion to the substrate 2 of copper.
  • This first coating 4 is itself coated with a second coating 5 formed of silver, intended to prevent its oxidation.
  • the assembly brick 1, 2, 3 is compressed between a heating plate 6 and a holding flange 7 attached to an ultrasonic actuator assembly 8.
  • the holding flange 7 of the semiconductor chip 1 is a vacuum head comprising a suction channel 9, of usual use in the semiconductor industry for gripping a die 1.
  • the principle of the sinter brazing process according to the invention consists in simultaneously applying a pressure load 10, carrying the heating plate 6 to a temperature in a range of 200 ° C. to 300 ° C., and exerting lateral movement. 1 1 on the holding flange 7 at an ultrasonic frequency of between 20 kHz and 80 kHz, and at an ultrasonic power of 20 to 100 W for a period of 0.2 to 5 seconds.
  • the chip 1 is held at the ultrasonic actuator 8 by the vacuum created in the suction channel 9 of the holding flange 7.
  • the vibratory movement 1 1 exerted on the chip 1 is parallel to a interface of the two components 1, 2 to assemble.
  • the contribution of the conductive powder layer 2 can be done in two ways according to the embodiment.
  • this layer 3 is deposited by a screen printing method on the substrate 2.
  • this layer 3 is deposited on the semiconductor chip 1 by a transfer film method.
  • the method of welding with material supply according to the invention makes it possible to considerably reduce a duration of the assembly and a process temperature, as well as the pressure load 10, and thus to avoid damaging the chip 1 or of deforming the molded case in IML technology.
  • the proposed process temperature is below 300 ° C, whereas the brazing temperature of the known processes is generally above 300 ° C.
  • FIG. 2 shows an example of application of the solder method of material described above to a power module 13 in IML technology of a type embedded in an electric vehicle (EV) or hybrid vehicle (HEV).
  • EV electric vehicle
  • HEV hybrid vehicle
  • a power semiconductor 14 is connected by wired links (called “bonding” 15) to a control connector 16 overmolded in the plastic housing 17.
  • the power semiconductor 14 is brazed on a copper trace 18 of the lead frame ("lead frame" in English terminology) of the power module 13 molded in the housing 17 and in contact with the heat sink 19.
  • the heating plate 6 is placed under the power module 13.
  • the brazed joint 12 made by sintering silver or intermetallic particles under the temperature conditions of the process according to the invention makes it possible to avoid the use of a casing 17 molded in an expensive polymer such as PEEK, and consequently to reduce the manufacturing costs of the power module 13.

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Pressure Welding/Diffusion-Bonding (AREA)

Abstract

Le procédé de soudure avec apport de matière destiné à reporter une puce à semi-conducteur (1) sur un substrat (2) est du type dans lequel on forme une brique d'assemblage (1-2-3) comprenant le substrat (2), une couche (3) de poudre conductrice déposée sur le substrat (2), et la puce à semi-conducteur (1), et dans lequel on soumet longitudinalement la brique d'assemblage (1-2-3) à une charge de pression (10) entre une plaque chauffante (6) et une bride de maintien (7). Conformément à l'invention, l'on imprime un mouvement vibratoire transversal (11) à la brique d'assemblage (1-2-3) à une fréquence ultrasonique. On obtient ainsi un brasage par frittage d'une poudre conductrice par thermo-compression ultrasonique de la puce à semi-conducteur (1) sur le substrat (2). L'action combinée de la pression, de la température et des ultrasons permet d'obtenir un frittage présentant une densité élevée tout en maintenant la température dans la fourchette compatible avec la technologie des modules de puissance visés, et tout en diminuant la charge de pression (10) par rapport aux procédés de thermo-compression connus. Selon d'autres caractéristiques, la poudre conductrice peut être constituée de particules d'argent ou de particules d'alliages intermétalliques, formés à partir de métaux pris parmi un groupe comprenant l'argent, le cuivre, l'or et l'étain.

Description

PROCEDE DE BRASAGE PAR FRITTAGE D'UNE POUDRE CONDUCTRICE PAR THERMO-COMPRESSION ULTRASONIQUE ET MODULE ELECTRONIQUE DE PUISSANCE REALISE PAR CE PROCEDE
DOMAINE TECHNIQUE DE L'INVENTION.
La présente invention concerne un procédé de soudure avec apport de matière pour la réalisation d'un module électronique de puissance.
ARRIERE PLAN TECHNOLOGIQUE DE L'INVENTION.
La nouvelle génération de semi-conducteurs en nitrure de gallium (GaN) ou en carbure de silicium (SiC) peut fonctionner à une température au dessus de 200°C, mais un brasage classique sans plomb ne convient plus à une telle température et un brasage traditionnel à base de plomb, utilisé dans les modules de puissance actuels, sera remis en question dans le cadre de la réglementation d'utilisation des substances dangereuses (RoHS) en Europe.
La brasure à fort taux de plomb a un point de fusion autour de 296°C qui présente aussi l'inconvénient de réduire la durée de vie d'un module de puissance utilisant les semi conducteurs fonctionnant à une température au dessus de 200°C. De plus, son profil de température de brasage est autour de 320°C, ce qui exige de choisir une matière plastique coûteuse tenant à haute température, telle que le polymère PEEK (acronyme de "PolyEtherEtherKetone", c'est-à-dire polyétheréthercétone) pour le surmoulage d'un boîtier.
Le brasage traditionnel sans plomb, utilisé dans l'électronique en général, ne permet pas de satisfaire aux nouvelles exigences des applications de l'électronique de puissance dans l'automobile. A part un alliage d'or, les brasures sans plomb ne sont pas stables. Les brasures sans plomb, abordables, sont en général à fort taux d'étain et ont une température de solidus inférieure à 250°C (237°C pour SnSb5, 223°C pour SnAg3Cu1 Sb10). Ces brasures ne permettent pas de satisfaire aux exigences de fiabilité dans un joint brasé soumis à des contraintes thermo mécaniques élevées.
Le brasage par diffusion standard, qui consiste à introduire un support de montage dans un four à refusion pour faire diffuser de la brasure dans une couche de métal solide sous une charge définie, est contraignant également, car il nécessite un temps de cycle de brasage élevé et il chauffe l'ensemble du boîtier, y compris le plastique surmoulé, à un profil de température autour de 250°C. II a aussi été proposé un procédé thermo ultrasonique appliqué à un assemblage de type « Flip Chip », c'est-à-dire consistant en un report d'une puce à semi-conducteur sur un substrat par des billes de brasure, mais celui-ci se révèle complexe à mettre en œuvre.
Des procédés de soudage par thermo compression sont également connus pour la réalisation de soudure avec apport de matière. Mais ils exigent généralement, soit une pression d'application élevée (30 MPa à 40 MPa pour le frittage d'argent micrométrique), soit un temps de cycle d'assemblage élevé pour le brasage par diffusion standard.
Le frittage sous charge de particules métalliques permet d'améliorer la durée de vie du joint de brasage grâce aux températures de solidus du métal et de l'intermétallique bien plus élevées que la température de fonctionnement du module de puissance, tout en respectant la directive européenne sur la limitation de l'utilisation de substances dangereuses, telles que le plomb.
La performance du frittage est mesurée par la résistance au cisaillement qui est directement liée à la densification du joint. La densification dépend principalement des paramètres suivants:
- la pression exercée sur l'empilage;
- la température de frittage qui doit être comprise dans la plage 200°C - 300°C; - le temps de cycle qui doit être le plus faible possible;
- la taille des particules.
Dans la demande de brevet français FR2915622 de la société VALEO ELECTRONIQUE ET SYSTEMES DE LIAISON, dont l'objet est un procédé d'assemblage d'un organe sur un support par frittage d'une masse de poudre conductrice, la pression et la température sont optimisées pour former un joint de qualité homogène entre le substrat et la puce à semi-conducteur.
Notamment, une force de compression est appliquée en deux temps, et la température de la puce est contrôlée de manière précise, grâce à l'utilisation d'un pyromètre.
Toutefois dans ce procédé, la température de chauffage peut aller jusqu'à
400°C, ce qui peut endommager le boîtier d'un module de puissance réalisé dans une technologie de type IML (acronyme de "Insulated Molded Lead frame" en terminologie anglaise, c'est-à-dire "Grille de connexion Moulée Isolée"). DESCRIPTION GENERALE DE L'INVENTION.
La présente invention vise donc à pallier les inconvénients des procédés de soudure des puces à semi-conducteurs connus pour la réalisation de modules électroniques de puissance.
Elle concerne un procédé de soudure avec apport de matière destiné à reporter une puce à semi-conducteur sur un substrat du type dans lequel on forme une brique d'assemblage comprenant:
- le substrat;
- une couche de poudre conductrice déposée sur ledit substrat;
- ladite puce à semi-conducteur;
et dans lequel on soumet longitudinalement cette brique d'assemblage à une charge de pression entre une plaque chauffante et une bride de maintien.
Dans le procédé selon l'invention on imprime un mouvement vibratoire transversal à la brique d'assemblage à une fréquence ultrasonique.
Selon le procédé de l'invention, cette poudre conductrice est constituée de particules d'argent ou de particules d'alliages intermétalliques, formés à partir de métaux pris parmi un groupe comprenant, l'argent, le cuivre, l'or et l'étain.
Selon le procédé de l'invention encore, le substrat est en outre revêtu d'un premier revêtement anti-diffusion formé de nickel, et d'un second revêtement anti- oxydation formé d'argent ou d'or déposé sur le premier revêtement.
Dans un mode de réalisation du procédé selon l'invention, la couche de poudre conductrice est déposée sur le substrat par une méthode de sérigraphie.
Dans un autre mode de réalisation du procédé selon l'invention, la couche de poudre conductrice est déposée sur la puce à semi-conducteur par une méthode de film de transfert.
Dans l'un et l'autre modes de réalisation du procédé selon l'invention, une température de la plaque chauffante est comprise entre 200° C et 300° C.
Selon l'invention, la fréquence ultrasonique est comprise entre 20 kHz et 80 kHz.
Selon l'invention encore, une puissance ultrasonique est comprise entre
20 W et 100 W, typiquement pendant une durée de 0,2 à 5 secondes selon les applications de l'invention.
Selon l'invention encore, la charge de pression appliquée sur la brique d'assemblage est comprise entre 1 et 10 MPa (MégaPascal). Dans le procédé selon l'invention, ledit substrat est en cuivre, ou bien de type DBC ou AMB.
L'invention concerne également un module électronique de puissance du type de ceux réalisés en technologie IML comprenant un substrat et au moins une puce à semi-conducteur.
Selon l'invention, cette puce à semi-conducteur est reportée sur le substrat par le procédé de soudure avec apport de matière décrit ci-dessus.
Ces quelques spécifications essentielles auront rendu évidents pour l'homme de métier les avantages apportés par un tel procédé de soudure avec apport de matière, et par le module électronique de puissance réalisé par ce procédé, par rapport à l'état de la technique antérieur.
Les spécifications détaillées de l'invention sont données dans la description qui suit en liaison avec les dessins ci-annexés. Il est à noter que ces dessins n'ont d'autre but que d'illustrer le texte de la description et ne constituent en aucune sorte une limitation de la portée de l'invention.
BREVE DESCRIPTION DES DESSINS.
La Figure 1 illustre le principe du procédé de soudure avec apport de matière selon l'invention.
La Figure 2 montre un exemple d'application du procédé de soudure avec apport de matière selon l'invention à un module de puissance réalisé en technologie IML.
DESCRIPTION DES MODES DE REALISATION PREFERES DE L'INVENTION.
Le principe du procédé selon l'invention est un brasage par frittage d'une poudre conductrice par thermo compression ultrasonique de la puce à semiconducteur 1 sur le substrat 2, comme l'illustre la Figure 1.
On forme une brique d'assemblage comprenant:
- le substrat 2 en cuivre, ou bien de type DBC (acronyme de "Direct Bonded Copper" en terminologie anglaise, ce qui désigne du cuivre et un matériau céramique directement liés), ou AMB (acronyme de "Active Métal Brazing", qui désigne un substrat céramique brasé);
- une couche 3 d'une poudre constituée de particules d'argent ou d'alliages intermétalliques;
- la puce 1 à semi-conducteur (en Si, SiC ou GaN).
Les particules d'alliages intermétalliques sont constituées à partir d'argent, de cuivre, d'or ou d'étain. Ces particules, comme les particules d'argent, sont de tailles micrométriques, ou inférieures au micromètre, mais supérieures au nanomètre pour limiter les risques sanitaires.
Le substrat 2 est revêtu d'un premier revêtement 4 formé de nickel, destiné à éviter une interdiffusion vers le substrat 2 de cuivre.
Ce premier revêtement 4 est lui-même revêtu d'un second revêtement 5 formé d'argent, destiné à prévenir son oxydation.
La brique d'assemblage 1 , 2, 3, est comprimée entre une plaque chauffante 6 et une bride de maintien 7 fixée à un ensemble d'actionneur ultrasonique 8.
La bride de maintien 7 de la puce à semi-conducteur 1 est une tête à vide comportant un canal d'aspiration 9, d'utilisation habituelle dans l'industrie des semi- conducteurs pour assurer une préhension d'un dé 1 .
Le principe du procédé de brasage par frittage selon l'invention consiste à appliquer simultanément une charge de pression 10, à porter la plaque chauffante 6 à une température comprise dans une fourchette de 200°C à 300°C, et à exercer un mouvement latéral 1 1 sur la bride de maintien 7 à une fréquence ultrasonique comprise entre 20 kHz et 80 kHz, et à une puissance ultrasonique de 20 à 100 W pendant une durée de 0,2 à 5 secondes.
Durant l'opération de brasage, la puce 1 est maintenue à l'actionneur ultrasonique 8 par le vide créé dans le canal d'aspiration 9 de la bride de maintien 7. Le mouvement vibratoire 1 1 exercé sur la puce 1 est parallèle à une interface des deux composants 1 , 2 à assembler.
L'action combinée de la pression, de la température et des ultrasons permet d'obtenir un frittage présentant une densité élevée tout en maintenant la température dans la fourchette compatible avec la technologie des modules de puissance visés, et tout en diminuant la charge de pression 10 par rapport aux procédés de thermo-compression connus. Les essais réalisés par l'entité inventive ont montrés qu'une charge de pression comprise entre 1 et 10 MPa convient à la plupart des applications.
Cette densification confère une résistance au cisaillement élevée à un joint d'assemblage 12, ce qui contribue à améliorer la fiabilité d'un module de puissance 13 réalisé par le procédé selon l'invention, tel que celui montré sur la Figure 2.
Au cours de la fabrication de ce module 13, l'apport de la couche de poudre conductrice 2 peut se faire de deux manières selon le mode de réalisation.
Dans un mode de réalisation du procédé selon l'invention, cette couche 3 est déposée par une méthode de sérigraphie sur le substrat 2.
Alternativement, dans un autre mode de réalisation du procédé selon l'invention, cette couche 3 est déposée sur la puce à semi-conducteur 1 par une méthode de film de transfert.
Le procédé de soudure avec apport de matière selon l'invention permet de réduire considérablement une durée de l'assemblage et une température de procédé, ainsi que la charge de pression 10, et d'éviter ainsi de détériorer la puce 1 ou de déformer le boîtier surmoulé en technologie IML. La température de procédé proposée est inférieure à 300°C, alors que la température de brasage des procédés connus est en général supérieure à 300°C.
La Figure 2 montre un exemple d'application du procédé de soudure avec apport de matière décrit ci-dessus à un module de puissance 13 en technologie IML d'un type embarqué dans un véhicule électrique (EV) ou hybride (HEV).
Un semi-conducteur de puissance 14 est relié par des liaisons filaires (dites "bonding" 15) à un connecteur de commande 16 surmoulé dans le boîtier 17 en plastique.
Le semi-conducteur de puissance 14 est brasé sur une trace en cuivre 18 de la grille de contact ("Lead frame" en terminologie anglaise) du module de puissance 13 moulée dans le boîtier 17 et en contact avec le dissipateur thermique 19.
Pour la mise en œuvre du procédé selon l'invention, la plaque chauffante 6 est placée sous le module de puissance 13.
Le joint brasé 12 réalisé par frittage de particules d'argent ou d'intermétalliques dans les conditions de température du procédé selon l'invention permet d'éviter l'utilisation d'un boîtier 17 moulé dans un polymère onéreux tel que le PEEK, et par conséquent de diminuer les coûts de fabrication du module de puissance 13.
Comme il va de soi, l'invention ne se limite pas aux seuls modes d'exécution préférentiels décrits ci-dessus.
L'invention embrasse toutes les variantes possibles de réalisation, dans la mesure où elles ne sortent pas du cadre fixé par les revendications ci-après.

Claims

REVENDICATIONS
1) Procédé de soudure avec apport de matière destiné à reporter une puce à semiconducteur (1 ) sur un substrat (2) du type dans lequel on forme une brique d'assemblage (1 , 2, 3) comprenant ledit substrat (2), une couche (3) de poudre conductrice déposée sur ledit substrat (2), et ladite puce à semi-conducteur (1 ), et dans lequel on soumet longitudinalement ladite brique d'assemblage (1 , 2, 3) à une charge de pression (10) entre une plaque chauffante (6) et une bride de maintien (7), caractérisé en ce que l'on imprime un mouvement vibratoire transversal (1 1 ) à ladite brique d'assemblage (1 , 2, 3) à une fréquence ultrasonique.
2) Procédé de soudure avec apport de matière selon la revendication 1 précédente, caractérisé en ce que ladite poudre conductrice (3) est constituée de particules d'argent ou de particules d'alliages intermétalliques, formés à partir de métaux pris parmi un groupe comprenant, l'argent, le cuivre, l'or et l'étain.
3) Procédé de soudure avec apport de matière selon l'une quelconque des revendications 1 ou 2 précédentes, caractérisé en ce que ledit substrat (2) est en outre revêtu d'un premier revêtement (4) anti-diffusion formé de nickel, et d'un second revêtement (5) anti-oxydation formé d'argent déposé sur ledit premier revêtement (4).
4) Procédé de soudure avec apport de matière selon l'une quelconque des revendications 1 à 3 précédentes, caractérisé en ce que ladite couche (3) est déposée sur ledit substrat (2) par une méthode de sérigraphie.
5) Procédé de soudure avec apport de matière selon l'une quelconque des revendications 1 à 3 précédentes, caractérisé en ce que ladite couche (3) est déposée sur ladite puce à semi-conducteur (1 ) par une méthode de film de transfert.
6) Procédé de soudure avec apport de matière selon l'une quelconque des revendications 1 à 5 précédentes, caractérisé en ce qu'une température de ladite plaque chauffante (6) est comprise entre 200° C et 300° C et la charge de pression appliquée sur la brique d'assemblage est comprise entre 1 MPa et 10 MPa.
7) Procédé de soudure avec apport de matière selon l'une quelconque des revendications 1 à 6 précédentes, caractérisé en ce que ladite fréquence ultrasonique est comprise entre 20 kHz et 80 kHz.
8) Procédé de soudure avec apport de matière selon l'une quelconque des revendications 1 à 7 précédentes, caractérisé en ce qu'une puissance ultrasonique est comprise entre 20 W et 100 W et est appliquée pendant une durée comprise entre 0,2 et 5 secondes.
9) Procédé de soudure avec apport de matière selon l'une quelconque des revendications 1 à 8 précédentes, caractérisé en ce que ledit substrat (2) est en cuivre, ou bien de type DBC ou AMB.
10) Module électronique de puissance (13) du type de ceux réalisés en technologie IML comprenant un substrat (2) et au moins une puce à semi-conducteur (1 , 14) caractérisé en ce que ladite au moins une puce à semi-conducteur (1 , 14) est reportée sur ledit substrat (2) par le procédé de soudure avec apport de matière selon l'une quelconque des revendications 1 à 9 précédentes.
PCT/FR2016/051833 2015-07-16 2016-07-18 Procede de brasage par frittage d'une poudre conductrice par thermo-compression ultrasonique et module electronique de puissance realise par ce procede WO2017009586A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
EP16750967.8A EP3323144A1 (fr) 2015-07-16 2016-07-18 Procede de brasage par frittage d'une poudre conductrice par thermo-compression ultrasonique et module electronique de puissance realise par ce procede

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR1556690A FR3039025B1 (fr) 2015-07-16 2015-07-16 Procede de soudure avec apport de matiere et module electronique de puissance realise par ce procede
FR1556690 2015-07-16

Publications (1)

Publication Number Publication Date
WO2017009586A1 true WO2017009586A1 (fr) 2017-01-19

Family

ID=54291459

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/FR2016/051833 WO2017009586A1 (fr) 2015-07-16 2016-07-18 Procede de brasage par frittage d'une poudre conductrice par thermo-compression ultrasonique et module electronique de puissance realise par ce procede

Country Status (3)

Country Link
EP (1) EP3323144A1 (fr)
FR (1) FR3039025B1 (fr)
WO (1) WO2017009586A1 (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109759742A (zh) * 2019-03-13 2019-05-17 重庆理工大学 一种无钎焊剂用的焊料及焊接方法

Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1050903A1 (fr) * 1999-04-21 2000-11-08 TDK Corporation Procédé et appareil de bonding par ultrason
WO2007034893A1 (fr) * 2005-09-22 2007-03-29 Nihon Handa Co., Ltd. Composition particulaire metallique pateuse, son procede de durcissement, procede de liaison d'un element metallique, processus de production de carte imprimee
EP1916709A1 (fr) * 2006-06-05 2008-04-30 Tanaka Kikinzoku Kogyo K.K. Procede de liaison
WO2008062548A1 (fr) * 2006-11-24 2008-05-29 Nihon Handa Co., Ltd. Composition de particules métalliques pâteuses et procédé de réunion
JP2008311371A (ja) * 2007-06-13 2008-12-25 Denso Corp 接合方法及び接合体
US20090244868A1 (en) * 2008-03-31 2009-10-01 Toshiaki Morita Semiconductor device and bonding material
DE102008050798A1 (de) * 2008-10-08 2010-04-15 Infineon Technologies Ag Verfahren zum Positionieren und Fixieren eines Bauteils auf einem anderen Bauteil sowie eine Anordnung zum Positionieren und Vorfixieren
WO2013185839A1 (fr) * 2012-06-15 2013-12-19 Osram Opto Semiconductors Gmbh Procédé de fabrication d'un composant à semi-conducteur optoélectronique comprenant une couche de liaison frittée sous l'action de la chaleur, d'une pression et d'ultrasons
WO2014180620A1 (fr) * 2013-05-07 2014-11-13 Robert Bosch Gmbh Pâtes de frittage composite-argent pour composés de frittage basse température

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1050903A1 (fr) * 1999-04-21 2000-11-08 TDK Corporation Procédé et appareil de bonding par ultrason
WO2007034893A1 (fr) * 2005-09-22 2007-03-29 Nihon Handa Co., Ltd. Composition particulaire metallique pateuse, son procede de durcissement, procede de liaison d'un element metallique, processus de production de carte imprimee
EP1916709A1 (fr) * 2006-06-05 2008-04-30 Tanaka Kikinzoku Kogyo K.K. Procede de liaison
WO2008062548A1 (fr) * 2006-11-24 2008-05-29 Nihon Handa Co., Ltd. Composition de particules métalliques pâteuses et procédé de réunion
JP2008311371A (ja) * 2007-06-13 2008-12-25 Denso Corp 接合方法及び接合体
US20090244868A1 (en) * 2008-03-31 2009-10-01 Toshiaki Morita Semiconductor device and bonding material
DE102008050798A1 (de) * 2008-10-08 2010-04-15 Infineon Technologies Ag Verfahren zum Positionieren und Fixieren eines Bauteils auf einem anderen Bauteil sowie eine Anordnung zum Positionieren und Vorfixieren
WO2013185839A1 (fr) * 2012-06-15 2013-12-19 Osram Opto Semiconductors Gmbh Procédé de fabrication d'un composant à semi-conducteur optoélectronique comprenant une couche de liaison frittée sous l'action de la chaleur, d'une pression et d'ultrasons
WO2014180620A1 (fr) * 2013-05-07 2014-11-13 Robert Bosch Gmbh Pâtes de frittage composite-argent pour composés de frittage basse température

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
BAI G: "Low-Temperature Sintering of Nanoscale Silver Paste for Semiconductor Device Interconnection", October 2005 (2005-10-01), pages 1 - 195, XP009166994, Retrieved from the Internet <URL:http://scholar.lib.vt.edu/theses/available/etd-10312005-163634/> *
LU G-Q ET AL: "A lead-free, low-temperature sintering die-attach technique for high-performance and high-temperature packaging", HIGH DENSITY MICROSYSTEM DESIGN AND PACKAGING AND COMPONENT FAILURE ANALYSIS, 2004. HDP '04. PROCEEDING OF THE SIXTH IEEE CPMT CONFERENCE ON, SHANGHAI, CHINE, 30 JUIN-3 JUILLET 2004, PISCATAWAY, NJ, USA, IEEE, 30 June 2004 (2004-06-30), pages 42 - 46, XP010733589, ISBN: 978-0-7803-8620-4, DOI: 10.1109/HPD.2004.1346671 *

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109759742A (zh) * 2019-03-13 2019-05-17 重庆理工大学 一种无钎焊剂用的焊料及焊接方法
CN109759742B (zh) * 2019-03-13 2024-03-26 重庆理工大学 一种无钎焊剂用的焊料及焊接方法

Also Published As

Publication number Publication date
FR3039025B1 (fr) 2018-03-09
EP3323144A1 (fr) 2018-05-23
FR3039025A1 (fr) 2017-01-20

Similar Documents

Publication Publication Date Title
Lu et al. A lead-free, low-temperature sintering die-attach technique for high-performance and high-temperature packaging
CN101728288B (zh) 使用加热键合头的直接晶粒装配
JP6061248B2 (ja) 接合方法及び半導体モジュールの製造方法
US8975182B2 (en) Method for manufacturing semiconductor device, and semiconductor device
CN110891732B (zh) 用于扩散焊接的无铅的焊接薄膜和用于其制造的方法
JP2001122673A (ja) 異種部材の接合用接着剤組成物、同組成物を用いた接合方法、および同接合方法により接合された複合部材
US20150123263A1 (en) Two-step method for joining a semiconductor to a substrate with connecting material based on silver
JP2014135411A (ja) 半導体装置および半導体装置の製造方法
JP5968046B2 (ja) 半導体装置および半導体装置の製造方法
JP5708961B2 (ja) 半導体装置の製造方法
JP2013209720A (ja) 金属体の接合方法
KR101609495B1 (ko) 반도체 장치 및 반도체 장치의 제조 방법
JPH0964258A (ja) 大電力半導体デバイス
EP3115128A1 (fr) Assemblage comprenant deux elements de coefficient de dilatation thermique differents et un joint fritte heterogene en densite et procede de fabrication de l&#39;assemblage
TW201324701A (zh) 接合體
EP3323144A1 (fr) Procede de brasage par frittage d&#39;une poudre conductrice par thermo-compression ultrasonique et module electronique de puissance realise par ce procede
US20170178929A1 (en) A Method For Low Temperature Bonding Of Wafers
Liu et al. Mechanical properties of transient liquid phase bonded joints by using Ag-In sandwich structure
Kisiel et al. Silver micropowders as SiC die attach material for high temperature applications
WO2015052791A1 (fr) Procédé d&#39;assemblage pour corps métallique et structure d&#39;assemblage pour corps métallique
WO2016185149A1 (fr) Procede de soudure avec apport de matiere et module electronique de puissance realise par ce procede
JP5733466B2 (ja) 半導体装置の製造方法
JP2017092436A (ja) 部品接合装置
JP5938132B1 (ja) 部品接合装置及び部品接合システム
Suppiah et al. A short review on thermosonic flip chip bonding

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 16750967

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

WWE Wipo information: entry into national phase

Ref document number: 2016750967

Country of ref document: EP