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WO2011114948A1 - Electronic switch device - Google Patents

Electronic switch device Download PDF

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Publication number
WO2011114948A1
WO2011114948A1 PCT/JP2011/055410 JP2011055410W WO2011114948A1 WO 2011114948 A1 WO2011114948 A1 WO 2011114948A1 JP 2011055410 W JP2011055410 W JP 2011055410W WO 2011114948 A1 WO2011114948 A1 WO 2011114948A1
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WO
WIPO (PCT)
Prior art keywords
output
oscillation
state
circuit
power supply
Prior art date
Application number
PCT/JP2011/055410
Other languages
French (fr)
Japanese (ja)
Inventor
豊一 岩本
光男 志田
Original Assignee
ローランド株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
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Publication of WO2011114948A1 publication Critical patent/WO2011114948A1/en

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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/687Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
    • H03K17/6871Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors the output circuit comprising more than one controlled field-effect transistor
    • H03K17/6874Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors the output circuit comprising more than one controlled field-effect transistor in a symmetrical configuration
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K2217/00Indexing scheme related to electronic switching or gating, i.e. not by contact-making or -breaking covered by H03K17/00
    • H03K2217/0009AC switches, i.e. delivering AC power to a load

Definitions

  • the present invention relates to an electronic switch device, and in particular, various mechanical switch parts can be used regardless of safety standards as a switch part for turning on / off power supply from an electric power supply source such as a commercial AC power source to an electronic device.
  • the present invention relates to an electronic switch device.
  • Patent Document 1 describes a power switch mechanism in which a power operation switch and a switch unit of a power supply unit are mechanically connected by a connecting member so that the switch unit of the power supply unit can be pressed by pressing the power operation switch. Has been.
  • a power operation button operated by an operator can be provided on the front surface of the device while power is provided on the back surface side of the device. Therefore, the cable in the device can be shortened and electromagnetic noise can be reduced.
  • a mechanical switch component when a mechanical switch component is used as a switch for turning on or off power supply from a commercial AC power supply to an electronic device, the mechanical switch component to be used depends on the country in which the electronic device is used.
  • a mechanical switch that satisfies the safety standard is sufficiently safe against high voltages, but is structurally large and expensive.
  • the present invention has been made in view of the above-described circumstances and the like, and is operated by a user to turn on (conduct) or turn off (shut off) power supply from a power supply source such as a commercial AC power source to an electronic device.
  • An object of the present invention is to provide an electronic switch device that can be used freely even if it is a mechanical switch component that does not meet the safety standards of each country.
  • the oscillating means for oscillating at a predetermined frequency is provided. Since this oscillating means includes a primary coil in the transformer, it oscillates when the operation switch opens both ends of the secondary coil, while both ends of the secondary coil of the transformer are short-circuited by the operation switch. In this case, the inductor value of the primary side coil decreases, so that the oscillation operation is hindered and the oscillation stops.
  • the oscillating means including the oscillating unit that oscillates at a predetermined frequency.
  • the resonance means blocks the oscillation of the oscillation means. (Parasitic intermittent oscillation) is generated.
  • the inductor value of the primary coil of the transistor decreases, and accordingly, the oscillation operation of the oscillation means (oscillation unit) is obstructed. The oscillation stops.
  • the operation switch opens or short-circuits both ends of the secondary side coil depends on the output from the oscillation means (particularly, according to claim 3).
  • the oscillation mode blocking oscillation, which is an output from the oscillation means
  • the switching means switches between conduction and interruption of the power supply path (hereinafter simply referred to as “power supply path”) from the power supply source to the power usage unit.
  • the switch since the secondary side coil to which the operation switch is connected is insulated from the primary side coil, the switch does not satisfy the safety standards of countries around the world. Even if a component is used as an operation switch, it is possible to ensure the safety of the user who operates the operation switch. In addition, even switch parts that do not meet the safety standards of countries around the world can be used as operation switches, so that there is an effect that the cost of the operation switch part can be reduced.
  • the secondary side coil and the operation switch are connected by isolating the secondary side coil to which the operation switch is connected and the primary side coil.
  • the electric wires to be connected also have an effect that an inexpensive electric wire can be used instead of an expensive electric wire for high voltage.
  • the length of the electric wire can be freely increased without considering radiation noise, there is an effect that it is possible to freely dispose the operation switch mounting position.
  • the oscillation means oscillates.
  • both ends of the secondary coil are short-circuited by the operation switch, the oscillation occurs.
  • the means stops oscillating. In this way, whether the operation switch opens or shorts both ends of the secondary coil is reflected in the voltage amplitude of the output from the oscillating means.
  • the switching means can distinguish the state of the operation switch depending on whether the output from the detection means is the first state or the second state. Therefore, based on the output from the detection means, there is an effect that the switching of the power supply path by the switching means can be switched according to the operating state of the operation switch.
  • the oscillating unit includes a transistor for oscillating the oscillating unit. Between the emitter from which an oscillation signal is output from the transistor and the base, a coil in the resonance unit (primary in the transformer) is provided. Side coil) and a capacitor are connected in series.
  • the resonance unit causes blocking oscillation in the oscillation unit of the oscillation unit, while both ends of the secondary coil are operated by the operation switch.
  • oscillation of the oscillating means oscillating unit stops. In this way, whether the operation switch opens or shorts both ends of the secondary coil is reflected in the output from the oscillation means, that is, the voltage amplitude of blocking oscillation.
  • the switching means can distinguish the state of the operation switch depending on whether the output from the detection means is the first state or the second state. Therefore, based on the output from the detection means, there is an effect that the switching of the power supply path by the switching means can be switched according to the operating state of the operation switch.
  • the detection accuracy by the detecting means can be increased while the electronic switch device is configured to save power, and the switching means There is an effect that switching between conduction and interruption of the power supply path can be performed with high accuracy.
  • the operation switch is an unlatched switch, even when the power supply path is turned on (ie, switch on), the operation is performed when the power supply path is shut off (ie, switch off).
  • the output from the detection means since the output from the detection means is in the second state, the output from the detection means distinguishes whether the operation switch is operated for switching on or for switching off. I can't.
  • the latch means every time the input of the latch means by the output from the detecting means is switched from the first state to the second state, the latch means inverts and latches the output state.
  • the output state from the latch means returns to the same state every time the operation switch is operated twice. Therefore, since the output of the latch means can distinguish between the operation for turning on the switch in the unlatch type switch and the operation for turning off the switch, this is the case where an unlatch type switch is used as the operation switch.
  • the following effect can be obtained.
  • the output state to the predetermined input terminal in the latch means is changed from the fourth state different from the predetermined third state of high or low by the initialization means.
  • the input terminal of the latch unit to which the output from the initialization unit is input is a state in which the switching unit preferentially shuts off the power supply path when the third state is input. Therefore, the power supply path can be cut off based on the control signal input from the control input means.
  • the power supply path can be automatically cut off by the control signal input from the control input means. Therefore, power is supplied by outputting a control signal to the control input means according to the convenience of the power usage unit (electronic musical instrument, etc.) or other equipment (electronic timer device, etc.) and inputting the control signal from the control input means. Since the road can be cut off, it is possible to prevent wasteful power from being supplied when the power usage unit is not used.
  • the output state from the latch means is changed to the state where the switching means shuts off the power supply path, so that the operation switch is operated for the purpose of switching off (cutting off the power supply path). It can be in the same state as when it was done. Therefore, the operation of the next operation switch can be treated as a switch-on (power supply path conduction) operation.
  • the user can operate Even though the switch is operated, there is an effect that it is possible to avoid a situation in which the electronic use unit does not drive against the intention.
  • the second initialization means has a capacitor and output means.
  • the capacitor of the second initialization means is configured to store charges when the connector is connected to the power supply source and to discharge when the connector is removed from the power supply source.
  • the output unit of the second initialization unit outputs the third state defined in advance as high or low to the predetermined input terminal of the latch unit.
  • a fourth state different from the third state is output to the same input terminal.
  • the second initial initial charge is stored until a predetermined amount of charge is stored in the capacitor.
  • the third state (either high or low) can be output from the output means of the conversion means.
  • the input terminal of the latch means to which the output from the second initialization means is inputted when the third state is inputted, the output means is preferentially switched to the state in which the switching means shuts off the power supply path. Therefore, the power supply path can be shut off at the beginning of the connection of the connector to the power supply source (the period until a predetermined amount of charge is stored in the capacitor). Therefore, there is an effect that, when the connector is connected to the power supply source, it is possible to prevent the power supply path from being conducted unintentionally and driving the power use unit.
  • the electronic switch device of the eighth aspect in addition to the effect produced by the electronic switch device of the seventh aspect, the following effect is obtained.
  • a fifth state defined in advance as high or low is output from the second detecting means, and the voltage amplitude of the output is below a predetermined value.
  • a sixth state different from the fifth state is output from the second detection means. That is, while the operation switch is in a non-operating state and both ends of the secondary coil are open, the output from the second detection means is in the fifth state, and the operation switch is operated and the secondary coil is operated. While both ends are short-circuited, the output from the second detection means is in the sixth state.
  • the priority means (a part of the switching means) inputs from the latch means.
  • the power supply path is conducted with priority over the above. Therefore, even if the input from the latch means accompanying the operation of the operation switch is in a state where the power supply path is interrupted, the power supply path can be conducted while the operation switch continues to be operated. That is, if the operation switch is continuously operated, the power supply path can be conducted without depending on the output state from the latch means, so that the connector is connected to the power supply source while operating the operation switch.
  • the power supply path can be made conductive. Therefore, there is an effect that the power use unit can be driven at the timing when the connector is connected to the power supply source.
  • FIG. 1 is a schematic diagram showing a use state of an electronic switch device 1 according to an embodiment of the present invention.
  • the electronic switch device 1 is interposed between an outlet (not shown) as a commercial AC power source as a power supply source and an electronic musical instrument 100 as a power usage unit. This is a device for supplying (on) or shutting off (off) power to the electronic musical instrument 100.
  • the electronic switch device 1 has a plug as an AC input unit 2 and a connector as an AC output unit 3 (see FIG. 2).
  • the AC input unit 2 is connected to an outlet, and the AC output unit 3 is an electronic device.
  • the electronic switch device 1 may be built in the main body of the electronic musical instrument 100, and in this case, the operation switch 50 may be attached to an appropriate location (for example, the operation panel 110) on the electronic musical instrument 100. .
  • the electronic switch device 1 has an operation switch 50 that is a mechanical switch.
  • the operation switch 50 is an unlatched switch, that is, a switch that returns to the initial position when not operated. Note that an unlatched switch may also be referred to as a momentary switch.
  • the operation switch 50 when the user presses (operates) the operation switch 50 in a state where the AC input unit 2 is connected to the outlet and the AC output unit 3 is connected to the power cable 101.
  • the power supply to the electronic musical instrument 100 can be switched between the supply and the cut-off according to the pushing operation.
  • the operation switch 50 is input by a push operation (pressing), but an operation input such as a slide operation may be performed.
  • the electronic switch device 1 has a connector 51 (see FIG. 2).
  • a cable 102 for transmitting a control signal from a control device (not shown) that controls the electronic musical instrument 100 is connected to the connector 51.
  • the electronic switch device 1 is supplied from the commercial AC power source to the electronic musical instrument 100 by a control signal (power management input) input from the electronic musical instrument 100 or another device such as an electronic timer device via the connector 51.
  • the power that has been supplied is configured to be cut off (off).
  • FIG. 2 is a circuit diagram showing the electronic switch device 1.
  • the electronic switch device 1 includes an AC input unit 2 connected to a commercial AC power source and an AC output unit 3 connected to the electronic musical instrument 100.
  • the AC input unit 2 includes a first input terminal 2a and a second input terminal 2b that is a common terminal on the commercial AC power supply side.
  • the AC output unit 3 includes a first output terminal 3a and a second output terminal 3b that is a common terminal on the power usage unit side.
  • a power line 4 a is wired between the first input terminal 2 a and the first output terminal 3 a, and this power line 4 a is used for power management input input via the operation switch 50 or via the connector 51. It is configured to be turned on or off by the open / close circuit 10 that is driven accordingly.
  • a power line 4b is wired between the second input terminal 2b and the second output terminal 3b.
  • the electronic switch device 1 is electrically operated by power supplied from the terminal 13a on the power line 4a and the terminal 13b on the power line 4b.
  • the terminal 13a is provided on the first input terminal 2a side of the power line 4a from the location where the switching circuit 10 is disposed, and is connected to a reference potential.
  • the electronic switch device 1 has an unlatched operation switch 50 and a transformer TR1.
  • the transformer TR1 includes a primary side coil L1 located on the commercial AC power source side and a secondary side coil L2 insulated from the primary side coil L1. Therefore, the high-voltage current supplied from the commercial AC power supply does not flow out to the secondary coil L2 side of the transformer TR1, and the user operates the operation switch provided on the secondary coil L2 side. 50 can be used safely.
  • the primary coil L1 constitutes a part of a resonance circuit 7 to be described later. Both ends of the secondary coil L ⁇ b> 2 are connected to the respective terminals of the operation switch 50, and are opened (opened) or short-circuited (shorted) when the operation switch 50 is pressed.
  • the oscillation circuit 6 when the secondary side coil L2 is opened, the oscillation circuit 6 performs blocking oscillation due to the presence of the resonance circuit 7 including the primary side coil L1, The blocking oscillation is stopped when the secondary coil L2 is short-circuited, and the switching circuit 10 is driven by using the presence or absence of the blocking oscillation so that the power line 4a is turned on or off. It is configured.
  • the electronic switch device 1 includes an AC / DC voltage conversion circuit 5, an oscillation circuit 6, a resonance circuit 7, a detection circuit 8, a latch circuit 9, a switching circuit 10, a push detection circuit 11, and a reset circuit. 12.
  • the AC / DC conversion circuit 5 is connected to a terminal 14a connected to the terminal 13a and a terminal 14b connected to the terminal 13b, respectively, and receives an AC voltage (for example, 70 to 290 V) supplied from a commercial AC power supply. For example, it is converted into a DC voltage of 10 V and supplied as an operating voltage to the subsequent oscillation circuit 6, resonance circuit 7, detection circuit 8, latch circuit 9, switching circuit 10, push detection circuit 11, and reset circuit 13.
  • the terminal 14a is set to the reference potential
  • the terminal 14b is set to the operating voltage (+ Vcc).
  • the oscillation circuit 6 includes four resistors R1 to R4, an electrolytic capacitor C1, two capacitors C2 and C5, a diode D1, a transistor Q1, and an oscillation unit G.
  • the circuit composed of the three resistors R2 to R4, the transistor Q1, and the oscillation unit G is a Colpitts oscillation circuit.
  • the oscillation unit is amplified by the transistor Q1 and positive feedback. G oscillates and outputs the oscillation signal from the emitter terminal of transistor Q1.
  • the oscillation part G is CERALOCK (registered trademark).
  • the internal circuit of the oscillation unit G includes a ceramic oscillator H and two capacitors C21 and C22.
  • the ceramic oscillator H and the capacitors C21 and C22 connected in series are in parallel. It is connected to the.
  • an oscillator having an oscillation frequency of 4 MHz is used as the oscillating unit G.
  • the oscillation frequency of the oscillating unit G is not particularly limited as long as blocking oscillation is caused by resonance with the resonance circuit 7 described later.
  • the transistor Q1 functions as an amplification stage for causing the oscillation unit G to oscillate, and is configured by a PNP transistor.
  • the emitter terminal of the transistor Q1 is connected to a connection point between the capacitor C21 and the capacitor C22 in the oscillation unit G, one end of the resistor R4, and one end of the capacitor C5.
  • the base terminal of the transistor Q1 is connected to a connection point between the ceramic oscillator H and the capacitor C22 in the oscillation unit G, and one end of each of the resistor R2 and the resistor R3.
  • the collector terminal of the transistor Q1 is connected to the other end of the resistor R3.
  • the other end of the resistor R2 is connected to a connection point between the ceramic oscillator H and the capacitor C21 in the oscillation unit G and one end of the capacitor C2.
  • the other end of the resistor R4 is connected to a connection point between the ceramic oscillator H and the capacitor C21 in the oscillation unit G.
  • the other end of the capacitor C2 is connected to one end of the resistor R1.
  • the end of the resistor R1 to which the capacitor C2 is connected is connected to the end of the resistor R3 to which the collector terminal of the transistor Q1 is connected.
  • the other end of the resistor R1 is connected to the negative side of the electrolytic capacitor C1.
  • the positive side of the electrolytic capacitor C1 is connected to + Vcc, and the end of the capacitor C2 to which the resistor R1 is not connected is connected.
  • the electrolytic capacitor C1 and the capacitor C2 function as a power supply smoothing capacitor.
  • the diode D1 is for preventing reverse current, the anode is connected to the negative side of the electrolytic capacitor C1, and the cathode is connected to the reference potential.
  • the other end of the capacitor C5 is connected to a resistor R8 of the detection circuit 8 described later.
  • the capacitor C5 is for removing the direct current component from the oscillation signal (blocking oscillation signal) oscillated from the oscillation circuit 6 and outputting the alternating current component to the detection circuit 8 at the subsequent stage.
  • the resonance circuit 7 is a circuit for causing blocking oscillation, which is parasitic intermittent oscillation, in the oscillation unit G of the oscillation circuit 6 described above, and includes the capacitor C3, the primary coil L1 of the transformer TR1, and the oscillation circuit described above. 6 transistors Q1.
  • One end of the capacitor C3 is connected to the emitter terminal of the transistor Q1, and the other end is connected in series to one end of the primary coil L1.
  • the other end of the primary coil L1 is connected to the base terminal of the transistor Q1.
  • the resonance circuit 7 is configured to oscillate at a resonance frequency (for example, about 250 kHz in the present embodiment) sufficiently lower than the oscillation frequency of the oscillation unit G (in the present embodiment, 4 MHz). Blocking oscillation can be stabilized by making the oscillation frequency of the resonance circuit 7 sufficiently lower than the oscillation frequency of the oscillation unit G.
  • the resonance frequency of the resonance circuit 7 is preferably set to be at least a fraction of the oscillation frequency of the oscillation unit G. Further, it is preferable to use a frequency at which the period of the blocking oscillation can be set so as not to affect the user of the electronic switch device 1 (for example, about several tens of kHz) as the resonance frequency of the resonance circuit 7.
  • the resonance frequency of the resonance circuit 7 is determined by the capacitance of the capacitor C3, and the inductor value of the primary coil L1 is set to be approximately the same as the inductor value appearing in the internal equivalent circuit of the oscillation unit G.
  • the inductor value of the primary coil L1 can be made smaller than the inductor value appearing in the internal equivalent circuit of the oscillation unit G.
  • the oscillation operation of the part G can be stopped, and the blocking oscillation can be stopped. Therefore, opening and short-circuiting of the secondary coil L2 in response to pressing of the operation switch 50 can be reflected in the presence or absence of blocking oscillation (that is, the presence or absence of the output of the blocking oscillation signal from the oscillation circuit 6).
  • the electronic switch device 1 of the present embodiment detects the presence or absence of a blocking oscillation signal output from the oscillation circuit 6 due to the presence of the resonance circuit 7 by the detection circuit 8 at the subsequent stage, and outputs the detection result (output from the detection circuit 8). Based on the switching circuit 10, the power line 4a is switched between conduction and interruption.
  • the resonance circuit 7 and causing blocking oscillation in the oscillation circuit 6 a sufficiently large voltage amplitude can be obtained compared to the voltage amplitude (wave height) of the normal oscillation (oscillation by the Colpitts oscillation circuit) of the oscillation circuit 6. Therefore, the detection of oscillation by the detection circuit 8 at the subsequent stage can be accurately performed.
  • the detection circuit 8 is composed of six resistors R8 to R13, a diode D2, a capacitor C7, and two transistors Q2 and Q3.
  • the detection circuit 8 is arranged in a subsequent stage according to the state of the output (blocking oscillation signal) from the oscillation circuit 6. This is a so-called flip-flop circuit that switches the output between high and low to the latch circuit 9.
  • the transistor Q2 is for switching on and off according to the oscillation signal output from the oscillation circuit 6, and is constituted by a PNP transistor.
  • the emitter terminal of the transistor Q2 is connected to + Vcc.
  • the base terminal of the transistor Q2 is connected to one end of each of the resistors R8 and R9 and the anode of the diode D2.
  • the collector terminal of the transistor Q2 is connected to the base terminal of the transistor Q6 constituting the push detection circuit 11 described later.
  • the other end of the resistor R9 is connected to + Vcc, and the other end of the resistor R8 is connected to the end of the capacitor C5 (oscillation circuit 6) on the side where the emitter terminal of the transistor Q1 is not connected.
  • the cathode of the diode D2 is connected to + Vcc.
  • the capacitor C7 is for delaying the response time of the detection circuit 8 when the AC input unit 2 is connected to a commercial AC power source (hereinafter referred to as “power-on”), and one end is set to + Vcc. The other end is connected to the collector terminal of the transistor Q2.
  • the transistor Q3 is for switching on and off depending on whether the transistor Q2 is on or off, and is configured by a PNP transistor.
  • the emitter terminal of transistor Q3 is connected to + Vcc.
  • the base terminal of the transistor Q3 is connected to one end of the resistor R10 and one end of the resistor R11.
  • the collector terminal of the transistor Q3 is connected to one end of the resistor R13.
  • the other end of the resistor R10 is connected to + Vcc.
  • the other end of the resistor R11 is connected to one end of the resistor R12 and to the collector terminal of the transistor Q2. Both the other end of R12 and the other end of R13 are connected to a reference potential.
  • + Vcc is divided according to the resistance R10 and the resistances R11 and R12.
  • the latch circuit 9 includes IC1, capacitors C9 and C10, and a resistor R14. Each time the output from the detection circuit 8 (the collector terminal of the transistor Q3) rises from low to high, the latch circuit 9 is based on the rising edge. The output to the open / close circuit 10 is inverted and the state of the output is maintained until the output from the detection circuit 8 rises from low to high next time.
  • IC1 is a logic IC configured as a positive edge trigger type D flip-flop, and is a terminal CK that is a clock terminal, a terminal D that is an input terminal, a terminal Q that is an output terminal, and an inverted output terminal. It has terminal QN. In synchronization with the rising edge of the clock signal input to the terminal CK, the input to the terminal D is latched (held), output from the terminal Q, and inverted from the terminal QN.
  • the terminal CK is connected to the collector terminal of the transistor Q3 in the detection circuit 8, and the output from the transistor Q3 is input as a clock signal.
  • a terminal QN is connected to the terminal D, and an inverted output output from the terminal QN is input to the terminal D.
  • the output from the detection circuit 8 more specifically, the output from the collector terminal of the transistor Q3 is low to high. Since the output from the terminal QN is low, the output from the terminal Q is inverted from high to low, and the output from the terminal QN is inverted from low to high. .
  • the output from the detection circuit 8 next rises from low to high, it is high that the signal being input from the terminal QN to the terminal D, so the output from the terminal Q is inverted from low to high, and the terminal The output from QN is inverted from high to low.
  • IC1 has a terminal CLR which is a clear terminal and a terminal PR which is a preset terminal.
  • the terminal CLR is connected to + Vcc
  • the terminal PR is a transistor Q4 constituting a reset circuit 12 which will be described later.
  • the reset circuit 12 is configured to output low for a predetermined period when the power is turned on (that is, when the AC input unit 2 is connected to the commercial AC power supply).
  • the D-type flip-flop when low is input to the terminal PR, the input has priority over the input to the terminal D or the terminal CK. Therefore, when the power is turned on, the output from the terminal Q is high. , The output from terminal QN is initialized to low.
  • IC1 has a terminal VCC and a terminal GND.
  • both the terminal Vcc and the terminal GND are connected to a wiring connecting + Vcc and the reference potential, whereby an operating voltage is applied to the IC1 and the IC1 is driven.
  • Each end of a capacitor C9 for noise prevention is connected between the terminal Vcc and the terminal GND.
  • One end of the resistor R14 is connected to the terminal PR, and the other end is connected to the reference potential.
  • the capacitor C10 is connected in parallel with the resistor R14. The capacitor C10 thus connected is charged when the AC input unit 2 is connected to a commercial AC power source, and is discharged when the AC input unit 2 and the commercial AC power source are removed. Therefore, it is possible to delay the input of the output from the transistor Q4 of the reset circuit 12 described later to the terminal PR during the period from when the power is turned on until the capacitor C10 is charged.
  • the switching circuit 10 is a circuit that switches between conduction and interruption of the power line 4a based on the output from the terminal Q of the latch circuit 9 or the output from the push detection circuit 11 described later (output from the emitter terminal of the transistor Q6). It is.
  • the switching circuit 10 includes five resistors R22 to R26, a transistor Q9, a diode D8, and a valve circuit 10a.
  • the transistor Q9 is for switching on and off according to the state of output from the terminal Q of the latch circuit 9 and the state of output from the push detection circuit 11 described later. Composed.
  • the emitter terminal of the transistor Q9 is connected to one end of the resistor R24.
  • the base terminal of the transistor Q9 is connected to one end of the resistor R23.
  • the collector terminal of the transistor Q9 is connected to the anode of the diode D8 for preventing reverse current.
  • the end of the resistor R24 to which the transistor Q9 is not connected is connected to one end of the resistor R22.
  • a connection point between the resistor R24 and the resistor R22 is connected to a connection point between the resistor R23 and the transistor Q9.
  • An end of the resistor R22 to which the resistor R24 is not connected is connected to the terminal Q of the latch circuit.
  • the end of the resistor R23 to which the transistor Q9 is not connected is connected to the emitter terminal of the transistor Q6 in the push detection circuit 11 described later.
  • the transistor Q9 and the resistors R22 to R24 wired as described above constitute priority means, and the push detection circuit 11 (transistor) regardless of whether the output of the latch circuit 9 (terminal Q of IC1) is high or low. If the output from the emitter terminal of Q6 is low, the transistor Q9 can be turned on.
  • the cathode of the diode D8 is connected to one end of the resistor R25, and the other end of the resistor R25 is connected to one end of the resistor R26.
  • the other end of the resistor R26 is connected between the gate electrodes of the two field effect transistors Q8 and Q10 in the valve circuit 10a.
  • the valve circuit 10a is a circuit that conducts the power line 4a when the transistor Q9 is on, and cuts off the power line 4a when the transistor Q9 is off, and includes two field effect transistors Q8 and Q10, a resistor R27, The capacitor C13, a Zener diode D7, and two coils L3 and L4 are included.
  • Electrolytic effect transistors Q8 and Q10 are each composed of a metal oxide type electrolytic effect transistor (MOS-FET).
  • MOS-FET metal oxide type electrolytic effect transistor
  • n-channel depletion type MOS-FETs are used as the field effect transistors Q8 and Q10.
  • These field effect transistors Q8 and Q10 are turned on by a current flowing from the transistor Q9 when the transistor Q9 is turned on.
  • the power line 4a becomes conductive, and power from the commercial AC power source connected via the AC input unit 2 is supplied to the electronic musical instrument 100 via the AC output unit 3. Can be supplied.
  • the gate electrode of the field effect transistor Q8 is connected to the gate electrode of the field effect transistor Q10, and the source electrode of the field effect transistor Q8 is connected to the source electrode of the field effect transistor Q10. That is, the field effect transistor Q8 and field effect transistor Q10 are connected in parallel.
  • the drain electrode of the field effect transistor Q8 is connected to one end of the coil L3, and the other end of the coil L3 is connected to the first input terminal 2a of the AC input unit 2 through the power line 4a.
  • the drain electrode of the field effect transistor Q10 is connected to one end of the coil L4, and the other end of the coil L4 is connected to the first output terminal 3a of the AC output unit 3 through the power line 4a.
  • the resistor R27 has one end connected to the gate electrodes of the field effect transistors Q8 and Q10 and the other end connected to the source electrode.
  • Capacitor C13 also has one end connected to the gate electrodes of field effect transistors Q8 and Q10 and the other end connected to the source electrode. Capacitor C13 functions to create a delay time for preventing malfunction when field effect transistors Q8 and Q10 are turned on.
  • the Zener diode D7 is for protecting the valve circuit 10a.
  • the cathode is connected to the gate electrodes of the field effect transistors Q8 and Q10, and the anode is connected to the source electrode.
  • the push detection circuit 11 is a circuit that detects whether or not the operation switch 50 is being pushed (operated), and includes one transistor Q6 and a part of the detection circuit 8 described above (transistor Q2, resistors R8 and R9). , Capacitor C7 and diode D2).
  • the transistor Q6 is for switching on and off according to the state of the output from the collector terminal of the transistor Q2 in the detection circuit 8, and is composed of a PNP transistor.
  • the emitter terminal of the transistor Q6 is connected to the end of the resistor R23 (part of the switching circuit 10) that is not connected to the transistor Q9, and the base terminal is connected to the collector terminal of the transistor Q2 in the detection circuit 8.
  • the collector terminal of transistor Q6 is connected to a reference potential.
  • the reset circuit 12 is a latch circuit when the power is turned on (that is, when the AC input unit 2 is connected to a commercial AC power supply) or when there is an input signal (power management input) from the control device of the electronic musical instrument 100.
  • 9 is a circuit for inputting low to 9 preset terminals (terminal PR).
  • the reset circuit 12 includes a transistor Q4, five resistors R15 to R19, a capacitor C11, a diode D6, and a photocoupler 12a.
  • the transistor Q4 is for switching on and off according to the state of the base terminal, and is composed of a PNP type transistor.
  • the emitter terminal of the transistor Q4 is connected to + Vcc, and the base terminal is connected to the emitter terminal of the phototransistor Q11 in the photocoupler 12a.
  • the collector terminal of the transistor Q4 is connected to the terminal PR of the latch circuit 9.
  • the resistor R17 has one end connected to the base terminal of the transistor Q4 and the other end connected to one end of the resistor R16.
  • the other end of the resistor R16 is connected to the anode of a backflow current preventing diode D6.
  • the cathode of the diode D6 is connected to one end of the resistor R15, and the other end of the resistor R15 is connected to the reference potential.
  • the resistor R18 has one end connected to the base terminal of the transistor Q4 and the other end connected to the emitter terminal of the transistor Q4.
  • the capacitor C11 is for delaying a period from when the AC input unit 2 is connected to a commercial AC power supply until high is output to the terminal PR (preset terminal) of the latch circuit 9, and one end of the capacitor C11 is a resistor.
  • R18 is connected to the side to which the emitter terminal of transistor Q4 is connected, and the other end is connected to the side of resistor R17 to which the base terminal of transistor Q4 is not connected.
  • the resistor R19 is connected in parallel with the capacitor C11.
  • the delay time by the capacitor C11 is designed to be longer than the delay time by the capacitor 10 of the latch circuit 9 described above.
  • the photocoupler 12a includes a light emitting diode D9 that is a light emitting element and a phototransistor Q11 that is a light receiving element.
  • the anode of the light emitting diode D9 is connected to the terminal 51a in the connector 51 to which the cable 102 is connected from the electronic musical instrument 100, and the cathode is connected to the terminal 51b.
  • the collector terminal of the phototransistor Q11 is connected to + Vcc, and the emitter terminal is connected to the base terminal of the transistor Q4 in the reset circuit 12.
  • the photocoupler 12a When there is a control signal input (power management input) from the control device of the electronic musical instrument 100 or another device, the photocoupler 12a emits light from the light emitting diode D9, and the light emission turns on the phototransistor Q11. Is output. As a result, the transistor Q4 of the reset circuit 12 is turned off, and a low is output from the collector terminal of the transistor Q4 to the terminal PR of the IC1 (latch circuit 9). Then, a high is output from the terminal Q of the IC1, and as a result, the field effect transistors Q8 and Q10 of the valve circuit 10a are turned off, and the power supply to the electronic musical instrument 100 is cut off (turned off).
  • FIG. 3 is a timing chart for explaining the operation of the electronic switch device 1.
  • (a) shows the state of AC input, and specifically indicates whether or not the AC input unit 2 is connected to a commercial AC power source.
  • (B) shows the operation state of the operation switch 50 (the state of the secondary coil L2 of the transformer TR1).
  • (C) is an output from the oscillation circuit 6 and shows a state at point A in FIG.
  • (D) is the output of the detection circuit 8, and shows the state of point B in FIG.
  • E) is the output of the latch circuit 9 and shows the state at point C in FIG.
  • (F) is an output of the push detection circuit 11 and shows the state of point D in FIG.
  • FIG. (G) is a power management input from the control device of the electronic musical instrument 100, and shows the state of point E in FIG. (H) is an output from the reset circuit 12, and shows the state of point F in FIG. (I) shows the state of the AC output.
  • power is supplied from the AC input unit 3 to the electronic musical instrument 100 (ie, ON) or is interrupted (ie, OFF). Indicate.
  • the reset circuit 12 Based on the operating voltage + Vcc, a current flows through the discharged capacitor C11, and electric charge is gradually stored in the capacitor C11. At this time, since the potentials of the base terminal and the emitter terminal of the transistor Q4 are equal, the transistor Q4 is turned off. As a result, the output at point F at time t0 is low.
  • the output from the reset circuit 12 to the latch circuit 9 is input to the terminal PR (preset terminal) of the IC1. Therefore, when low is input to the terminal PR of the IC1 at time t0, the output from the terminal Q of the IC1 is preferentially high. That is, the output from the terminal Q of the IC1 at the time t0, that is, the output at the point C is high.
  • the operating voltage + Vcc is divided by the resistor R2 and the resistor R3. Is done.
  • the transistor Q1 is turned on by the potential difference between the terminals of the resistor R2 due to this voltage division.
  • Blocking oscillation generated in the oscillation circuit 6 due to the presence of the resonance circuit 7 is input to the detection circuit 8.
  • the voltage amplitude is not sufficiently large in the initial stage of oscillation, and a sufficient potential difference does not occur between the resistors R8 and R9, so that the transistor Q2 is not turned on.
  • the capacitor C7 is discharged before the power is turned on, when the power is turned on (time t0), the potential difference between both ends of the resistors R10 and R11 becomes equal, and the transistor Q3 is turned off. Therefore, the state of point B at time t0 is low.
  • the time (delay time) from when the power is turned on until the predetermined amount of charge is stored in the capacitor C7 is detected by the detection circuit 8 after the blocking oscillation signal starts oscillating. It is set to be sufficiently larger than the time until the oscillation becomes sufficiently large (oscillation stabilization time). Therefore, after the power is turned on, the voltage amplitude of the blocking oscillation signal is sufficiently increased and the transistor Q2 is turned on before the transistor Q3 is turned on due to a predetermined amount of charge stored in the capacitor C7. Since C7 is discharged, the state of point B does not become high when the power is turned on.
  • the output from the detection circuit 8 to the latch circuit 9 is input to the terminal CK (clock terminal) of the IC 1 as a clock signal. Since the IC 1 of the latch circuit 9 is configured as a positive edge trigger type D-type flip-flop, the output from the terminal Q does not change when low is input to the terminal CK. Further, as described above, at time t0, low is input from the reset circuit 12 to the terminal PR of the IC1 and is preferentially initialized to high, so that the output from the latch circuit 9 to the switching circuit 10 at time t0. That is, the state of the point C becomes high.
  • the delay time due to the capacitor C7 is set sufficiently larger than the oscillation stabilization time, so that the voltage amplitude of the blocking oscillation signal becomes sufficiently large before the potential of the emitter terminal of the transistor Q6 is lowered.
  • Q2 turns on.
  • the potential of the base terminal of the transistor Q6 again approaches + Vcc, so that the potential of the emitter terminal of the transistor Q6 can be raised, and the state at the point D is also kept high.
  • the field effect transistors Q8 and Q10 are not turned on because the gate voltage (the voltage between the gate electrode and the source electrode) is 0V ( That is, it is off). Therefore, at time t0, the field effect transistors Q8 and Q10 are off, so that the power line 4a is not conducted (cut off), and the output from the AC output unit 3 is 0 V (ie, off).
  • the output of high from the reset circuit 12 to the terminal PR of the IC1 is delayed by the capacitor C11 after the power is turned on.
  • the power is turned on, low is input from the reset circuit 12 to the terminal PR.
  • the latch circuit 9 terminal Q of IC1
  • the operation switch 50 is not pressed, a low is not output from the push detection circuit 11 when the power is turned on due to a delay caused by the capacitor C7 of the detection circuit 8. Therefore, when the power is turned on without pressing down the operation switch 50, the power line 4a is not turned on, and the output from the AC output unit 3 can be always turned off.
  • the switching circuit 10 when the output from the latch circuit 9 is low and the output from the push detection circuit 11 is low, the potential difference between both terminals of the resistor R24 is larger than the base-emitter voltage of the transistor Q9. Thus, the transistor Q9 is turned on.
  • the output from the terminal Q does not change even if a falling edge from high to low is input to the terminal CK of the positive edge trigger type IC1. Therefore, the output from the latch circuit 9 to the switching circuit 10 at time t5, that is, the output at the point C remains low.
  • the transistor Q9 In the open / close circuit 10, when the output from the latch circuit 9 is low and the output from the push detection circuit 11 is high, the transistor Q9 is turned on due to a potential difference generated between both terminals of the resistor R24. That is, at time t5, the transistor Q9 remains on. As a result, the field effect transistors Q8 and Q10 of the valve circuit 10a also remain on, and power is continuously output from the AC output unit 3.
  • the transistor Q2 of the detection circuit 8 When the output from the oscillation circuit 6 falls below a predetermined level, the transistor Q2 of the detection circuit 8 is turned off, and accordingly, the transistor Q3 is turned on. Therefore, at time t7, the output from the detection circuit 8 to the latch circuit 9, that is, the state at the point B is switched from low to high.
  • the input to the terminal CK of the IC1 rises from low to high, and in synchronization with the rising edge, the output from the terminal Q of the IC1 is inverted and switched from low to high.
  • the output from the latch circuit 9 to the switching circuit 10 at time t7 that is, the output at the point C is switched from low to high.
  • the transistor Q9 In the open / close circuit 10, when the output from the latch circuit 9 is high and the output from the push detection circuit 11 is low, the transistor Q9 is turned on due to a potential difference generated between both terminals of the resistor R24. That is, at time t7, the transistor Q9 remains on. As a result, the field effect transistors Q8 and Q10 of the valve circuit 10a also remain on and the power is continuously output from the AC output unit 3.
  • the oscillation circuit 6 starts outputting blocking oscillation again.
  • the transistor Q2 of the detection circuit 8 is turned on, and accordingly, the transistor Q3 is turned off.
  • the output from the detection circuit 8 to the latch circuit 9, that is, the state of the point B is switched from high to low.
  • the input to the terminal CK of the IC1 falls from high to low, but even if a falling edge is inputted to the terminal CK, the output from the terminal Q does not change, so the output from the terminal Q does not change. Therefore, the output from the latch circuit 9 to the switching circuit 10 at time t9, that is, the output at the point C remains high.
  • the transistor Q9 is turned off.
  • the field effect transistor Q8 of the valve circuit 10a is turned off.
  • Q10 is turned off. Therefore, at time t9, the output from the AC output unit 3 is 0 V (that is, off).
  • the output from the oscillation circuit 6 is at a predetermined level at time t11 as a result of the secondary coil L2 being short-circuited, as in time t2. It becomes as follows. Therefore, at time t11, the output from the detection circuit 8 to the latch circuit 9, that is, the state of the point B is switched from low to high. As a result, the output from the terminal Q of the IC 1 in the latch circuit 9 is inverted. Therefore, at time t11, the output from the latch circuit 9 to the switching circuit 10 (the output at point C) is switched from high to low.
  • the transistor Q9 In the open / close circuit 10, when the output from the latch circuit 9 is low and the output from the push detection circuit 11 is high, the transistor Q9 is turned on. That is, at time 13, since the transistor Q9 remains on, the field effect transistors Q8 and Q10 of the valve circuit 10a also remain on. As a result, power is output from the AC output unit 3 ( That is, it remains on).
  • the control device (CPU) of the electronic musical instrument 100 performs power management input to the electronic switch device 100.
  • this power management input is input via the connector 51 at time t14, the phototransistor Q11 in the photocoupler 12a is turned on, whereby the input at point E is high.
  • the potential of the base terminal of the transistor Q4 becomes high, and the voltage applied between the base terminal and the emitter terminal of the transistor Q4 becomes lower than the base-emitter voltage of the transistor Q4.
  • the transistor Q4 is turned off. It becomes. Therefore, the output at point F at time t14 is low.
  • the transistor Q4 Since the transistor Q4 is turned off, a low input is made to the terminal PR of the IC1 in the latch circuit 9, so that the output from the terminal Q of the IC1 becomes preferentially high. Therefore, the output at point C at time t14 is high.
  • the output from the latch circuit 9 is high.
  • the operation switch 50 is not pressed, the output from the press detection circuit 11 is also high.
  • the transistor Q9 is turned off, and as a result, the field effect transistors Q8 and Q10 are turned off.
  • the output from the AC output unit 3 is turned off.
  • the operation waits for the operation switch 50 to be pressed, but waits with the output from the latch circuit 9 returned to high. Therefore, the next press of the operation switch 50 can be handled as a switch-on operation. Therefore, it is possible to prevent power from being supplied to the electronic musical instrument 100 even when the user presses the operation switch 50.
  • the electronic switch device 1 of the present embodiment by using the primary side coil L1 in the transformer TR1 as a coil in the resonance circuit 7, the presence / absence of operation of the operation switch 50 is changed to a blocking oscillation state.
  • the electric power from the commercial AC power supply can be supplied to or cut off from the electronic musical instrument 100.
  • the operation switch 50 is provided on the side of the secondary coil L2 insulated from the primary coil L1, even if an inexpensive operation switch component that does not comply with the safety standards of each country is used as the operation switch 50. , User safety can be ensured.
  • the electric wire connecting the secondary side coil L2 and the operation switch 50 is also expensive for high voltage.
  • An inexpensive electric wire can be used instead of a simple electric wire.
  • the length of the electric wire can be increased freely without considering radiation noise by being electrically insulated from the commercial AC power supply, the arrangement of the electronic switch device 1 and the operation switch 50 ( Layout) can be changed freely.
  • the electronic switch device 1 of the present embodiment after the power from the commercial AC power source to the electronic musical instrument 100 is cut off, the power can be supplied again by operating the mechanical operation switch 50. It is possible to eliminate the need for electric power to wait for an electrical switch input, thereby eliminating waste of power consumption.
  • the electronic switch device 1 of the present embodiment even if the oscillation circuit 6 is designed to save power by blocking the oscillation of the oscillation circuit 6 by providing the resonance circuit 7, the detection operation in the detection circuit 8 can be performed. A voltage amplitude sufficient to stabilize can be obtained.
  • the power from the commercial AC power source to the electronic musical instrument 100 is cut off (off) by the power management input from the control device of the electronic musical instrument 100 that is the power usage unit or other equipment. Therefore, useless power is not consumed when the electronic musical instrument 100 is not used.
  • the operation switch 50 is an unlatch type switch, and unlike the latch type switch, the state is fixed even when it is not operated until the next operation is performed. Since both ends of the secondary coil L2 are opened, if the power is cut off by the power management input from the control device of the electronic musical instrument 100, the power can be cut off reliably.
  • the input for turning off the electronic switch device 100 from the electronic musical instrument 100 is not limited to the power management input that is output when not in use, and various inputs can be applied according to the design of the electronic musical instrument 100.
  • both ends of the secondary coil L2 of the transformer TR1 are always opened when not operated. Therefore, when power is interrupted by the power management input input from the electronic musical instrument 100, the power can be reliably interrupted, and the power management input is performed, depending on the state of the operation switch 50. It is possible to prevent the power from being unnecessarily consumed without being shut off.
  • the latch circuit 9 (IC1 of the IC1) is output every time the output from the detection circuit 8 rises twice. The output from terminal Q) is restored. Therefore, the output of the latch circuit 9 can distinguish between an operation for switching on and an operation for switching off in an unlatch type switch.
  • An unlatch type switch can be used as the operation switch 50.
  • the electronic switch device 1 of the present embodiment from when the power is turned on (the AC input unit 2 is connected to the commercial AC power supply) until high is output to the terminal PR (preset terminal) of the latch circuit 9. Since the reset circuit 12 has the capacitor C11 for delaying the period, a low is always output to the terminal PR of the latch circuit 9 when the power is turned on. Therefore, when the power is turned on, high is output from the terminal Q of the latch circuit 9, so that power is not supplied from the AC output unit 3 unless the operation switch 50 is operated. This can prevent the electronic musical instrument 100 from being unintentionally driven when the AC input unit 2 is connected to a commercial AC power supply.
  • the output from the press detection circuit 11 (the output at point D) is always low. If the output from the push detection circuit 11 is low, the resistors R23 to R24 and the transistor Q9 cause the transistor Q9 to be in whatever state the output from the latch circuit 9 (the output at point C) is. As a result, the field effect transistors Q8 and Q10 of the valve circuit 10a are turned on, and power can be output from the AC output unit 3. Therefore, the electronic musical instrument 100 can be driven when the power is turned on by turning on the power while pressing (operating) the operation switch 50 (that is, connecting the AC input unit 2 to the commercial AC power).
  • the present invention has been described based on the embodiment, but the present invention is not limited to the above-described embodiment, and various modifications can be easily made without departing from the gist of the present invention. It can be done.
  • an unlatch type switch is used as the operation switch 50, but a latch type switch may be used.
  • the oscillation circuit 6 is configured as a Colpitts oscillation circuit.
  • other types of oscillation circuits for example, a Hartley oscillation circuit
  • the ceramic oscillator H may be another type of oscillator such as a crystal oscillator.
  • the resonance circuit 7 is configured such that each end of the primary coil L1 and the capacitor C3 connected in series is connected to the emitter terminal and the base terminal of the transistor Q1, but the primary coil L1 is Another form of circuit that includes at least the coil and can generate blocking oscillation in the oscillation circuit 6 may be used.
  • the detection circuit 8 is configured to output the detection result as a binary value to the latch circuit 9.
  • an analog amount based on the voltage amplitude of the blocking oscillation is directly output from the detection circuit 8 to the switching circuit 10.
  • the switching circuit 10 may be configured to provide a threshold value so as to switch between conduction and interruption.
  • the oscillation circuit 6 and the resonance circuit 7 including the primary coil L1 and the capacitor C3 are provided, and the oscillation by the resonance circuit 7 causes blocking oscillation to the oscillation circuit 6 (the oscillation unit G).
  • the circuit before the point A that is, the circuit that outputs a signal to the detection circuit 8) oscillates when the secondary coil L2 is open. If the configuration is such that the oscillation stops when the secondary coil is short-circuited (or the oscillation voltage amplitude is not detected by the detection circuit 8 at the subsequent stage), it can be applied to the electronic switch device 1.
  • FIG. 4 is a circuit diagram showing an oscillation circuit 60 as a modification.
  • the oscillation circuit 60 components having the same functions as those of the oscillation circuit 6 (see FIG. 1) described above are denoted by the same reference numerals, and description thereof is omitted.
  • the oscillation circuit 60 shown in FIG. 4 includes five resistors R1, R51 to R54, an electrolytic capacitor C1, five capacitors C2, C5, C51, C52, and C103, two PNP transistors Q51 and Q52, and a primary It is comprised from the side coil L1.
  • the oscillation circuit 60 is provided in the electronic switch device 1 of FIG. 1 described above in place of the oscillation circuit 6 and the resonance circuit 7. Specifically, the emitter terminal of the transistor Q52 is connected to the cathode (ie, + Vcc) of the diode D2 in the detection circuit 8. Further, the end of the capacitor C5 that is not connected to the collector terminal of the transistor Q52 (that is, the end on the A point side) is connected to the end of the resistor R8 that is not connected to the base terminal of the transistor Q2.
  • a circuit constituted by four resistors R51 to R54, two capacitors C51 and C52, and two transistors Q51 and Q52 is an astable multivibrator oscillation circuit.
  • one end of the capacitor C103 is connected to the collector terminal of the transistor Q51 in this unstable multivibrator oscillation circuit, and the other end of the capacitor C103 is connected to one end of the primary coil L1.
  • the other end of primary side coil L1 is connected to the collector terminal of transistor Q52.
  • the oscillation circuit 60 When the secondary coil L2 is opened, the oscillation circuit 60 having such a configuration can generate an oscillation signal generated by the unstable multivibrator oscillation circuit (transistors Q51 and Q52, resistors R51 to R54, capacitors C51 and C52) as A. Output from the point.
  • the unstable multivibrator oscillation circuit transistors Q51 and Q52, resistors R51 to R54, capacitors C51 and C52
  • the unstable multi-phase in the oscillation circuit 60 is reduced due to the decrease in the inductor value of the primary coil L1. The oscillation of the vibrator oscillation circuit stops.
  • the state of the output from the oscillation circuit 60 (input to the detection circuit 8) changes to reflect the state (open or shorted) of both ends of the secondary coil L2 in response to pressing of the operation switch 50. Therefore, the oscillation circuit 60 can be applied as a configuration of the electronic switch device 1 that replaces the oscillation circuit 6 and the resonance circuit 7. When such an oscillation circuit 60 is used, the oscillation circuit can be configured at a lower cost than the oscillation circuit 6 including the ceramic oscillator H.
  • the oscillation means and the detection means may be configured by the primary coil L1 and the one-chip microcomputer. That is, a configuration may be adopted in which oscillation and detection of the oscillation are performed by a one-chip microcomputer.
  • the detection circuit 8 is exemplified by a flip-flop circuit including six resistors R8 to R13, a diode D2, a capacitor C7, and two transistors Q2 and Q3. May be.
  • the IC 1 of the latch circuit 9 may be of a negative edge trigger type.
  • valve circuit 10a in the switching circuit 10 is configured to use MOS-FETs (electrolytic effect transistors Q8, Q10) as components for switching between conduction and interruption of the power line 4a.
  • MOS-FETs electrolytic effect transistors Q8, Q10
  • IGBT insulating gate bipolar transistor
  • the circuit is configured using a PNP transistor as the transistor, but the circuit may be configured using an NPN transistor.
  • the electronic switch apparatus 1 of the said embodiment shall switch supply and interruption
  • DC power supply is used as a power supply source, and this DC power supply
  • the power supply unit may be configured to switch between supply and interruption of power, and in such a case, the same effect as the electronic switch device 1 of the above embodiment can be obtained.

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  • Electronic Switches (AREA)

Abstract

Provided is an electronic switch device which can freely use even a switch component which does not satisfy the safety specifications of each country as a switch component operated by a user for switching power supply to an electronic apparatus from a commercial line source on or off. An oscillation means oscillates upon opening of both ends of a secondary side coil by an operation switch. When both ends of the secondary side coil are short-circuited, oscillation stops as a result of a decrease in the inductor value of a primary side coil, and therefore, the state of both ends of the secondary side coil is reflected upon the output modality of the output from the oscillation means. As a result, by being based on such output modality, connection or interruption of a power supply path can be performed according to the operational state of the operation switch. Here, the secondary side coil to which the operation switch is connected is insulated from the primary side coil, and therefore, even if a switch component which does not satisfy the safety specifications of each country is used as the operation switch, it is possible to secure safety of the user operating the operation switch.

Description

電子スイッチ装置Electronic switch device
 本発明は電子スイッチ装置に関し、特に、商用交流電源などの電力供給源から電子機器への電力供給をオン又はオフするためのスイッチ部品として安全規格とは無関係に各種の機械式スイッチ部品を利用可能な電子スイッチ装置に関する。 The present invention relates to an electronic switch device, and in particular, various mechanical switch parts can be used regardless of safety standards as a switch part for turning on / off power supply from an electric power supply source such as a commercial AC power source to an electronic device. The present invention relates to an electronic switch device.
 電子機器が商用交流電源から電力を取る場合には、ケーブルから放射される電磁ノイズや高電圧による感電や漏電に対する対策を取る必要がある。例えば、特許文献1には、電源操作スイッチと電源ユニットのスイッチ部とを、電源操作スイッチの押操作によって電源ユニットのスイッチ部を押下できるように連結部材によって機械的に連結した電源スイッチ機構が記載されている。 When an electronic device takes power from a commercial AC power source, it is necessary to take measures against electric shock and leakage due to electromagnetic noise radiated from the cable and high voltage. For example, Patent Document 1 describes a power switch mechanism in which a power operation switch and a switch unit of a power supply unit are mechanically connected by a connecting member so that the switch unit of the power supply unit can be pressed by pressing the power operation switch. Has been.
 かかる電源スイッチ機構によれば、機器の背面側に電源を設けつつ、操作者により操作される電源操作ボタンを機器の前面に設けることができるので、電源ユニットのスイッチ部をケーブルによって機器の前面側まで延ばす必要がなく、よって、機器内のケーブルを短くすることができ、電磁ノイズを低減できるというものである。 According to such a power switch mechanism, a power operation button operated by an operator can be provided on the front surface of the device while power is provided on the back surface side of the device. Therefore, the cable in the device can be shortened and electromagnetic noise can be reduced.
特開平6-162871号公報Japanese Patent Laid-Open No. 6-162871
 ところで、商用交流電源から電子機器への電力供給をオン又はオフするためのスイッチとして機械式のスイッチ部品を用いる場合には、使用する機械式のスイッチ部品が、その電子機器を使用する国に応じた安全規格を満たしている必要があり、当該安全規格を満たす機械式スイッチは、高電圧に対して当然十分に安全であるものの、構造的に大きく、価格も高価である。 By the way, when a mechanical switch component is used as a switch for turning on or off power supply from a commercial AC power supply to an electronic device, the mechanical switch component to be used depends on the country in which the electronic device is used. However, a mechanical switch that satisfies the safety standard is sufficiently safe against high voltages, but is structurally large and expensive.
 特許文献1に記載される電源スイッチ機構は、電源操作ボタンと電源ユニットのスイッチ部とが機械的に連結されているので、電源操作ボタンとして安全規格を満たすものを使用する必要はないが、電源操作ボタンと電源ユニットとの互いの配置の自由度が低かったり、構造的に大きくなってしまう。一方で、電源ユニットのスイッチ部を、電磁遮蔽性の高いケーブルを用いて電源ユニットから延ばすとしても、商用交流電源からの電圧が印加される当該スイッチ部は安全規格を満たす必要があるため、配置の自由度が高まる代わりに上記の問題を生じる。 In the power switch mechanism described in Patent Document 1, since the power operation button and the switch unit of the power unit are mechanically connected, it is not necessary to use a power operation button that satisfies safety standards. The degree of freedom of mutual arrangement of the operation button and the power supply unit is low or structurally large. On the other hand, even if the switch part of the power supply unit is extended from the power supply unit using a cable with high electromagnetic shielding properties, the switch part to which the voltage from the commercial AC power supply needs to satisfy the safety standard. The above problem is caused instead of increasing the degree of freedom.
 本発明は、上述した事情等に鑑みてなされたものであり、商用交流電源などの電力供給源から電子機器への電力供給をオン(導通)又はオフ(遮断)するために使用者が操作するスイッチ部品として、各国の安全規格を満たさない機械式のスイッチ部品であっても自在に利用可能な電子スイッチ装置を提供することを目的としている。 The present invention has been made in view of the above-described circumstances and the like, and is operated by a user to turn on (conduct) or turn off (shut off) power supply from a power supply source such as a commercial AC power source to an electronic device. An object of the present invention is to provide an electronic switch device that can be used freely even if it is a mechanical switch component that does not meet the safety standards of each country.
課題を解決するための手段および発明の効果Means for Solving the Problems and Effects of the Invention
 この目的を達成するために、請求項1記載の電子スイッチ装置によれば、所定周波数で発振する発振手段が設けられている。この発振手段は、トランスにおける一次側コイルを含んでいるので、操作スイッチが二次側コイルの両端を開放している場合に発振する一方で、トランスの二次側コイルの両端が操作スイッチによって短絡された場合には、該一次側コイルのインダクタ値が減少することにより発振動作が阻害されて発振が停止する。 In order to achieve this object, according to the electronic switch device of the first aspect, the oscillating means for oscillating at a predetermined frequency is provided. Since this oscillating means includes a primary coil in the transformer, it oscillates when the operation switch opens both ends of the secondary coil, while both ends of the secondary coil of the transformer are short-circuited by the operation switch. In this case, the inductor value of the primary side coil decreases, so that the oscillation operation is hindered and the oscillation stops.
 また、請求項3記載の電子スイッチ装置によれば、所定周波数で発振する発振部を備えた発振手段が設けられている。一方、コイル(トランスにおける一次側コイル)を有する共振手段が設けられており、操作スイッチが二次側コイルの両端を開放している場合に、その共振手段が、発振手段の発振部にブロッキング発振(寄生の間欠発振)を生じさせる。その一方で、トランスの二次側コイルの両端が操作スイッチによって短絡された場合には、該トランジスタの一次側コイルのインダクタ値が減少し、それに伴い、発振手段(発振部)の発振動作が阻害されて発振が停止する。 According to the electronic switch device of the third aspect, the oscillating means including the oscillating unit that oscillates at a predetermined frequency is provided. On the other hand, when a resonance means having a coil (primary side coil in a transformer) is provided and the operation switch opens both ends of the secondary side coil, the resonance means blocks the oscillation of the oscillation means. (Parasitic intermittent oscillation) is generated. On the other hand, when both ends of the secondary coil of the transformer are short-circuited by the operation switch, the inductor value of the primary coil of the transistor decreases, and accordingly, the oscillation operation of the oscillation means (oscillation unit) is obstructed. The oscillation stops.
 このように、請求項1又は3に記載の電子スイッチ装置によれば、操作スイッチが二次側コイルの両端を開放したか短絡したかが、発振手段からの出力(特に、請求項3記載の電子スイッチ装置の場合には、発振手段からの出力であるブロッキング発振)の発振態様に反映されるので、その発振態様を検出手段により検出することによって、操作スイッチの状態を区別することができる。よって、検出手段の検出結果に基づくことにより、切換手段による、電力供給源から電力使用部への電力供給路(以下、単に「電力供給路」と称す)の導通と遮断との切り換えを、操作スイッチの操作状態に応じて行うことができるという効果がある。 Thus, according to the electronic switch device according to claim 1 or 3, whether the operation switch opens or short-circuits both ends of the secondary side coil depends on the output from the oscillation means (particularly, according to claim 3). In the case of an electronic switch device, it is reflected in the oscillation mode (blocking oscillation, which is an output from the oscillation means), so that the state of the operation switch can be distinguished by detecting the oscillation mode by the detection means. Therefore, based on the detection result of the detection means, the switching means switches between conduction and interruption of the power supply path (hereinafter simply referred to as “power supply path”) from the power supply source to the power usage unit. There is an effect that it can be performed according to the operation state of the switch.
 また、請求項1又は3に記載の電子スイッチ装置によれば、操作スイッチが接続される二次側コイルは、一次側コイルに対して絶縁されているので、世界各国の安全規格を満たさないスイッチ部品を操作スイッチとして使用したとしても、操作スイッチを操作する使用者の安全を確保することができるという効果がある。また、世界各国の安全規格を満たさないスイッチ部品であっても操作スイッチとして使用できるので、操作スイッチ部分のコストを安価に抑えることができるという効果がある。 In addition, according to the electronic switch device according to claim 1 or 3, since the secondary side coil to which the operation switch is connected is insulated from the primary side coil, the switch does not satisfy the safety standards of countries around the world. Even if a component is used as an operation switch, it is possible to ensure the safety of the user who operates the operation switch. In addition, even switch parts that do not meet the safety standards of countries around the world can be used as operation switches, so that there is an effect that the cost of the operation switch part can be reduced.
 また、請求項1又は3に記載の電子スイッチ装置によれば、操作スイッチが接続される二次側コイルと、一次側コイルとが絶縁されていることにより、二次側コイルと操作スイッチとを接続する電線も、高電圧用の高価な電線でなく安価な電線を使用することができるという効果がある。また、輻射ノイズを考慮することなく電線の長さを自在に長くすることができるので、操作スイッチの取り付け位置を自由に配置することが可能になるという効果がある。 According to the electronic switch device of the first or third aspect, the secondary side coil and the operation switch are connected by isolating the secondary side coil to which the operation switch is connected and the primary side coil. The electric wires to be connected also have an effect that an inexpensive electric wire can be used instead of an expensive electric wire for high voltage. In addition, since the length of the electric wire can be freely increased without considering radiation noise, there is an effect that it is possible to freely dispose the operation switch mounting position.
 請求項2記載の電子スイッチ装置によれば、請求項1記載の電子スイッチ装置の奏する効果に加えて、次の効果を奏する。上述した通り、操作スイッチが二次側コイルの両端を開放している場合には、発振手段が発振する一方で、該二次側コイルの両端が操作スイッチによって短絡された場合には、該発振手段の発振が停止する。このように、操作スイッチが二次側コイルの両端を開放したか短絡したかは、発振手段からの出力の電圧振幅に反映される。 According to the electronic switch device of the second aspect, in addition to the effect of the electronic switch device of the first aspect, the following effect can be obtained. As described above, when the operation switch opens both ends of the secondary coil, the oscillation means oscillates. On the other hand, when both ends of the secondary coil are short-circuited by the operation switch, the oscillation occurs. The means stops oscillating. In this way, whether the operation switch opens or shorts both ends of the secondary coil is reflected in the voltage amplitude of the output from the oscillating means.
 ここで、発振手段からの出力の電圧振幅が所定値を超えていれば、ハイ又はローのうち予め規定されている第1状態が検出手段から出力され、該出力の電圧振幅が所定値以下であれば、第1状態とは異なる第2状態が検出手段から出力される。よって、検出手段からの出力が第1状態であるか、第2状態であるかに応じて、切換手段は、操作スイッチの状態を区別することができる。従って、検出手段からの出力に基づくことにより、切換手段による電力供給路の導通と遮断との切り換えを、操作スイッチの操作状態に応じて行うことができるという効果がある。 Here, if the voltage amplitude of the output from the oscillating means exceeds a predetermined value, the first state defined in advance as high or low is output from the detecting means, and the voltage amplitude of the output is less than the predetermined value. If there is, a second state different from the first state is output from the detection means. Therefore, the switching means can distinguish the state of the operation switch depending on whether the output from the detection means is the first state or the second state. Therefore, based on the output from the detection means, there is an effect that the switching of the power supply path by the switching means can be switched according to the operating state of the operation switch.
 請求項4記載の電子スイッチ装置によれば、請求項3記載の電子スイッチ装置の奏する効果に加えて、次の効果を奏する。発振手段は、発振部に加え、該発振部を発振させるためのトランジスタを有しており、該トランジスタにおける発振信号が出力されるエミッタと、ベースとの間に、共振手段におけるコイル(トランスにおける一次側コイル)とコンデンサとを直列接続したものが設けられる。 According to the electronic switch device of the fourth aspect, in addition to the effect produced by the electronic switch device according to the third aspect, the following effect is obtained. In addition to the oscillating unit, the oscillating unit includes a transistor for oscillating the oscillating unit. Between the emitter from which an oscillation signal is output from the transistor and the base, a coil in the resonance unit (primary in the transformer) is provided. Side coil) and a capacitor are connected in series.
 上述した通り、操作スイッチが二次側コイルの両端を開放している場合には、共振手段が、発振手段の発振部にブロッキング発振を生じさせる一方で、該二次側コイルの両端が操作スイッチによって短絡された場合には、発振手段(発振部)の発振が停止する。このように、操作スイッチが二次側コイルの両端を開放したか短絡したかは、発振手段からの出力、即ち、ブロッキング発振の電圧振幅に反映される。 As described above, when the operation switch opens both ends of the secondary coil, the resonance unit causes blocking oscillation in the oscillation unit of the oscillation unit, while both ends of the secondary coil are operated by the operation switch. When short-circuited by, oscillation of the oscillating means (oscillating unit) stops. In this way, whether the operation switch opens or shorts both ends of the secondary coil is reflected in the output from the oscillation means, that is, the voltage amplitude of blocking oscillation.
 ここで、発振手段からの出力の電圧振幅(ブロッキング発振の電圧振幅)が所定値を超えていれば、ハイ又はローのうち予め規定されている第1状態が検出手段から出力され、該出力の電圧振幅が所定値以下であれば、第1状態とは異なる第2状態が検出手段から出力される。よって、検出手段からの出力が第1状態であるか、第2状態であるかに応じて、切換手段は、操作スイッチの状態を区別することができる。従って、検出手段からの出力に基づくことにより、切換手段による電力供給路の導通と遮断との切り換えを、操作スイッチの操作状態に応じて行うことができるという効果がある。 Here, if the voltage amplitude of the output from the oscillation means (voltage amplitude of the blocking oscillation) exceeds a predetermined value, the first state defined in advance as high or low is output from the detection means, and the output If the voltage amplitude is less than or equal to a predetermined value, a second state different from the first state is output from the detection means. Therefore, the switching means can distinguish the state of the operation switch depending on whether the output from the detection means is the first state or the second state. Therefore, based on the output from the detection means, there is an effect that the switching of the power supply path by the switching means can be switched according to the operating state of the operation switch.
 また、ブロッキング発振が生じることにより、省電力であっても大きな電圧振幅を得ることができるので、電子スイッチ装置を省電力に構成しつつも、検出手段による検出精度を上げることができ、切換手段による電力供給路の導通と遮断との切り換えを精度良く行うことができるという効果がある。 Moreover, since a large voltage amplitude can be obtained even with power saving due to the occurrence of blocking oscillation, the detection accuracy by the detecting means can be increased while the electronic switch device is configured to save power, and the switching means There is an effect that switching between conduction and interruption of the power supply path can be performed with high accuracy.
 請求項5記載の電子スイッチによれば、請求項2又は4に記載の電子スイッチの奏する効果に加え、次の効果を奏する。操作スイッチがアンラッチ型のスイッチである場合には、電力供給路を導通するとき(即ち、スイッチオン)の操作であっても、電力供給路を遮断するとき(即ち、スイッチオフ)の操作であっても、検出手段からの出力は第2状態となるので、該検出手段からの出力では、操作スイッチが、スイッチオンのために操作されたのか、スイッチオフのために操作されたのかを区別することができない。 According to the electronic switch according to claim 5, in addition to the effect produced by the electronic switch according to claim 2 or 4, the following effect is obtained. When the operation switch is an unlatched switch, even when the power supply path is turned on (ie, switch on), the operation is performed when the power supply path is shut off (ie, switch off). However, since the output from the detection means is in the second state, the output from the detection means distinguishes whether the operation switch is operated for switching on or for switching off. I can't.
 しかし、請求項5記載の電子スイッチ装置によれば、検出手段からの出力によるラッチ手段の入力が第1状態から第2状態に切り換わる毎に、ラッチ手段が出力の状態を反転させてラッチするように構成されているので、ラッチ手段からの出力状態は、操作スイッチを2回操作する毎に同じ状態に戻ることになる。よって、ラッチ手段の出力からは、アンラッチ型のスイッチにおけるスイッチオンのために操作と、スイッチオフのための操作とを区別することができるので、操作スイッチとしてアンラッチ型のスイッチを用いた場合であっても、電力供給路の導通と遮断とを使用者の意図(即ち、操作)に応じて切り換えることができるという効果がある。 However, according to the electronic switch device of the fifth aspect, every time the input of the latch means by the output from the detecting means is switched from the first state to the second state, the latch means inverts and latches the output state. Thus, the output state from the latch means returns to the same state every time the operation switch is operated twice. Therefore, since the output of the latch means can distinguish between the operation for turning on the switch in the unlatch type switch and the operation for turning off the switch, this is the case where an unlatch type switch is used as the operation switch. However, there is an effect that it is possible to switch between conduction and interruption of the power supply path according to the user's intention (that is, operation).
 ところで、ラッチ型のスイッチ部品を用いた場合、制御手段による制御によって電力供給路を遮断したとしても、切り忘れ等の理由により、スイッチ部品が電力供給路を導通させるスイッチ位置で固定されていれば、電力供給路が導通されたままとなり、電力供給路を遮断できない。しかし、請求項5記載の電子スイッチ装置によれば、操作スイッチがアンラッチ型のスイッチであるので、非操作時にはトランスの二次側コイルの両端が必ず開放されている。よって、制御手段による制御によって電力供給路を遮断すれば、電力供給路を確実に遮断することができるので、電力を無駄に消費させないという効果がある。 By the way, when using a latch-type switch component, even if the power supply path is shut off by control by the control means, if the switch component is fixed at the switch position for conducting the power supply path for reasons such as forgetting to cut, The power supply path remains conductive, and the power supply path cannot be shut off. However, according to the electronic switch device of the fifth aspect, since the operation switch is an unlatch type switch, both ends of the secondary coil of the transformer are always opened when not operated. Therefore, if the power supply path is interrupted by control by the control means, the power supply path can be reliably interrupted, so that there is an effect that power is not consumed wastefully.
 請求項6記載の電子スイッチ装置によれば、請求項5記載の電子スイッチ装置の奏する効果に加え、次の効果を奏する。制御入力手段から入力された制御信号に基づき、ラッチ手段における所定の入力端子への出力状態が、初期化手段により、ハイ又はローのうち予め規定されている第3状態とは異なる第4状態から、該第3状態に切り換えられる。ここで、初期化手段からの出力が入力されるラッチ手段の入力端子は、第3状態が入力された場合に、出力状態を優先的に切換手段が電力供給路を遮断する状態とするものであるので、制御入力手段から入力された制御信号に基づき、電力供給路を遮断できる。 According to the electronic switch device of the sixth aspect, in addition to the effect produced by the electronic switch device according to the fifth aspect, the following effect can be obtained. Based on the control signal inputted from the control input means, the output state to the predetermined input terminal in the latch means is changed from the fourth state different from the predetermined third state of high or low by the initialization means. To the third state. Here, the input terminal of the latch unit to which the output from the initialization unit is input is a state in which the switching unit preferentially shuts off the power supply path when the third state is input. Therefore, the power supply path can be cut off based on the control signal input from the control input means.
 よって、制御入力手段から入力される制御信号によって、電力供給路を自動的に遮断させることができるという効果がある。そのため、電力使用部(電子楽器など)や他の機器(電子タイマ装置など)の都合に応じて制御入力手段へ制御信号を出力し、その制御信号を該制御入力手段から入力させることによって電力供給路を遮断させることができるので、電力使用部の不使用時などに無駄な電力が供給されないようにすることが可能となる。 Therefore, there is an effect that the power supply path can be automatically cut off by the control signal input from the control input means. Therefore, power is supplied by outputting a control signal to the control input means according to the convenience of the power usage unit (electronic musical instrument, etc.) or other equipment (electronic timer device, etc.) and inputting the control signal from the control input means. Since the road can be cut off, it is possible to prevent wasteful power from being supplied when the power usage unit is not used.
 また、制御入力手段からの入力に基づき、ラッチ手段からの出力状態が、切換手段が電力供給路を遮断する状態にされるので、スイッチオフ(電力供給路の遮断)の目的で操作スイッチを操作したときと同等の状態にすることができる。よって、次に行われる操作スイッチの操作を、スイッチオン(電力供給路の導通)の操作として扱うことができ、制御入力手段からの入力に基づいて電力供給路を遮断した後に、使用者が操作スイッチを操作したにもかかわらず、意図に反して電子使用部が駆動しないという事態を避けることができるという効果がある。 Also, based on the input from the control input means, the output state from the latch means is changed to the state where the switching means shuts off the power supply path, so that the operation switch is operated for the purpose of switching off (cutting off the power supply path). It can be in the same state as when it was done. Therefore, the operation of the next operation switch can be treated as a switch-on (power supply path conduction) operation. After the power supply path is shut off based on the input from the control input means, the user can operate Even though the switch is operated, there is an effect that it is possible to avoid a situation in which the electronic use unit does not drive against the intention.
 請求項7記載の電子スイッチ装置によれば、請求項5又は6に記載の電子スイッチ装置の奏する効果に加え、次の効果を奏する。第2初期化手段はコンデンサと出力手段とを有している。第2初期化手段のコンデンサは、コネクタが電力供給源に接続されると電荷が蓄電され、該コネクタが電力供給源から取り外されると放電するように構成されている。コンデンサの電荷量が所定量以下である場合には、第2初期化手段の出力手段により、ハイ又はローのうち予め規定されている第3状態がラッチ手段の所定の入力端子へ出力される一方で、コンデンサの電荷量が所定量を超える場合には、第3状態とは異なる第4状態が同入力端子へ出力される。 According to the electronic switch device according to claim 7, in addition to the effect exhibited by the electronic switch device according to claim 5 or 6, the following effect is exhibited. The second initialization means has a capacitor and output means. The capacitor of the second initialization means is configured to store charges when the connector is connected to the power supply source and to discharge when the connector is removed from the power supply source. When the charge amount of the capacitor is equal to or less than the predetermined amount, the output unit of the second initialization unit outputs the third state defined in advance as high or low to the predetermined input terminal of the latch unit. When the charge amount of the capacitor exceeds a predetermined amount, a fourth state different from the third state is output to the same input terminal.
 よって、コネクタが電力供給源から取り外されてコンデンサが放電された状態から、該コネクタを電力供給源に接続した場合には、コンデンサに所定量の電荷が蓄電されるまでの期間において、第2初期化手段の出力手段から、第3状態(ハイ又はローのいずれか)を出力させることができる。ここで、第2初期化手段からの出力が入力されるラッチ手段の入力端子は、第3状態が入力された場合に、出力状態を優先的に切換手段が電力供給路を遮断する状態にするものであるので、コネクタが電力供給源に接続された当初(コンデンサに所定量の電荷が蓄電されるまでの期間)において、電力供給路を遮断させることができる。そのため、コネクタを電力供給源に接続したときに、意図せず電力供給路が導通されて電力使用部が駆動してしまうことを防止できるという効果がある。 Therefore, when the connector is disconnected from the power supply source and the capacitor is discharged, and when the connector is connected to the power supply source, the second initial initial charge is stored until a predetermined amount of charge is stored in the capacitor. The third state (either high or low) can be output from the output means of the conversion means. Here, the input terminal of the latch means to which the output from the second initialization means is inputted, when the third state is inputted, the output means is preferentially switched to the state in which the switching means shuts off the power supply path. Therefore, the power supply path can be shut off at the beginning of the connection of the connector to the power supply source (the period until a predetermined amount of charge is stored in the capacitor). Therefore, there is an effect that, when the connector is connected to the power supply source, it is possible to prevent the power supply path from being conducted unintentionally and driving the power use unit.
 請求項8記載の電子スイッチ装置によれば、請求項7記載の電子スイッチ装置の奏する効果に加えて、次の効果を奏する。発振手段からの出力の電圧振幅が所定値を超える場合には、ハイ又はローのうち予め規定されている第5状態が第2の検出手段から出力され、該出力の電圧振幅が所定値以下である場合には、第5状態とは異なる第6状態が該第2の検出手段から出力される。つまり、操作スイッチが非操作状態であって二次側コイルの両端を開放している間は、第2の検出手段からの出力は第5状態であり、操作スイッチが操作されて二次側コイルの両端を短絡している間は、第2の検出手段からの出力は第6状態となる。 According to the electronic switch device of the eighth aspect, in addition to the effect produced by the electronic switch device of the seventh aspect, the following effect is obtained. When the voltage amplitude of the output from the oscillating means exceeds a predetermined value, a fifth state defined in advance as high or low is output from the second detecting means, and the voltage amplitude of the output is below a predetermined value. In some cases, a sixth state different from the fifth state is output from the second detection means. That is, while the operation switch is in a non-operating state and both ends of the secondary coil are open, the output from the second detection means is in the fifth state, and the operation switch is operated and the secondary coil is operated. While both ends are short-circuited, the output from the second detection means is in the sixth state.
 そして、第2の検出手段から切換手段に第6状態が出力されたことにより、該切換手段に第6状態が入力されると、優先手段(切換手段の一部)により、ラッチ手段からの入力に優先させて電力供給路が導通される。よって、操作スイッチの操作に伴うラッチ手段からの入力が電力供給路を遮断させる状態であったとしても、操作スイッチが操作され続けている間は電力供給路を導通させることができる。即ち、操作スイッチを操作し続けていれば、ラッチ手段からの出力状態に依ることなく、電力供給路を導通させることができるので、操作スイッチを操作しながらコネクタを電力供給源に接続することにより、電力供給路を導通させることができる。そのため、コネクタを電力供給源に接続したタイミングで電力使用部を駆動させることができるという効果がある。 When the sixth state is output from the second detection means to the switching means, and the sixth state is input to the switching means, the priority means (a part of the switching means) inputs from the latch means. The power supply path is conducted with priority over the above. Therefore, even if the input from the latch means accompanying the operation of the operation switch is in a state where the power supply path is interrupted, the power supply path can be conducted while the operation switch continues to be operated. That is, if the operation switch is continuously operated, the power supply path can be conducted without depending on the output state from the latch means, so that the connector is connected to the power supply source while operating the operation switch. The power supply path can be made conductive. Therefore, there is an effect that the power use unit can be driven at the timing when the connector is connected to the power supply source.
本発明の一実施形態である電子スイッチ装置の使用状態を示す模式図である。It is a schematic diagram which shows the use condition of the electronic switch apparatus which is one Embodiment of this invention. 電子スイッチ装置を示す回路図である。It is a circuit diagram which shows an electronic switch apparatus. 電子スイッチ装置の動作を説明するためタイミングチャートである。It is a timing chart in order to explain operation of an electronic switch device. 変形例としての発振回路を示す回路図である。It is a circuit diagram which shows the oscillation circuit as a modification.
 以下、本発明の好ましい実施例について、添付図面を参照して説明する。図1は、本発明の一実施形態である電子スイッチ装置1の使用状態を示す模式図である。図1に示すように、電子スイッチ装置1は、電力供給源としての商用交流電源としてのコンセント(図示せず)と、電力使用部としての電子楽器100との間に介在されて、商用交流電源から電子楽器100への電力を供給(オン)又は遮断(オフ)するための装置である。電子スイッチ装置1は、AC入力部2としてのプラグと、AC出力部3(図2参照)としてのコネクタとを有しており、AC入力部2がコンセントに接続され、AC出力部3が電子楽器100の電源部(図示せず)から延びる電源ケーブル101に接続されて使用される。なお、電子スイッチ装置1は電子楽器100の本体に内蔵されていてもよく、その際には、操作スイッチ50が電子楽器100上の適宜箇所(例えば、操作パネル110)に取り付けられていてもよい。 Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings. FIG. 1 is a schematic diagram showing a use state of an electronic switch device 1 according to an embodiment of the present invention. As shown in FIG. 1, the electronic switch device 1 is interposed between an outlet (not shown) as a commercial AC power source as a power supply source and an electronic musical instrument 100 as a power usage unit. This is a device for supplying (on) or shutting off (off) power to the electronic musical instrument 100. The electronic switch device 1 has a plug as an AC input unit 2 and a connector as an AC output unit 3 (see FIG. 2). The AC input unit 2 is connected to an outlet, and the AC output unit 3 is an electronic device. It is used by being connected to a power cable 101 extending from a power supply unit (not shown) of the musical instrument 100. The electronic switch device 1 may be built in the main body of the electronic musical instrument 100, and in this case, the operation switch 50 may be attached to an appropriate location (for example, the operation panel 110) on the electronic musical instrument 100. .
 電子スイッチ装置1は、機械式スイッチである操作スイッチ50を有している。この操作スイッチ50は、アンラッチ型のスイッチ、即ち、非操作時には初期位置に戻るタイプのスイッチである。なお、アンラッチ型のスイッチは、モーメンタリスイッチとも呼ばれることがある。 The electronic switch device 1 has an operation switch 50 that is a mechanical switch. The operation switch 50 is an unlatched switch, that is, a switch that returns to the initial position when not operated. Note that an unlatched switch may also be referred to as a momentary switch.
 詳細は後述するが、電子スイッチ装置1は、AC入力部2がコンセントに接続され、AC出力部3が電源ケーブル101に接続された状態で、使用者が操作スイッチ50を押す(操作する)と、その押し操作に応じて、商用交流電源から電子楽器100への電力の供給と遮断とを切り換えることができるように構成されている。なお、本実施形態では、操作スイッチ50の入力を押し操作(押下)によって行うものとするが、スライド操作など他の動きにより操作入力がされるものであってもよい。 As will be described in detail later, in the electronic switch device 1, when the user presses (operates) the operation switch 50 in a state where the AC input unit 2 is connected to the outlet and the AC output unit 3 is connected to the power cable 101. The power supply to the electronic musical instrument 100 can be switched between the supply and the cut-off according to the pushing operation. In this embodiment, the operation switch 50 is input by a push operation (pressing), but an operation input such as a slide operation may be performed.
 また、電子スイッチ装置1は、コネクタ51(図2参照)を有している。このコネクタ51には、例えば、電子楽器100を制御する制御装置(図示せず)からの制御信号を伝達するためのケーブル102が接続される。詳細は後述するが、電子スイッチ装置1は、コネクタ51を介して電子楽器100あるいは電子タイマ装置などの他の機器から入力された制御信号(パワーマネジメント入力)によって、商用交流電源から電子楽器100へ供給していた電力を遮断(オフ)することができるように構成されている。 The electronic switch device 1 has a connector 51 (see FIG. 2). For example, a cable 102 for transmitting a control signal from a control device (not shown) that controls the electronic musical instrument 100 is connected to the connector 51. Although details will be described later, the electronic switch device 1 is supplied from the commercial AC power source to the electronic musical instrument 100 by a control signal (power management input) input from the electronic musical instrument 100 or another device such as an electronic timer device via the connector 51. The power that has been supplied is configured to be cut off (off).
 図2は、電子スイッチ装置1を示す回路図である。電子スイッチ装置1は、商用交流電源に接続されるAC入力部2と、電子楽器100に接続されるAC出力部3とを有している。AC入力部2は、第1入力端子2aと、商用交流電源側の共通端子である第2入力端子2bとを有している。AC出力部3は、第1出力端子3aと、電力使用部側の共通端子である第2出力端子3bとを有している。 FIG. 2 is a circuit diagram showing the electronic switch device 1. The electronic switch device 1 includes an AC input unit 2 connected to a commercial AC power source and an AC output unit 3 connected to the electronic musical instrument 100. The AC input unit 2 includes a first input terminal 2a and a second input terminal 2b that is a common terminal on the commercial AC power supply side. The AC output unit 3 includes a first output terminal 3a and a second output terminal 3b that is a common terminal on the power usage unit side.
 第1入力端子2aと第1出力端子3aとの間には、電力線4aが配線されており、この電力線4aは、操作スイッチ50の押下、又は、コネクタ51を介して入力されるパワーマネジメント入力に応じて駆動する開閉回路10によって導通又は遮断されるように構成されている。一方、第2入力端子2bと第2出力端子3bとの間には、電力線4bが配線されている。 A power line 4 a is wired between the first input terminal 2 a and the first output terminal 3 a, and this power line 4 a is used for power management input input via the operation switch 50 or via the connector 51. It is configured to be turned on or off by the open / close circuit 10 that is driven accordingly. On the other hand, a power line 4b is wired between the second input terminal 2b and the second output terminal 3b.
 電子スイッチ装置1は、電力線4a上の端子13aと、電力線4b上の端子13bとから供給される電力により電気的に動作する。なお、端子13aは、電力線4aにおける開閉回路10を配設した箇所より第1入力端子2a側に設けられ、基準電位に接続される。 The electronic switch device 1 is electrically operated by power supplied from the terminal 13a on the power line 4a and the terminal 13b on the power line 4b. The terminal 13a is provided on the first input terminal 2a side of the power line 4a from the location where the switching circuit 10 is disposed, and is connected to a reference potential.
 電子スイッチ装置1は、アンラッチ型の操作スイッチ50と、トランスTR1とを有している。トランスTR1は、商用交流電源側に位置する一次側コイルL1と、一次側コイルL1に対して絶縁された二次側コイルL2とから構成されている。よって、トランスTR1における二次側コイルL2の側には、商用交流電源から供給される高電圧の電流が流れ出すことはなく、使用者は、二次側コイルL2の側に設けられている操作スイッチ50を安全に使用することができる。 The electronic switch device 1 has an unlatched operation switch 50 and a transformer TR1. The transformer TR1 includes a primary side coil L1 located on the commercial AC power source side and a secondary side coil L2 insulated from the primary side coil L1. Therefore, the high-voltage current supplied from the commercial AC power supply does not flow out to the secondary coil L2 side of the transformer TR1, and the user operates the operation switch provided on the secondary coil L2 side. 50 can be used safely.
 一次側コイルL1は、後述する共振回路7の一部を構成する。二次側コイルL2は、その両端がそれぞれ操作スイッチ50の各端子に接続されており、操作スイッチ50の押下により、開放(オープン)又は短絡(ショート)される。詳細は後述するが、本実施形態の電子スイッチ装置1は、二次側コイルL2が開放されている場合には、一次側コイルL1を含む共振回路7の存在により発振回路6がブロッキング発振し、二次側コイルL2が短絡されると該ブロッキング発振が停止するように構成されていると共に、かかるブロッキング発振の有無を利用して、開閉回路10を駆動して電力線4aの導通又は遮断するように構成されている。 The primary coil L1 constitutes a part of a resonance circuit 7 to be described later. Both ends of the secondary coil L <b> 2 are connected to the respective terminals of the operation switch 50, and are opened (opened) or short-circuited (shorted) when the operation switch 50 is pressed. Although details will be described later, in the electronic switch device 1 of the present embodiment, when the secondary side coil L2 is opened, the oscillation circuit 6 performs blocking oscillation due to the presence of the resonance circuit 7 including the primary side coil L1, The blocking oscillation is stopped when the secondary coil L2 is short-circuited, and the switching circuit 10 is driven by using the presence or absence of the blocking oscillation so that the power line 4a is turned on or off. It is configured.
 また、電子スイッチ装置1は、AC/DC電圧変換回路5と、発振回路6と、共振回路7と、検出回路8と、ラッチ回路9と、開閉回路10と、押検出回路11と、リセット回路12とを有している。 The electronic switch device 1 includes an AC / DC voltage conversion circuit 5, an oscillation circuit 6, a resonance circuit 7, a detection circuit 8, a latch circuit 9, a switching circuit 10, a push detection circuit 11, and a reset circuit. 12.
 AC/DC変換回路5は、端子13aに接続される端子14aと、端子13bに接続される端子14bとに、それぞれ接続され、商用交流電源から供給されるAC電圧(例えば、70~290V)を、例えば10VのDC電圧に変換し、後段の発振回路6、共振回路7、検出回路8、ラッチ回路9、開閉回路10、押検出回路11、リセット回路13に動作電圧として供給する。なお、図2に示す回路では、端子14aが基準電位とされ、端子14bが動作電圧(+Vcc)とされる。 The AC / DC conversion circuit 5 is connected to a terminal 14a connected to the terminal 13a and a terminal 14b connected to the terminal 13b, respectively, and receives an AC voltage (for example, 70 to 290 V) supplied from a commercial AC power supply. For example, it is converted into a DC voltage of 10 V and supplied as an operating voltage to the subsequent oscillation circuit 6, resonance circuit 7, detection circuit 8, latch circuit 9, switching circuit 10, push detection circuit 11, and reset circuit 13. In the circuit shown in FIG. 2, the terminal 14a is set to the reference potential, and the terminal 14b is set to the operating voltage (+ Vcc).
 発振回路6は、4つの抵抗R1~R4と、電解コンデンサC1と、2つのコンデンサC2,C5と、ダイオードD1と、トランジスタQ1と、発振部Gとから構成される。発振回路6を構成する部品のうち、3つの抵抗R2~R4と、トランジスタQ1と、発振部Gとから構成される回路は、コルピッツ発振回路であり、トランジスタQ1による増幅と正帰還とにより発振部Gが発振し、その発振信号をトランジスタQ1のエミッタ端子から出力する。 The oscillation circuit 6 includes four resistors R1 to R4, an electrolytic capacitor C1, two capacitors C2 and C5, a diode D1, a transistor Q1, and an oscillation unit G. Of the components constituting the oscillation circuit 6, the circuit composed of the three resistors R2 to R4, the transistor Q1, and the oscillation unit G is a Colpitts oscillation circuit. The oscillation unit is amplified by the transistor Q1 and positive feedback. G oscillates and outputs the oscillation signal from the emitter terminal of transistor Q1.
 発振部Gは、セラロック(登録商標)である。発振部Gの内部回路は、図2に示すように、セラミック発振子Hと、2つのコンデンサC21,C22とから構成され、セラミック発振子Hと、直列に接続されたコンデンサC21,C22とが並列に接続されている。本実施形態では、発振部Gとして、発振周波数が4MHzのものを使用するが、後述する共振回路7との共振によりブロッキング発振するものであれば、発振部Gの発振周波数は特に限定されない。 The oscillation part G is CERALOCK (registered trademark). As shown in FIG. 2, the internal circuit of the oscillation unit G includes a ceramic oscillator H and two capacitors C21 and C22. The ceramic oscillator H and the capacitors C21 and C22 connected in series are in parallel. It is connected to the. In the present embodiment, an oscillator having an oscillation frequency of 4 MHz is used as the oscillating unit G. However, the oscillation frequency of the oscillating unit G is not particularly limited as long as blocking oscillation is caused by resonance with the resonance circuit 7 described later.
 トランジスタQ1は、発振部Gを発振させるための増幅段として機能するものであり、PNP型のトランジスタにより構成される。トランジスタQ1のエミッタ端子は、発振部GにおけるコンデンサC21とコンデンサC22との接続点と、抵抗R4の一端と、コンデンサC5の一端とに接続される。トランジスタQ1のベース端子は、発振部Gにおけるセラミック発振子HとコンデンサC22との接続点と、抵抗R2及び抵抗R3のそれぞれ一端とに接続される。また、トランジスタQ1のコレクタ端子は、抵抗R3の他端に接続される。 The transistor Q1 functions as an amplification stage for causing the oscillation unit G to oscillate, and is configured by a PNP transistor. The emitter terminal of the transistor Q1 is connected to a connection point between the capacitor C21 and the capacitor C22 in the oscillation unit G, one end of the resistor R4, and one end of the capacitor C5. The base terminal of the transistor Q1 is connected to a connection point between the ceramic oscillator H and the capacitor C22 in the oscillation unit G, and one end of each of the resistor R2 and the resistor R3. The collector terminal of the transistor Q1 is connected to the other end of the resistor R3.
 抵抗R2の他端は、発振部Gにおけるセラミック発振子HとコンデンサC21との接続点と、コンデンサC2の一端とに接続される。抵抗R4の他端は、発振部Gにおけるセラミック発振子HとコンデンサC21との接続点に接続される。コンデンサC2の他端は、抵抗R1の一端に接続される。抵抗R1におけるコンデンサC2が接続された側の端は、抵抗R3におけるトランジスタQ1のコレクタ端子が接続された側の端に接続される。 The other end of the resistor R2 is connected to a connection point between the ceramic oscillator H and the capacitor C21 in the oscillation unit G and one end of the capacitor C2. The other end of the resistor R4 is connected to a connection point between the ceramic oscillator H and the capacitor C21 in the oscillation unit G. The other end of the capacitor C2 is connected to one end of the resistor R1. The end of the resistor R1 to which the capacitor C2 is connected is connected to the end of the resistor R3 to which the collector terminal of the transistor Q1 is connected.
 抵抗R1の他端は、電解コンデンサC1のマイナス側に接続される。電解コンデンサC1のプラス側は、+Vccに接続されると共に、コンデンサC2における抵抗R1が接続されていない側の端が接続される。電解コンデンサC1及びコンデンサC2は、電源平滑用コンデンサとして機能する。ダイオードD1は、逆電流を防止するためのものであり、アノードが、電解コンデンサC1のマイナス側に接続され、カソードが、基準電位に接続される。コンデンサC5の他端は、後述する検出回路8の抵抗R8に接続される。コンデンサC5は、発振回路6から発振された発振信号(ブロッキング発振信号)から直流成分を除き、交流成分を後段の検出回路8へ出力するためのものである。 The other end of the resistor R1 is connected to the negative side of the electrolytic capacitor C1. The positive side of the electrolytic capacitor C1 is connected to + Vcc, and the end of the capacitor C2 to which the resistor R1 is not connected is connected. The electrolytic capacitor C1 and the capacitor C2 function as a power supply smoothing capacitor. The diode D1 is for preventing reverse current, the anode is connected to the negative side of the electrolytic capacitor C1, and the cathode is connected to the reference potential. The other end of the capacitor C5 is connected to a resistor R8 of the detection circuit 8 described later. The capacitor C5 is for removing the direct current component from the oscillation signal (blocking oscillation signal) oscillated from the oscillation circuit 6 and outputting the alternating current component to the detection circuit 8 at the subsequent stage.
 共振回路7は、上述した発振回路6の発振部Gに、寄生の間欠発振であるブロッキング発振を生じさせるための回路であり、コンデンサC3と、トランスTR1の一次側コイルL1と、上述した発振回路6のトランジスタQ1とから構成される。 The resonance circuit 7 is a circuit for causing blocking oscillation, which is parasitic intermittent oscillation, in the oscillation unit G of the oscillation circuit 6 described above, and includes the capacitor C3, the primary coil L1 of the transformer TR1, and the oscillation circuit described above. 6 transistors Q1.
 コンデンサC3の一端は、トランジスタQ1のエミッタ端子に接続され、他端は、一次側コイルL1の一端に直列接続される。一次側コイルL1の他端は、トランジスタQ1のベース端子に接続される。このように、コンデンサC3とコイル(一次側コイルL1)とが直列に接続された回路が、発振回路6のトランジスタQ1のエミッタ端子とベース端子との間に接続されると、発振部Gの発振にブロッキング発振を生じさせることができる。 One end of the capacitor C3 is connected to the emitter terminal of the transistor Q1, and the other end is connected in series to one end of the primary coil L1. The other end of the primary coil L1 is connected to the base terminal of the transistor Q1. Thus, when the circuit in which the capacitor C3 and the coil (primary coil L1) are connected in series is connected between the emitter terminal and the base terminal of the transistor Q1 of the oscillation circuit 6, the oscillation of the oscillation unit G Can cause blocking oscillation.
 共振回路7は、発振部Gの発振周波数(本実施形態では、4MHz)に比べて十分に低い共振周波数(例えば、本実施形態では250kHz程度)で発振するように構成されている。共振回路7の発振周波数を、発振部Gの発振周波数より十分に低くすることによって、ブロッキング発振を安定化させることができる。なお、ブロッキング発振を安定化させるためには、共振回路7の共振周波数を、発振部Gの発振周波数の少なくとも数分の一以下にすることが好ましい。また、ブロッキング発振の周期が、電子スイッチ装置1の使用者に影響を与えない程度(例えば、数十kHz程度)にすることができる周波数を、共振回路7の共振周波数として用いることが好ましい。 The resonance circuit 7 is configured to oscillate at a resonance frequency (for example, about 250 kHz in the present embodiment) sufficiently lower than the oscillation frequency of the oscillation unit G (in the present embodiment, 4 MHz). Blocking oscillation can be stabilized by making the oscillation frequency of the resonance circuit 7 sufficiently lower than the oscillation frequency of the oscillation unit G. In order to stabilize the blocking oscillation, the resonance frequency of the resonance circuit 7 is preferably set to be at least a fraction of the oscillation frequency of the oscillation unit G. Further, it is preferable to use a frequency at which the period of the blocking oscillation can be set so as not to affect the user of the electronic switch device 1 (for example, about several tens of kHz) as the resonance frequency of the resonance circuit 7.
 本実施形態では、共振回路7の共振周波数を、コンデンサC3の容量によって決定し、一次側コイルL1のインダクタ値は、発振部Gの内部等価回路に現れるインダクタ値とほぼ同じ値とする。これにより、操作スイッチ50の押下により二次側コイルL2を短絡させた場合に、一次側コイルL1のインダクタ値を、発振部Gの内部等価回路に現れるインダクタ値より小さくすることができるので、発振部Gの発振動作を停止させることができ、ブロッキング発振を停止することができる。よって、操作スイッチ50の押下に応じた二次側コイルL2の開放と短絡とを、ブロッキング発振の有無(即ち、発振回路6からのブロッキング発振信号の出力の有無)に反映させることができる。 In the present embodiment, the resonance frequency of the resonance circuit 7 is determined by the capacitance of the capacitor C3, and the inductor value of the primary coil L1 is set to be approximately the same as the inductor value appearing in the internal equivalent circuit of the oscillation unit G. Thereby, when the secondary coil L2 is short-circuited by pressing the operation switch 50, the inductor value of the primary coil L1 can be made smaller than the inductor value appearing in the internal equivalent circuit of the oscillation unit G. The oscillation operation of the part G can be stopped, and the blocking oscillation can be stopped. Therefore, opening and short-circuiting of the secondary coil L2 in response to pressing of the operation switch 50 can be reflected in the presence or absence of blocking oscillation (that is, the presence or absence of the output of the blocking oscillation signal from the oscillation circuit 6).
本実施形態の電子スイッチ装置1は、共振回路7の存在によって発振回路6から出力されるブロッキング発振信号の有無を後段の検出回路8によって検出し、その検出結果(検出回路8からの出力)に基づいて開閉回路10による電力線4aの導通と遮断とを切り換えるように構成されている。また、共振回路7を設けて発振回路6においてブロッキング発振を生じさせることにより、発振回路6の通常発振(コルピッツ発振回路による発振)の電圧振幅(波高)に比べ、十分に大きい電圧振幅を得ることができるので、後段の検出回路8による発振の検出を精度よく行うことができる。 The electronic switch device 1 of the present embodiment detects the presence or absence of a blocking oscillation signal output from the oscillation circuit 6 due to the presence of the resonance circuit 7 by the detection circuit 8 at the subsequent stage, and outputs the detection result (output from the detection circuit 8). Based on the switching circuit 10, the power line 4a is switched between conduction and interruption. In addition, by providing the resonance circuit 7 and causing blocking oscillation in the oscillation circuit 6, a sufficiently large voltage amplitude can be obtained compared to the voltage amplitude (wave height) of the normal oscillation (oscillation by the Colpitts oscillation circuit) of the oscillation circuit 6. Therefore, the detection of oscillation by the detection circuit 8 at the subsequent stage can be accurately performed.
 検出回路8は、6つの抵抗R8~R13と、ダイオードD2と、コンデンサC7と、2つのトランジスタQ2,Q3とから構成され、発振回路6からの出力(ブロッキング発振信号)の状態に応じて、後段のラッチ回路9へ出力のハイとローとを切り換える、所謂、フリップフロップ回路である。 The detection circuit 8 is composed of six resistors R8 to R13, a diode D2, a capacitor C7, and two transistors Q2 and Q3. The detection circuit 8 is arranged in a subsequent stage according to the state of the output (blocking oscillation signal) from the oscillation circuit 6. This is a so-called flip-flop circuit that switches the output between high and low to the latch circuit 9.
 トランジスタQ2は、発振回路6から出力された発振信号に応じてオンとオフとを切り換えるためのものであり、PNP型のトランジスタにより構成される。トランジスタQ2のエミッタ端子は、+Vccに接続されている。トランジスタQ2のベース端子は、抵抗R8及び抵抗R9のそれぞれ一端と、ダイオードD2のアノードとに接続される。トランジスタQ2のコレクタ端子は、後述する押検出回路11を構成するトランジスタQ6のベース端子に接続される。 The transistor Q2 is for switching on and off according to the oscillation signal output from the oscillation circuit 6, and is constituted by a PNP transistor. The emitter terminal of the transistor Q2 is connected to + Vcc. The base terminal of the transistor Q2 is connected to one end of each of the resistors R8 and R9 and the anode of the diode D2. The collector terminal of the transistor Q2 is connected to the base terminal of the transistor Q6 constituting the push detection circuit 11 described later.
 抵抗R9の他端は、+Vccに接続され、抵抗R8の他端は、コンデンサC5(発振回路6)におけるトランジスタQ1のエミッタ端子が接続されていない側の端が接続される。また、ダイオードD2のカソードは、+Vccに接続される。コンデンサC7は、AC入力部2を商用交流電源に接続した時(以下、この時を「電源投入時」と称す)おける検出回路8の応答時間を遅延させるためのものであり、一端が+Vccに接続され、他端が、トランジスタQ2のコレクタ端子に接続される。 The other end of the resistor R9 is connected to + Vcc, and the other end of the resistor R8 is connected to the end of the capacitor C5 (oscillation circuit 6) on the side where the emitter terminal of the transistor Q1 is not connected. The cathode of the diode D2 is connected to + Vcc. The capacitor C7 is for delaying the response time of the detection circuit 8 when the AC input unit 2 is connected to a commercial AC power source (hereinafter referred to as “power-on”), and one end is set to + Vcc. The other end is connected to the collector terminal of the transistor Q2.
 トランジスタQ3は、トランジスタQ2がオンであるかオフであるかに応じて、オンとオフとを切り換えるためのものであり、PNP型のトランジスタにより構成される。トランジスタQ3のエミッタ端子は、+Vccに接続される。トランジスタQ3のベース端子は、抵抗R10の一端と抵抗R11の一端とにそれぞれ接続される。トランジスタQ3のコレクタ端子は、抵抗R13の一端に接続される。抵抗R10の他端は、+Vccに接続される。抵抗R11の他端は、抵抗R12の一端に接続されると共に、トランジスタQ2のコレクタ端子に接続される。R12の他端及びR13の他端は共に基準電位に接続される。これにより、+Vccは、抵抗R10と、抵抗R11,R12に応じて分圧される。 The transistor Q3 is for switching on and off depending on whether the transistor Q2 is on or off, and is configured by a PNP transistor. The emitter terminal of transistor Q3 is connected to + Vcc. The base terminal of the transistor Q3 is connected to one end of the resistor R10 and one end of the resistor R11. The collector terminal of the transistor Q3 is connected to one end of the resistor R13. The other end of the resistor R10 is connected to + Vcc. The other end of the resistor R11 is connected to one end of the resistor R12 and to the collector terminal of the transistor Q2. Both the other end of R12 and the other end of R13 are connected to a reference potential. As a result, + Vcc is divided according to the resistance R10 and the resistances R11 and R12.
 ラッチ回路9は、IC1と、コンデンサC9,C10と、抵抗R14とから構成され、検出回路8(トランジスタQ3のコレクタ端子)からの出力がローからハイに立ち上がる毎に、その立ち上がりエッジに基づいて後段の開閉回路10への出力を反転させると共に、出力の状態を、検出回路8からの出力が次にローからハイに立ち上がるときまで保持する回路である。 The latch circuit 9 includes IC1, capacitors C9 and C10, and a resistor R14. Each time the output from the detection circuit 8 (the collector terminal of the transistor Q3) rises from low to high, the latch circuit 9 is based on the rising edge. The output to the open / close circuit 10 is inverted and the state of the output is maintained until the output from the detection circuit 8 rises from low to high next time.
 IC1は、ポジティブエッジトリガ形のD型フリップフロップとして構成されたロジックICであり、クロック端子である端子CKと、入力端子である端子Dと、出力端子である端子Qと、反転出力端子である端子QNと有している。端子CKに入力されるクロック信号の立ち上がりエッジに同期して、端子Dへの入力がラッチ(保持)され、端子Qから出力されると共に、端子QNから反転出力される。 IC1 is a logic IC configured as a positive edge trigger type D flip-flop, and is a terminal CK that is a clock terminal, a terminal D that is an input terminal, a terminal Q that is an output terminal, and an inverted output terminal. It has terminal QN. In synchronization with the rising edge of the clock signal input to the terminal CK, the input to the terminal D is latched (held), output from the terminal Q, and inverted from the terminal QN.
 IC1において、端子CKは、検出回路8におけるトランジスタQ3のコレクタ端子に接続され、該トランジスタQ3からの出力がクロック信号として入力される。端子Dには端子QNが接続されており、端子QNから出力された反転出力が、端子Dに入力される。 In IC1, the terminal CK is connected to the collector terminal of the transistor Q3 in the detection circuit 8, and the output from the transistor Q3 is input as a clock signal. A terminal QN is connected to the terminal D, and an inverted output output from the terminal QN is input to the terminal D.
 これにより、端子Qからの出力がハイであり、端子QNからの出力がローである状態において、検出回路8からの出力、より具体的には、トランジスタQ3のコレクタ端子からの出力がローからハイに立ち上がると、端子Dには、端子QNからの出力であるローが入力されているので、端子Qからの出力はハイからローに反転され、端子QNからの出力はローからハイに反転される。そして、検出回路8からの出力が次にローからハイに立ち上がったときには、端子QNから端子Dに入力されているのはハイであるので、端子Qからの出力はローからハイに反転され、端子QNからの出力はハイからローに反転される。 Thereby, in a state where the output from the terminal Q is high and the output from the terminal QN is low, the output from the detection circuit 8, more specifically, the output from the collector terminal of the transistor Q3 is low to high. Since the output from the terminal QN is low, the output from the terminal Q is inverted from high to low, and the output from the terminal QN is inverted from low to high. . When the output from the detection circuit 8 next rises from low to high, it is high that the signal being input from the terminal QN to the terminal D, so the output from the terminal Q is inverted from low to high, and the terminal The output from QN is inverted from high to low.
 また、IC1は、クリア端子である端子CLRと、プリセット端子である端子PRとを有しており、端子CLRは、+Vccに接続され、端子PRは、後述するリセット回路12を構成するトランジスタQ4のコレクタ端子に接続される。詳細は後述するが、リセット回路12は、電源投入時(即ち、AC入力部2を商用交流電源に接続した時)に所定期間に亘りローを出力するように構成されている。D型フリップフロップの特徴として、端子PRにローが入力される場合には、その入力が端子Dや端子CKへの入力より優先されるので、電源投入時には、端子Qからの出力がハイであり、端子QNからの出力がローに初期化される。 Further, IC1 has a terminal CLR which is a clear terminal and a terminal PR which is a preset terminal. The terminal CLR is connected to + Vcc, and the terminal PR is a transistor Q4 constituting a reset circuit 12 which will be described later. Connected to the collector terminal. Although details will be described later, the reset circuit 12 is configured to output low for a predetermined period when the power is turned on (that is, when the AC input unit 2 is connected to the commercial AC power supply). As a feature of the D-type flip-flop, when low is input to the terminal PR, the input has priority over the input to the terminal D or the terminal CK. Therefore, when the power is turned on, the output from the terminal Q is high. , The output from terminal QN is initialized to low.
 IC1は、端子VCCと、端子GNDとを有している。IC1は、端子Vcc及び端子GNDは両方とも、+Vccと基準電位とを結ぶ配線上に接続されており、これにより、動作電圧がIC1に印加され、IC1が駆動する。 IC1 has a terminal VCC and a terminal GND. In the IC1, both the terminal Vcc and the terminal GND are connected to a wiring connecting + Vcc and the reference potential, whereby an operating voltage is applied to the IC1 and the IC1 is driven.
 端子Vccと端子GNDとの間には、ノイズ防止用のコンデンサC9の各端が接続されている。抵抗R14の一端は、端子PRに接続され、他端は、基準電位に接続される。コンデンサC10は、抵抗R14に並列に接続されている。かかる接続がされたコンデンサC10は、AC入力部2を商用交流電源に接続すると電荷が蓄電され、AC入力部2と商用交流電源から取り外されると放電される。よって、電源投入時からコンデンサC10が蓄電されるまでの期間、後述するリセット回路12のトランジスタQ4からの出力を端子PRに入力させることを遅延させることができる。 Each end of a capacitor C9 for noise prevention is connected between the terminal Vcc and the terminal GND. One end of the resistor R14 is connected to the terminal PR, and the other end is connected to the reference potential. The capacitor C10 is connected in parallel with the resistor R14. The capacitor C10 thus connected is charged when the AC input unit 2 is connected to a commercial AC power source, and is discharged when the AC input unit 2 and the commercial AC power source are removed. Therefore, it is possible to delay the input of the output from the transistor Q4 of the reset circuit 12 described later to the terminal PR during the period from when the power is turned on until the capacitor C10 is charged.
 開閉回路10は、ラッチ回路9の端子Qからの出力又は後述する押検出回路11からの出力(トランジスタQ6のエミッタ端子からの出力)の状態に基づいて、電力線4aの導通と遮断とを切り換える回路である。この開閉回路10は、5つの抵抗R22~R26と、トランジスタQ9と、ダイオードD8と、弁回路10aとから構成される。 The switching circuit 10 is a circuit that switches between conduction and interruption of the power line 4a based on the output from the terminal Q of the latch circuit 9 or the output from the push detection circuit 11 described later (output from the emitter terminal of the transistor Q6). It is. The switching circuit 10 includes five resistors R22 to R26, a transistor Q9, a diode D8, and a valve circuit 10a.
 トランジスタQ9は、ラッチ回路9の端子Qからの出力の状態と、後述する押検出回路11からの出力の状態とに応じて、オンとオフとを切り換えるためのものであり、PNP型のトランジスタにより構成される。トランジスタQ9のエミッタ端子は抵抗R24の一端に接続される。トランジスタQ9のベース端子は、抵抗R23の一端に接続される。トランジスタQ9のコレクタ端子は、逆電流防止用のダイオードD8のアノードに接続される。 The transistor Q9 is for switching on and off according to the state of output from the terminal Q of the latch circuit 9 and the state of output from the push detection circuit 11 described later. Composed. The emitter terminal of the transistor Q9 is connected to one end of the resistor R24. The base terminal of the transistor Q9 is connected to one end of the resistor R23. The collector terminal of the transistor Q9 is connected to the anode of the diode D8 for preventing reverse current.
 抵抗R24におけるトランジスタQ9が接続されていない側の端は、抵抗R22の一端に接続される。抵抗R24と抵抗R22との接続点は、抵抗R23とトランジスタQ9との接続点とに接続される。抵抗R22における抵抗R24が接続されていない側の端は、ラッチ回路の端子Qに接続される。抵抗R23におけるトランジスタQ9が接続されていない側の端は、後述する押検出回路11におけるトランジスタQ6のエミッタ端子に接続される。 The end of the resistor R24 to which the transistor Q9 is not connected is connected to one end of the resistor R22. A connection point between the resistor R24 and the resistor R22 is connected to a connection point between the resistor R23 and the transistor Q9. An end of the resistor R22 to which the resistor R24 is not connected is connected to the terminal Q of the latch circuit. The end of the resistor R23 to which the transistor Q9 is not connected is connected to the emitter terminal of the transistor Q6 in the push detection circuit 11 described later.
 上述の通りに配線されたトランジスタQ9及び抵抗R22~R24は優先手段を構成し、ラッチ回路9(IC1の端子Q)の出力がハイであってもローであっても、押検出回路11(トランジスタQ6のエミッタ端子)からの出力がローであれば、トランジスタQ9をオンにすることができる。 The transistor Q9 and the resistors R22 to R24 wired as described above constitute priority means, and the push detection circuit 11 (transistor) regardless of whether the output of the latch circuit 9 (terminal Q of IC1) is high or low. If the output from the emitter terminal of Q6 is low, the transistor Q9 can be turned on.
 ダイオードD8のカソードは、抵抗R25の一端が接続され、抵抗R25の他端は、抵抗R26の一端に接続される。抵抗R26の他端は、弁回路10aにおける2つの電解効果トランジスタQ8,Q10の各ゲート電極の間に接続される。 The cathode of the diode D8 is connected to one end of the resistor R25, and the other end of the resistor R25 is connected to one end of the resistor R26. The other end of the resistor R26 is connected between the gate electrodes of the two field effect transistors Q8 and Q10 in the valve circuit 10a.
 弁回路10aは、トランジスタQ9がオンである場合に電力線4aを導通させ、トランジスタQ9がオフである場合に電力線4aを遮断する回路であり、2つの電解効果トランジスタQ8,Q10と、抵抗R27と、コンデンサC13と、ツェナーダイオードD7と、2つのコイルL3,L4とにより構成される。 The valve circuit 10a is a circuit that conducts the power line 4a when the transistor Q9 is on, and cuts off the power line 4a when the transistor Q9 is off, and includes two field effect transistors Q8 and Q10, a resistor R27, The capacitor C13, a Zener diode D7, and two coils L3 and L4 are included.
 電解効果トランジスタQ8,Q10は、いずれも、金属酸化物型の電解効果トランジスタ(MOS-FET)から構成される。本実施形態では、電解効果トランジスタQ8,Q10として、nチャネルのディプレッション型MOS-FETを用いている。これらの電解効果トランジスタQ8,Q10は、トランジスタQ9がオンになった場合に、該トランジスタQ9から流入する電流によってオンとなる。電解効果トランジスタQ8,Q10がオンになった場合に、電力線4aは導通状態となり、AC入力部2を介して接続された商用交流電源からの電力を、AC出力部3を介して電子楽器100に供給することができる。 Electrolytic effect transistors Q8 and Q10 are each composed of a metal oxide type electrolytic effect transistor (MOS-FET). In this embodiment, n-channel depletion type MOS-FETs are used as the field effect transistors Q8 and Q10. These field effect transistors Q8 and Q10 are turned on by a current flowing from the transistor Q9 when the transistor Q9 is turned on. When the field effect transistors Q8 and Q10 are turned on, the power line 4a becomes conductive, and power from the commercial AC power source connected via the AC input unit 2 is supplied to the electronic musical instrument 100 via the AC output unit 3. Can be supplied.
 電解効果トランジスタQ8のゲート電極は、電解効果トランジスタQ10のゲート電極に接続され、電解効果トランジスタQ8のソース電極は、電解効果トランジスタQ10のソース電極に接続される。即ち、電解効果トランジスタQ8と電解効果トランジスタQ10は、並列に接続されている。 The gate electrode of the field effect transistor Q8 is connected to the gate electrode of the field effect transistor Q10, and the source electrode of the field effect transistor Q8 is connected to the source electrode of the field effect transistor Q10. That is, the field effect transistor Q8 and field effect transistor Q10 are connected in parallel.
 電解効果トランジスタQ8のドレイン電極は、コイルL3の一端に接続され、コイルL3の他端は、電力線4aを介してAC入力部2の第1入力端子2aに接続されている。一方、電解効果トランジスタQ10のドレイン電極は、コイルL4の一端に接続され、コイルL4の他端は、電力線4aを介してAC出力部3の第1出力端子3aに接続されている。 The drain electrode of the field effect transistor Q8 is connected to one end of the coil L3, and the other end of the coil L3 is connected to the first input terminal 2a of the AC input unit 2 through the power line 4a. On the other hand, the drain electrode of the field effect transistor Q10 is connected to one end of the coil L4, and the other end of the coil L4 is connected to the first output terminal 3a of the AC output unit 3 through the power line 4a.
 抵抗R27は、一端が電解効果トランジスタQ8,Q10のゲート電極に接続され、他端がソース電極に接続される。コンデンサC13もまた、一端が電解効果トランジスタQ8,Q10のゲート電極に接続され、他端がソース電極に接続される。コンデンサC13は、電解効果トランジスタQ8,Q10がオンされた際に誤作動を防止するための遅延時間を作る機能を果たす。ツェナーダイオードD7は、弁回路10aを保護するためのものであり、カソードが電解効果トランジスタQ8,Q10のゲート電極に接続され、アノードがソース電極に接続される。 The resistor R27 has one end connected to the gate electrodes of the field effect transistors Q8 and Q10 and the other end connected to the source electrode. Capacitor C13 also has one end connected to the gate electrodes of field effect transistors Q8 and Q10 and the other end connected to the source electrode. Capacitor C13 functions to create a delay time for preventing malfunction when field effect transistors Q8 and Q10 are turned on. The Zener diode D7 is for protecting the valve circuit 10a. The cathode is connected to the gate electrodes of the field effect transistors Q8 and Q10, and the anode is connected to the source electrode.
 押検出回路11は、操作スイッチ50の押下(操作)中であるか否かを検出する回路であり、1のトランジスタQ6と、上述した検出回路8の一部構成(トランジスタQ2、抵抗R8,R9、コンデンサC7、ダイオードD2)とから構成される。 The push detection circuit 11 is a circuit that detects whether or not the operation switch 50 is being pushed (operated), and includes one transistor Q6 and a part of the detection circuit 8 described above (transistor Q2, resistors R8 and R9). , Capacitor C7 and diode D2).
 トランジスタQ6は、検出回路8におけるトランジスタQ2のコレクタ端子からの出力の状態に応じて、オンとオフとを切り換えるためのものであり、PNP型のトランジスタにより構成される。 The transistor Q6 is for switching on and off according to the state of the output from the collector terminal of the transistor Q2 in the detection circuit 8, and is composed of a PNP transistor.
 トランジスタQ6のエミッタ端子は、抵抗R23(開閉回路10の一部)におけるトランジスタQ9に接続されていない側の端に接続され、ベース端子は、検出回路8におけるトランジスタQ2のコレクタ端子に接続される。トランジスタQ6のコレクタ端子は、基準電位に接続される。 The emitter terminal of the transistor Q6 is connected to the end of the resistor R23 (part of the switching circuit 10) that is not connected to the transistor Q9, and the base terminal is connected to the collector terminal of the transistor Q2 in the detection circuit 8. The collector terminal of transistor Q6 is connected to a reference potential.
 リセット回路12は、電源投入時(即ち、AC入力部2を商用交流電源に接続した時)、又は、電子楽器100の制御装置からの入力信号(パワーマネジメント入力)があった場合に、ラッチ回路9のプリセット端子(端子PR)にローを入力するための回路である。このリセット回路12は、トランジスタQ4と、5つの抵抗R15~R19と、コンデンサC11と、ダイオードD6と、フォトカプラ12aとから構成される。 The reset circuit 12 is a latch circuit when the power is turned on (that is, when the AC input unit 2 is connected to a commercial AC power supply) or when there is an input signal (power management input) from the control device of the electronic musical instrument 100. 9 is a circuit for inputting low to 9 preset terminals (terminal PR). The reset circuit 12 includes a transistor Q4, five resistors R15 to R19, a capacitor C11, a diode D6, and a photocoupler 12a.
 トランジスタQ4は、ベース端子の状態に応じてオンとオフとを切り換えるためのものであり、PNP型のトランジスタにより構成される。トランジスタQ4のエミッタ端子は、+Vccに接続され、ベース端子は、フォトカプラ12aにおけるフォトトランジスタQ11のエミッタ端子に接続される。トランジスタQ4のコレクタ端子は、ラッチ回路9の端子PRに接続される。 The transistor Q4 is for switching on and off according to the state of the base terminal, and is composed of a PNP type transistor. The emitter terminal of the transistor Q4 is connected to + Vcc, and the base terminal is connected to the emitter terminal of the phototransistor Q11 in the photocoupler 12a. The collector terminal of the transistor Q4 is connected to the terminal PR of the latch circuit 9.
 抵抗R17は、一端がトランジスタQ4のベース端子に接続され、他端が抵抗R16の一端に接続される。抵抗R16の他端は、逆流電流防止用のダイオードD6のアノードに接続される。ダイオードD6のカソードは、抵抗R15の一端に接続され、抵抗R15の他端は、基準電位に接続される。 The resistor R17 has one end connected to the base terminal of the transistor Q4 and the other end connected to one end of the resistor R16. The other end of the resistor R16 is connected to the anode of a backflow current preventing diode D6. The cathode of the diode D6 is connected to one end of the resistor R15, and the other end of the resistor R15 is connected to the reference potential.
 抵抗R18は、一端がトランジスタQ4のベース端子に接続され、他端がトランジスタQ4のエミッタ端子に接続される。コンデンサC11は、AC入力部2を商用交流電源に接続してから、ラッチ回路9の端子PR(プリセット端子)へハイが出力されるまでの期間を遅延させるためのものであり、一端が、抵抗R18におけるトランジスタQ4のエミッタ端子が接続された側に接続され、他端が、抵抗R17におけるトランジスタQ4のベース端子が接続されていない側に接続される。抵抗R19は、コンデンサC11に並列に接続される。なお、このコンデンサC11による遅延時間は、上述したラッチ回路9のコンデンサ10による遅延時間より長くなるよう設計されている。 The resistor R18 has one end connected to the base terminal of the transistor Q4 and the other end connected to the emitter terminal of the transistor Q4. The capacitor C11 is for delaying a period from when the AC input unit 2 is connected to a commercial AC power supply until high is output to the terminal PR (preset terminal) of the latch circuit 9, and one end of the capacitor C11 is a resistor. R18 is connected to the side to which the emitter terminal of transistor Q4 is connected, and the other end is connected to the side of resistor R17 to which the base terminal of transistor Q4 is not connected. The resistor R19 is connected in parallel with the capacitor C11. The delay time by the capacitor C11 is designed to be longer than the delay time by the capacitor 10 of the latch circuit 9 described above.
 フォトカプラ12aは、発光素子である発光ダイオードD9と、受光素子であるフォトトランジスタQ11とから構成される。発光ダイオードD9は、アノードが、電子楽器100からケーブル102が接続されるコネクタ51における端子51aに接続され、カソードが、端子51bに接続される。フォトトランジスタQ11のコレクタ端子は+Vccに接続され、エミッタ端子はリセット回路12におけるトランジスタQ4のベース端子に接続される。 The photocoupler 12a includes a light emitting diode D9 that is a light emitting element and a phototransistor Q11 that is a light receiving element. The anode of the light emitting diode D9 is connected to the terminal 51a in the connector 51 to which the cable 102 is connected from the electronic musical instrument 100, and the cathode is connected to the terminal 51b. The collector terminal of the phototransistor Q11 is connected to + Vcc, and the emitter terminal is connected to the base terminal of the transistor Q4 in the reset circuit 12.
 フォトカプラ12aは、電子楽器100の制御装置あるいは他の機器から制御信号の入力(パワーマネジメント入力)があると発光ダイオードD9が発光し、その発光によりフォトトランジスタQ11がオンになり、エミッタ端子からハイを出力する。これにより、リセット回路12のトランジスタQ4がオフされて、トランジスタQ4のコレクタ端子からIC1(ラッチ回路9)の端子PRへローが出力される。すると、IC1の端子Qからハイが出力されて、結果として、弁回路10aの電解効果トランジスタQ8,Q10がオフとなり、電子楽器100への電力供給が遮断(オフ)される。 When there is a control signal input (power management input) from the control device of the electronic musical instrument 100 or another device, the photocoupler 12a emits light from the light emitting diode D9, and the light emission turns on the phototransistor Q11. Is output. As a result, the transistor Q4 of the reset circuit 12 is turned off, and a low is output from the collector terminal of the transistor Q4 to the terminal PR of the IC1 (latch circuit 9). Then, a high is output from the terminal Q of the IC1, and as a result, the field effect transistors Q8 and Q10 of the valve circuit 10a are turned off, and the power supply to the electronic musical instrument 100 is cut off (turned off).
 次に、図3を参照して、上記構成を有する電子スイッチ装置1の動作を説明する。図3は、電子スイッチ装置1の動作を説明するためタイミングチャートである。なお、図3において、(a)は、AC入力の状態を示し、具体的には、AC入力部2が商用交流電源に接続されたか否かを示す。(b)は、操作スイッチ50の操作状態(トランスTR1の二次側コイルL2の状態)を示す。(c)は、発振回路6からの出力であって、図1におけるA点の状態を示す。(d)は、検出回路8の出力であって、図1におけるB点の状態を示す。(e)は、ラッチ回路9の出力であって、図1におけるC点の状態を示す。(f)は、押検出回路11の出力であって、図1におけるD点の状態を示す。(g)は、電子楽器100の制御装置からのパワーマネジメント入力であって、図1におけるE点の状態を示す。(h)は、リセット回路12からの出力であって、図1におけるF点の状態を示す。(i)は、AC出力の状態を示し、具体的には、AC入力部3から電子楽器100への電力供給が行われている(即ち、ON)か、遮断されている(即ち、OFF)かを示す。 Next, the operation of the electronic switch device 1 having the above configuration will be described with reference to FIG. FIG. 3 is a timing chart for explaining the operation of the electronic switch device 1. In FIG. 3, (a) shows the state of AC input, and specifically indicates whether or not the AC input unit 2 is connected to a commercial AC power source. (B) shows the operation state of the operation switch 50 (the state of the secondary coil L2 of the transformer TR1). (C) is an output from the oscillation circuit 6 and shows a state at point A in FIG. (D) is the output of the detection circuit 8, and shows the state of point B in FIG. (E) is the output of the latch circuit 9 and shows the state at point C in FIG. (F) is an output of the push detection circuit 11 and shows the state of point D in FIG. (G) is a power management input from the control device of the electronic musical instrument 100, and shows the state of point E in FIG. (H) is an output from the reset circuit 12, and shows the state of point F in FIG. (I) shows the state of the AC output. Specifically, power is supplied from the AC input unit 3 to the electronic musical instrument 100 (ie, ON) or is interrupted (ie, OFF). Indicate.
 時刻t0において、操作スイッチ50が押下されることなく(即ち、操作スイッチ50から手を離した状態で)、AC入力部2が商用交流電源に接続されて電源投入される場合、リセット回路12では、動作電圧+Vccに基づいて、放電されているコンデンサC11に電流が流れ、該コンデンサC11には徐々に電荷が蓄電される。このとき、トランジスタQ4のベース端子及びエミッタ端子の電位は等しいので、トランジスタQ4はオフとなる。これにより、時刻t0におけるF点での出力はローとなる。 At time t0, when the AC input unit 2 is connected to a commercial AC power source and is turned on without pressing the operation switch 50 (that is, with the hand released from the operation switch 50), the reset circuit 12 Based on the operating voltage + Vcc, a current flows through the discharged capacitor C11, and electric charge is gradually stored in the capacitor C11. At this time, since the potentials of the base terminal and the emitter terminal of the transistor Q4 are equal, the transistor Q4 is turned off. As a result, the output at point F at time t0 is low.
 リセット回路12からラッチ回路9への出力は、IC1の端子PR(プリセット端子)に入力される。よって、時刻t0においてIC1の端子PRにローが入力されると、IC1の端子Qからの出力は優先的にハイとなる。即ち、時刻t0におけるIC1の端子Qからの出力、即ち、C点での出力はハイとなる。 The output from the reset circuit 12 to the latch circuit 9 is input to the terminal PR (preset terminal) of the IC1. Therefore, when low is input to the terminal PR of the IC1 at time t0, the output from the terminal Q of the IC1 is preferentially high. That is, the output from the terminal Q of the IC1 at the time t0, that is, the output at the point C is high.
 その後、時刻t1(例えば、電源投入から0.5秒後の時刻)において、リセット回路12のコンデンサC11に蓄電された電荷量が所定の閾値に達すると、抵抗R18の端子間に電圧が印加されるようになるので、かかる抵抗R18の端子間の電位差によってトランジスタQ4がオンとなる。よって、時刻t1において、リセット回路12からラッチ回路9への出力、即ち、F点での出力はハイとなり、IC1の端子PRにはハイが入力される。これにより、時刻t1以降、ラッチ回路9におけるIC1の端子Qからの出力(即ち、C点での出力)は、端子CKに入力される信号の状態に応じて変化することになる。 After that, when the amount of charge stored in the capacitor C11 of the reset circuit 12 reaches a predetermined threshold at time t1 (for example, 0.5 seconds after power-on), a voltage is applied between the terminals of the resistor R18. As a result, the transistor Q4 is turned on by the potential difference between the terminals of the resistor R18. Therefore, at time t1, the output from the reset circuit 12 to the latch circuit 9, that is, the output at the point F becomes high, and high is input to the terminal PR of IC1. Thus, after time t1, the output from the terminal Q of the IC 1 in the latch circuit 9 (that is, the output at the point C) changes according to the state of the signal input to the terminal CK.
 一方で、時刻t0において、操作スイッチ50が押下されることなく、AC入力部2が商用交流電源に接続されて電源投入された場合には、動作電圧+Vccが抵抗R2と抵抗R3とにより分圧される。この分圧による抵抗R2の端子間の電位差によってトランジスタQ1がオンとなる。 On the other hand, when the AC input unit 2 is connected to the commercial AC power source and turned on without pressing the operation switch 50 at time t0, the operating voltage + Vcc is divided by the resistor R2 and the resistor R3. Is done. The transistor Q1 is turned on by the potential difference between the terminals of the resistor R2 due to this voltage division.
 トランジスタQ1がオンになると、コルピッツ発振回路(トランジスタQ1、発振部G、抵抗R2~R4)の発振が開始される。時刻t0では、操作スイッチ50が押下されておらず、トランスTR1における二次側コイルL2が開放されているので、共振回路7(トランジスタQ1、コンデンサC3、一次側コイルL1)の発振により、コルピッツ発振回路においてブロッキング発振が生じる。このブロッキング発振の信号は、コンデンサC5によって直流成分が分離された交流成分が、検出回路8に入力される。よって、A点では出力信号(ブロッキング発振信号)が検出される。 When the transistor Q1 is turned on, oscillation of the Colpitts oscillation circuit (transistor Q1, oscillation unit G, resistors R2 to R4) is started. At time t0, the operation switch 50 is not pressed down, and the secondary coil L2 in the transformer TR1 is opened. Therefore, the Colpitts oscillation is generated by the oscillation of the resonance circuit 7 (transistor Q1, capacitor C3, primary coil L1). Blocking oscillation occurs in the circuit. As the blocking oscillation signal, an AC component from which a DC component is separated by the capacitor C5 is input to the detection circuit 8. Therefore, an output signal (blocking oscillation signal) is detected at point A.
 共振回路7の存在により発振回路6で生じたブロッキング発振は、検出回路8に入力される。発振回路6から出力されるブロッキング発振は、発振初期においては電圧振幅が十分に大きくなく、抵抗R8,R9間に十分な電位差が生じないので、トランジスタQ2はオンとならない。しかし、電源投入前はコンデンサC7が放電されているので、電源投入時(時刻t0)には、抵抗R10,抵抗R11の両端間の電位差が等しくなり、トランジスタQ3がオフとなる。よって、時刻t0におけるB点の状態はローとなる。 Blocking oscillation generated in the oscillation circuit 6 due to the presence of the resonance circuit 7 is input to the detection circuit 8. In the blocking oscillation output from the oscillation circuit 6, the voltage amplitude is not sufficiently large in the initial stage of oscillation, and a sufficient potential difference does not occur between the resistors R8 and R9, so that the transistor Q2 is not turned on. However, since the capacitor C7 is discharged before the power is turned on, when the power is turned on (time t0), the potential difference between both ends of the resistors R10 and R11 becomes equal, and the transistor Q3 is turned off. Therefore, the state of point B at time t0 is low.
 その後、ブロッキング発振信号の電圧振幅が十分に大きくなると、抵抗R8,R9の間に電位差が生じ、抵抗R9の両端に生じた電位差がトランジスタQ2のベース-エミッタ間電圧(通常、0.6~0.7V)を超えるようになると、トランジスタQ2がオンとなる。 Thereafter, when the voltage amplitude of the blocking oscillation signal becomes sufficiently large, a potential difference is generated between the resistors R8 and R9, and the potential difference generated at both ends of the resistor R9 is the base-emitter voltage (usually 0.6 to 0) of the transistor Q2. .7V), the transistor Q2 is turned on.
 なお、電源が投入されてからコンデンサC7に所定の電荷量が蓄電されるまでの時間(遅延時間)は、ブロッキング発振信号が発振を開始してから、その電圧振幅が検出回路8により検出されるのに十分な大きさとなるまでの時間(発振安定時間)より十分に大きく設定されている。よって、電源投入後、コンデンサC7に所定の電荷量が蓄電されたことによってトランジスタQ3がオンになってしまう前に、ブロッキング発振信号の電圧振幅が十分に大きくなりトランジスタQ2がオンになると共に、コンデンサC7が放電されるので、電源投入時にB点の状態がハイになることはない。 Note that the time (delay time) from when the power is turned on until the predetermined amount of charge is stored in the capacitor C7 is detected by the detection circuit 8 after the blocking oscillation signal starts oscillating. It is set to be sufficiently larger than the time until the oscillation becomes sufficiently large (oscillation stabilization time). Therefore, after the power is turned on, the voltage amplitude of the blocking oscillation signal is sufficiently increased and the transistor Q2 is turned on before the transistor Q3 is turned on due to a predetermined amount of charge stored in the capacitor C7. Since C7 is discharged, the state of point B does not become high when the power is turned on.
 検出回路8からラッチ回路9への出力は、IC1の端子CK(クロック端子)にクロック信号として入力される。ラッチ回路9のIC1はポジティブエッジトリガ形のD型フリップフロップとして構成されているので、端子CKにローが入力される場合には、端子Qからの出力は変化しない。また、上述した通り、時刻t0では、リセット回路12からIC1の端子PRにローが入力されて、優先的にハイに初期化されているので、時刻t0におけるラッチ回路9から開閉回路10への出力、即ち、C点の状態はハイとなる。 The output from the detection circuit 8 to the latch circuit 9 is input to the terminal CK (clock terminal) of the IC 1 as a clock signal. Since the IC 1 of the latch circuit 9 is configured as a positive edge trigger type D-type flip-flop, the output from the terminal Q does not change when low is input to the terminal CK. Further, as described above, at time t0, low is input from the reset circuit 12 to the terminal PR of the IC1 and is preferentially initialized to high, so that the output from the latch circuit 9 to the switching circuit 10 at time t0. That is, the state of the point C becomes high.
 一方、時刻t0において電源が投入されると、ブロッキング発振信号の電圧振幅が十分に大きくなるまでは、電源投入前に放電されていたコンデンサC7により、トランジスタQ6のベース端子の電位が+Vccに近い値となる。よって、電源投入時(時刻t0)においてトランジスタQ6のエミッタ端子の電位は上がり、D点の状態はハイとなる。 On the other hand, when the power is turned on at time t0, the potential of the base terminal of the transistor Q6 is close to + Vcc due to the capacitor C7 discharged before the power is turned on until the voltage amplitude of the blocking oscillation signal becomes sufficiently large. It becomes. Therefore, when the power is turned on (time t0), the potential of the emitter terminal of the transistor Q6 rises and the state of the point D becomes high.
 その後、コンデンサC7に徐々に電荷が蓄電されていくと、それに伴ってトランジスタQ6のベース端子の電位が徐々に下がり、トランジスタQ6のエミッタ端子の電位も下がる。しかし、上述した通り、コンデンサC7による遅延時間が発振安定時間より十分に大きく設定されているので、トランジスタQ6のエミッタ端子の電位が下がる前に、ブロッキング発振信号の電圧振幅が十分に大きくなってトランジスタQ2がオンになる。それにより、トランジスタQ6のベース端子の電位が再び+Vccに近づくので、トランジスタQ6のエミッタ端子の電位を上げることができ、D点の状態もハイを維持する。 Thereafter, when the electric charge is gradually stored in the capacitor C7, the potential of the base terminal of the transistor Q6 gradually decreases, and the potential of the emitter terminal of the transistor Q6 also decreases accordingly. However, as described above, the delay time due to the capacitor C7 is set sufficiently larger than the oscillation stabilization time, so that the voltage amplitude of the blocking oscillation signal becomes sufficiently large before the potential of the emitter terminal of the transistor Q6 is lowered. Q2 turns on. As a result, the potential of the base terminal of the transistor Q6 again approaches + Vcc, so that the potential of the emitter terminal of the transistor Q6 can be raised, and the state at the point D is also kept high.
 開閉回路10では、ラッチ回路9からの出力がハイであり、押検出回路11からの出力がハイである場合には、抵抗R22から抵抗R24の各抵抗における端子間の電位差が小さくなるので、トランジスタQ9がオフとなる。 In the open / close circuit 10, when the output from the latch circuit 9 is high and the output from the push detection circuit 11 is high, the potential difference between the terminals of the resistors R22 to R24 is small. Q9 turns off.
 トランジスタQ9がオフである場合には、弁回路10aに電流が流れないので、電解効果トランジスタQ8,Q10は、ゲート電圧(ゲート電極-ソース電極間の電圧)は0Vとであることによりオンされない(即ち、オフである)。よって、時刻t0では、電解効果トランジスタQ8,Q10はオフであるので、電力線4aは導通されず(遮断され)、AC出力部3からの出力は0V(即ち、オフ)となる。 When the transistor Q9 is off, no current flows through the valve circuit 10a. Therefore, the field effect transistors Q8 and Q10 are not turned on because the gate voltage (the voltage between the gate electrode and the source electrode) is 0V ( That is, it is off). Therefore, at time t0, the field effect transistors Q8 and Q10 are off, so that the power line 4a is not conducted (cut off), and the output from the AC output unit 3 is 0 V (ie, off).
 このように、本実施形態の電子スイッチ装置1によれば、電源投入後にリセット回路12からIC1(ラッチ回路9)の端子PRにハイが出力されることをコンデンサC11により遅延させている、即ち、電源投入時にはリセット回路12から端子PRにローが入力されるように構成されている。これにより、電源投入時にラッチ回路9(IC1の端子Q)からハイを出力させることができる。一方で、操作スイッチ50が押下されていなければ、検出回路8のコンデンサC7による遅延により、電源投入時に押検出回路11からローが出力されないように構成されている。従って、操作スイッチ50を押下することなく電源投入した場合には、電力線4aが導通されることはなく、AC出力部3からの出力を必ずオフにすることができる。 As described above, according to the electronic switch device 1 of the present embodiment, the output of high from the reset circuit 12 to the terminal PR of the IC1 (latch circuit 9) is delayed by the capacitor C11 after the power is turned on. When the power is turned on, low is input from the reset circuit 12 to the terminal PR. Thereby, it is possible to output high from the latch circuit 9 (terminal Q of IC1) when the power is turned on. On the other hand, if the operation switch 50 is not pressed, a low is not output from the push detection circuit 11 when the power is turned on due to a delay caused by the capacitor C7 of the detection circuit 8. Therefore, when the power is turned on without pressing down the operation switch 50, the power line 4a is not turned on, and the output from the AC output unit 3 can be always turned off.
 時刻t2において操作スイッチ50が押下(操作)されると、トランスTR1における二次側コイルL2が短絡される。それにより、一次側コイルL1のインダクタ値が次第に減少し、コルピッツ発振回路(発振部G)の発振が徐々に停止される。その結果、発振回路6からの出力は、操作スイッチ50が押下された時刻t2より少し遅れた時刻t3において所定レベル以下(例えば、0V)となる。 When the operation switch 50 is pressed (operated) at time t2, the secondary coil L2 in the transformer TR1 is short-circuited. As a result, the inductor value of the primary coil L1 gradually decreases, and the oscillation of the Colpitts oscillation circuit (oscillation unit G) is gradually stopped. As a result, the output from the oscillation circuit 6 becomes equal to or lower than a predetermined level (for example, 0 V) at time t3 slightly delayed from time t2 when the operation switch 50 is pressed.
 時刻t3において、発振回路6からの出力が所定レベル以下になると、抵抗R8,R9間の電位差が小さくなるので、トランジスタQ2はオフとなる。トランジスタQ2がオフになると、動作電圧+Vccが、抵抗R10と、抵抗R11と、抵抗R12とにより分圧されることになり、その結果、抵抗R10の両端間の電位差がトランジスタQ3のベース-エミッタ間電圧より大きくなり、トランジスタQ3はオンとなる。これにより、時刻t3において、検出回路8からラッチ回路9への出力、即ち、B点の状態はローからハイに切り換わる。 At time t3, when the output from the oscillation circuit 6 becomes a predetermined level or less, the potential difference between the resistors R8 and R9 becomes small, so that the transistor Q2 is turned off. When the transistor Q2 is turned off, the operating voltage + Vcc is divided by the resistor R10, the resistor R11, and the resistor R12. As a result, the potential difference between both ends of the resistor R10 is between the base and the emitter of the transistor Q3. The voltage becomes higher than the voltage, and the transistor Q3 is turned on. Thereby, at time t3, the output from the detection circuit 8 to the latch circuit 9, that is, the state of the point B is switched from low to high.
 よって、時刻t3において、IC1の端子CKへの入力がローからハイに立ち上がると、その立ち上がりエッジに同期して、端子Qからそれまで出力されていたハイからローに切り換わる。その結果、時刻t3におけるラッチ回路9から開閉回路10への出力、即ち、C点での出力はハイからローに切り換わる。 Therefore, at time t3, when the input to the terminal CK of IC1 rises from low to high, the high-to-low output from the terminal Q so far is switched in synchronization with the rising edge. As a result, the output from the latch circuit 9 to the switching circuit 10 at time t3, that is, the output at the point C is switched from high to low.
 一方、時刻t3において、トランジスタQ2がオフになったことにより、押検出手段11のトランジスタQ6のベース端子の電位が下がり、その結果、トランジスタQ6のエミッタ端子の電位は下がる。これにより、D点の状態はローとなる。 On the other hand, since the transistor Q2 is turned off at time t3, the potential of the base terminal of the transistor Q6 of the push detection means 11 decreases, and as a result, the potential of the emitter terminal of the transistor Q6 decreases. As a result, the state of the point D becomes low.
 開閉回路10では、ラッチ回路9からの出力がローであり、押検出回路11からの出力がローである場合には、抵抗R24の両端子間の電位差がトランジスタQ9のベース-エミッタ間電圧より大きくなることになり、トランジスタQ9がオンとなる。 In the switching circuit 10, when the output from the latch circuit 9 is low and the output from the push detection circuit 11 is low, the potential difference between both terminals of the resistor R24 is larger than the base-emitter voltage of the transistor Q9. Thus, the transistor Q9 is turned on.
 トランジスタQ9がオンである場合には、弁回路10aに電流が流れるので、電解効果トランジスタQ8,Q10のゲート電圧が上がり、その結果、電解効果トランジスタQ8,Q10がオンとなる。よって、時刻t3において、電解効果トランジスタQ8,Q10はオンになるので、電力線4aが導通し、それにより、AC出力部3から電力が出力される(即ち、オンとなる)。 When the transistor Q9 is on, a current flows through the valve circuit 10a, so that the gate voltages of the field effect transistors Q8 and Q10 rise, and as a result, the field effect transistors Q8 and Q10 are turned on. Therefore, at time t3, the field effect transistors Q8 and Q10 are turned on, so that the power line 4a is conducted, whereby power is output from the AC output unit 3 (that is, turned on).
 その後、時刻t4において、操作スイッチ50が押下されなくなる(操作スイッチ50から手が離される)と、二次側コイルL2が開放されるので、発振回路6からは再びブロッキング発振の出力が開始され、時刻t5において、発振回路6から出力されるブロッキング発振の電圧振幅が十分な大きさになると、検出回路8のトランジスタQ2がオンになり、それに伴い、トランジスタQ3がオフになる。その結果、時刻t5において、検出回路8からラッチ回路9への出力、即ち、B点の状態はハイからローに切り換わる。 After that, at time t4, when the operation switch 50 is not pressed down (the hand is released from the operation switch 50), the secondary coil L2 is opened, so that the oscillation circuit 6 starts outputting blocking oscillation again. At time t5, when the voltage amplitude of the blocking oscillation output from the oscillation circuit 6 becomes sufficiently large, the transistor Q2 of the detection circuit 8 is turned on, and accordingly, the transistor Q3 is turned off. As a result, at time t5, the output from the detection circuit 8 to the latch circuit 9, that is, the state of the point B is switched from high to low.
 ポジティブエッジトリガ形であるIC1の端子CKに、ハイからローへの立ち下がりエッジが入力されても、端子Qからの出力は変化しない。よって、時刻t5における、ラッチ回路9から開閉回路10への出力、即ち、C点での出力はローのままである。 The output from the terminal Q does not change even if a falling edge from high to low is input to the terminal CK of the positive edge trigger type IC1. Therefore, the output from the latch circuit 9 to the switching circuit 10 at time t5, that is, the output at the point C remains low.
 一方、操作スイッチ50が押下されなくなったことにより、時刻t5において、検出回路8のトランジスタQ2がオフからオンに切り換わると、押検出回路11のトランジスタQ6のエミッタ端子の電位も上がる。よって、時刻t5において、押検出回路11から開閉回路10への出力、即ち、D点における出力はローからハイに切り換わる。 On the other hand, when the operation switch 50 is no longer pressed and the transistor Q2 of the detection circuit 8 is switched from OFF to ON at time t5, the potential of the emitter terminal of the transistor Q6 of the push detection circuit 11 also increases. Therefore, at time t5, the output from the push detection circuit 11 to the switching circuit 10, that is, the output at the point D switches from low to high.
 開閉回路10では、ラッチ回路9からの出力がローであり、押検出回路11からの出力がハイである場合には、抵抗R24の両端子間に生じる電位差により、トランジスタQ9はオンとなる。つまり、時刻t5においても、トランジスタQ9はオンのままであり、その結果、弁回路10aの電解効果トランジスタQ8,Q10もまたオンのまま変化せず、AC出力部3からは電力が出力され続ける。 In the open / close circuit 10, when the output from the latch circuit 9 is low and the output from the push detection circuit 11 is high, the transistor Q9 is turned on due to a potential difference generated between both terminals of the resistor R24. That is, at time t5, the transistor Q9 remains on. As a result, the field effect transistors Q8 and Q10 of the valve circuit 10a also remain on, and power is continuously output from the AC output unit 3.
 その後、時刻t6において、操作スイッチ50が二度目に押下された場合、二次側コイルL2が短絡されたことにより、時刻t7において、発振回路6からの出力が所定レベル以下となる。 Thereafter, when the operation switch 50 is pressed for the second time at time t6, the output from the oscillation circuit 6 becomes a predetermined level or less at time t7 because the secondary coil L2 is short-circuited.
 発振回路6からの出力が所定レベル以下になると、検出回路8のトランジスタQ2がオフとなり、それに伴い、トランジスタQ3がオンとなる。よって、時刻t7において、検出回路8からラッチ回路9への出力、即ち、B点の状態はローからハイに切り換わる。 When the output from the oscillation circuit 6 falls below a predetermined level, the transistor Q2 of the detection circuit 8 is turned off, and accordingly, the transistor Q3 is turned on. Therefore, at time t7, the output from the detection circuit 8 to the latch circuit 9, that is, the state at the point B is switched from low to high.
 これにより、IC1の端子CKへの入力がローからハイに立ち上がるので、その立ち上がりエッジに同期して、IC1の端子Qからの出力が反転されてローからハイに切り換わる。その結果、時刻t7におけるラッチ回路9から開閉回路10への出力、即ち、C点での出力はローからハイに切り換わる。 As a result, the input to the terminal CK of the IC1 rises from low to high, and in synchronization with the rising edge, the output from the terminal Q of the IC1 is inverted and switched from low to high. As a result, the output from the latch circuit 9 to the switching circuit 10 at time t7, that is, the output at the point C is switched from low to high.
 一方、操作スイッチ50が押下されたことにより、時刻t7において、検出回路8のトランジスタQ2がオンからオフに切り換わると、押検出回路11のトランジスタQ6のエミッタ端子の電位も下がる。よって、時刻t7において、押検出回路11から開閉回路10への出力、即ち、D点における出力はハイからローに切り換わる。 On the other hand, when the operation switch 50 is pressed and the transistor Q2 of the detection circuit 8 switches from on to off at time t7, the potential of the emitter terminal of the transistor Q6 of the push detection circuit 11 also decreases. Therefore, at time t7, the output from the push detection circuit 11 to the switching circuit 10, that is, the output at the point D switches from high to low.
 開閉回路10では、ラッチ回路9からの出力がハイであり、押検出回路11からの出力がローである場合には、抵抗R24における両端子間に生じる電位差により、トランジスタQ9はオンとなる。つまり、時刻t7においても、トランジスタQ9はオンのままであり、その結果、弁回路10aの電解効果トランジスタQ8,Q10もまたオンのまま変化せず、AC出力部3からは電力が出力され続ける。 In the open / close circuit 10, when the output from the latch circuit 9 is high and the output from the push detection circuit 11 is low, the transistor Q9 is turned on due to a potential difference generated between both terminals of the resistor R24. That is, at time t7, the transistor Q9 remains on. As a result, the field effect transistors Q8 and Q10 of the valve circuit 10a also remain on and the power is continuously output from the AC output unit 3.
 その後、時刻t8において、操作スイッチ50が押下されなくなり、二次側コイルL2が開放されると、発振回路6からは再びブロッキング発振の出力が開始される。そして、時刻t9において、その電圧振幅が十分な大きさになると、検出回路8のトランジスタQ2がオンになり、それに伴い、トランジスタQ3がオフになる。その結果、時刻t9において、検出回路8からラッチ回路9への出力、即ち、B点の状態はハイからローに切り換わる。 After that, at time t8, when the operation switch 50 is not pressed down and the secondary coil L2 is opened, the oscillation circuit 6 starts outputting blocking oscillation again. When the voltage amplitude becomes sufficiently large at time t9, the transistor Q2 of the detection circuit 8 is turned on, and accordingly, the transistor Q3 is turned off. As a result, at time t9, the output from the detection circuit 8 to the latch circuit 9, that is, the state of the point B is switched from high to low.
 これにより、IC1の端子CKへの入力がハイからローに立ち下がるが、端子CKに立ち下がりエッジが入力されても、端子Qからの出力は変化しないので、端子Qからの出力は変化しない。よって、時刻t9におけるラッチ回路9から開閉回路10への出力、即ち、C点での出力はハイのままである。 Thereby, the input to the terminal CK of the IC1 falls from high to low, but even if a falling edge is inputted to the terminal CK, the output from the terminal Q does not change, so the output from the terminal Q does not change. Therefore, the output from the latch circuit 9 to the switching circuit 10 at time t9, that is, the output at the point C remains high.
 一方、操作スイッチ50が押下されなくなったことにより、時刻t9において、検出回路8のトランジスタQ2がオフからオンに切り換わると、押検出回路11のトランジスタQ6のエミッタ端子の電位も上がる。よって、時刻t9において、押検出回路11から開閉回路10への出力、即ち、D点における出力はローからハイに切り換わる。 On the other hand, when the operation switch 50 is no longer pressed and the transistor Q2 of the detection circuit 8 is switched from OFF to ON at time t9, the potential of the emitter terminal of the transistor Q6 of the push detection circuit 11 also increases. Therefore, at time t9, the output from the push detection circuit 11 to the switching circuit 10, that is, the output at the point D switches from low to high.
 開閉回路10では、ラッチ回路9からの出力がハイであり、押検出回路11からの出力がハイである場合には、トランジスタQ9がオフになり、その結果として、弁回路10aの電解効果トランジスタQ8,Q10がオフとなる。よって、時刻t9において、AC出力部3からの出力は0V(即ち、オフ)となる。 In the switching circuit 10, when the output from the latch circuit 9 is high and the output from the push detection circuit 11 is high, the transistor Q9 is turned off. As a result, the field effect transistor Q8 of the valve circuit 10a is turned off. , Q10 is turned off. Therefore, at time t9, the output from the AC output unit 3 is 0 V (that is, off).
 その後、時刻t10において、操作スイッチ50が三度目に押下されると、時刻t2のときと同様に、二次側コイルL2が短絡された結果、時刻t11において、発振回路6からの出力は所定レベル以下となる。よって、時刻t11において、検出回路8からラッチ回路9への出力、即ち、B点の状態はローからハイに切り換わる。これにより、ラッチ回路9におけるIC1の端子Qからの出力が反転される。よって、時刻t11において、ラッチ回路9から開閉回路10への出力(C点での出力)はハイからローに切り換わる。 After that, when the operation switch 50 is pressed for the third time at time t10, the output from the oscillation circuit 6 is at a predetermined level at time t11 as a result of the secondary coil L2 being short-circuited, as in time t2. It becomes as follows. Therefore, at time t11, the output from the detection circuit 8 to the latch circuit 9, that is, the state of the point B is switched from low to high. As a result, the output from the terminal Q of the IC 1 in the latch circuit 9 is inverted. Therefore, at time t11, the output from the latch circuit 9 to the switching circuit 10 (the output at point C) is switched from high to low.
 その一方で、操作スイッチ50が押下されると、押検出回路11のトランジスタQ6のエミッタ端子の電位は下がるので、時刻t11において、押検出回路11から開閉回路10への出力、即ち、D点における出力はハイからローに切り換わる。 On the other hand, when the operation switch 50 is pressed, the potential of the emitter terminal of the transistor Q6 of the push detection circuit 11 is lowered. Therefore, at time t11, the output from the push detection circuit 11 to the switching circuit 10, that is, at the point D. The output switches from high to low.
 開閉回路10では、ラッチ回路9からの出力がハイであり、押検出回路11からの出力がローである場合には、トランジスタQ9がオンになり、それに伴い、弁回路10aの電解効果トランジスタQ8,Q10がオンとなる。よって、時刻t11において、再び、AC出力部3から電力が出力される(即ち、オンとなる)。 In the switching circuit 10, when the output from the latch circuit 9 is high and the output from the push detection circuit 11 is low, the transistor Q9 is turned on, and accordingly, the field effect transistors Q8, Q8, Q10 turns on. Therefore, at time t11, power is output again from the AC output unit 3 (that is, turned on).
 その後、時刻t12において、操作スイッチ50が押下されなくなると、時刻t4のときと同様に、発振回路6からブロッキング発振が出力され、時刻t13において、その電圧振幅が十分な大きさとなると、検出回路8からラッチ回路9への出力(即ち、B点における出力)はハイからローに切り換わる。よって、IC1の端子CKへの入力がハイからローに立ち下がるが、かかる場合には、端子Qからの出力は変化しないので、時刻t13におけるラッチ回路9から開閉回路10への出力はローのまま変化しない。 Thereafter, when the operation switch 50 is not depressed at time t12, a blocking oscillation is output from the oscillation circuit 6 as at time t4. When the voltage amplitude becomes sufficiently large at time t13, the detection circuit 8 To the latch circuit 9 (ie, the output at point B) switches from high to low. Therefore, the input to the terminal CK of the IC1 falls from high to low, but in this case, the output from the terminal Q does not change, so the output from the latch circuit 9 to the switching circuit 10 at time t13 remains low. It does not change.
 その一方で、操作スイッチ50が押下されなくなると、押検出回路11のトランジスタQ6のエミッタ端子の電位は上がるので、時刻t13において、押検出回路11から開閉回路10への出力はローからハイに切り換わる。 On the other hand, when the operation switch 50 is not pressed down, the potential of the emitter terminal of the transistor Q6 of the push detection circuit 11 rises. Therefore, at time t13, the output from the push detection circuit 11 to the switching circuit 10 is switched from low to high. Change.
 開閉回路10では、ラッチ回路9からの出力がローであり、押検出回路11からの出力がハイである場合には、トランジスタQ9がオンになる。即ち、時刻13において、トランジスタQ9がオンのまま変化しないので、弁回路10aの電解効果トランジスタQ8,Q10もオンのままであり、その結果として、AC出力部3からは電力が出力されたまま(即ち、オンのまま)となる。 In the open / close circuit 10, when the output from the latch circuit 9 is low and the output from the push detection circuit 11 is high, the transistor Q9 is turned on. That is, at time 13, since the transistor Q9 remains on, the field effect transistors Q8 and Q10 of the valve circuit 10a also remain on. As a result, power is output from the AC output unit 3 ( That is, it remains on).
 電子楽器100の不使用時間が所定時間を超えた場合に、該電子楽器100の制御装置(CPU)は、電子スイッチ装置100へパワーマネジメント入力を行う。このパワーマネジメント入力が、時刻t14においてコネクタ51を介して入力された場合、フォトカプラ12aにおけるフォトトランジスタQ11がオンとなり、それにより、E点における入力はハイとなる。その結果、トランジスタQ4のベース端子の電位が高くなり、トランジスタQ4のベース端子とエミッタ端子との間にかかる電圧が、トランジスタQ4のベース-エミッタ間電圧より低くなり、その結果として、トランジスタQ4はオフとなる。よって、時刻t14におけるF点での出力はローとなる。 When the non-use time of the electronic musical instrument 100 exceeds a predetermined time, the control device (CPU) of the electronic musical instrument 100 performs power management input to the electronic switch device 100. When this power management input is input via the connector 51 at time t14, the phototransistor Q11 in the photocoupler 12a is turned on, whereby the input at point E is high. As a result, the potential of the base terminal of the transistor Q4 becomes high, and the voltage applied between the base terminal and the emitter terminal of the transistor Q4 becomes lower than the base-emitter voltage of the transistor Q4. As a result, the transistor Q4 is turned off. It becomes. Therefore, the output at point F at time t14 is low.
 トランジスタQ4がオフになったことにより、ラッチ回路9におけるIC1の端子PRにはロー入力されるので、IC1の端子Qからの出力は優先的にハイとなる。よって、時刻t14におけるC点での出力はハイとなる。 Since the transistor Q4 is turned off, a low input is made to the terminal PR of the IC1 in the latch circuit 9, so that the output from the terminal Q of the IC1 becomes preferentially high. Therefore, the output at point C at time t14 is high.
 よって、時刻t14において、開閉回路10では、ラッチ回路9からの出力がハイである。一方、操作スイッチ50が押下されていないので、押検出回路11からの出力もハイである。その結果、トランジスタQ9はオフとなり、その結果、電解効果トランジスタQ8,Q10がオフとなる。このように、パワーマネジメント入力があった時刻t14では、AC出力部3からの出力はオフとなる。 Therefore, at time t14, in the switching circuit 10, the output from the latch circuit 9 is high. On the other hand, since the operation switch 50 is not pressed, the output from the press detection circuit 11 is also high. As a result, the transistor Q9 is turned off, and as a result, the field effect transistors Q8 and Q10 are turned off. As described above, at time t14 when the power management is input, the output from the AC output unit 3 is turned off.
 電子楽器100からのパワーマネジメント入力によりAC出力部3からの出力をオフした後は、操作スイッチ50の押下を待機する状態となるが、ラッチ回路9からの出力がハイに戻された状態で待機しているので、操作スイッチ50の次の押下をスイッチオンの操作として扱うことができる。よって、使用者が操作スイッチ50を押下しても電子楽器100に電力が供給されないことを防ぐことができる。 After the output from the AC output unit 3 is turned off by the power management input from the electronic musical instrument 100, the operation waits for the operation switch 50 to be pressed, but waits with the output from the latch circuit 9 returned to high. Therefore, the next press of the operation switch 50 can be handled as a switch-on operation. Therefore, it is possible to prevent power from being supplied to the electronic musical instrument 100 even when the user presses the operation switch 50.
 以上説明した通り、本実施形態の電子スイッチ装置1によれば、トランスTR1における1次側コイルL1を共振回路7におけるコイルとして用いることにより、操作スイッチ50の操作の有無を、ブロッキング発振の状態に反映させ、商用交流電源からの電力を電子楽器100へ供給したり遮断したりすることができる。ここで、操作スイッチ50を、一次側コイルL1に対して絶縁された二次側コイルL2の側に設けるので、各国の安全規格に準拠しない安価な操作スイッチ部品を操作スイッチ50として使用したとしても、使用者の安全を確保することができる。 As described above, according to the electronic switch device 1 of the present embodiment, by using the primary side coil L1 in the transformer TR1 as a coil in the resonance circuit 7, the presence / absence of operation of the operation switch 50 is changed to a blocking oscillation state. The electric power from the commercial AC power supply can be supplied to or cut off from the electronic musical instrument 100. Here, since the operation switch 50 is provided on the side of the secondary coil L2 insulated from the primary coil L1, even if an inexpensive operation switch component that does not comply with the safety standards of each country is used as the operation switch 50. , User safety can be ensured.
 また、操作スイッチ50が接続される二次側コイルL2と、一次側コイルL1とが絶縁されていることにより、二次側コイルL2と操作スイッチ50とを接続する電線も、高電圧用の高価な電線でなく安価な電線を使用することができる。また、商用交流電源とは電気的に絶縁されていることにより、輻射ノイズを考慮することなく電線の長さを自在に長くすることができるので、電子スイッチ装置1と操作スイッチ50との配置(レイアウト)を自在に変更することができる。 Further, since the secondary side coil L2 to which the operation switch 50 is connected and the primary side coil L1 are insulated, the electric wire connecting the secondary side coil L2 and the operation switch 50 is also expensive for high voltage. An inexpensive electric wire can be used instead of a simple electric wire. Further, since the length of the electric wire can be increased freely without considering radiation noise by being electrically insulated from the commercial AC power supply, the arrangement of the electronic switch device 1 and the operation switch 50 ( Layout) can be changed freely.
 また、本実施形態の電子スイッチ装置1によれば、商用交流電源から電子楽器100への電力を遮断した後は、機械式の操作スイッチ50を操作することにより再び電力供給させることができるので、電気的なスイッチ入力を待機するための電力を不要にでき、それにより、電力消費の無駄を省くことができる。 Further, according to the electronic switch device 1 of the present embodiment, after the power from the commercial AC power source to the electronic musical instrument 100 is cut off, the power can be supplied again by operating the mechanical operation switch 50. It is possible to eliminate the need for electric power to wait for an electrical switch input, thereby eliminating waste of power consumption.
 また、本実施形態の電子スイッチ装置1によれば、共振回路7を設けることにより発振回路6をブロッキング発振させることにより、発振回路6を省電力設計したとしても、検出回路8での検出動作を安定させるのに十分な電圧振幅を得ることができる。 Further, according to the electronic switch device 1 of the present embodiment, even if the oscillation circuit 6 is designed to save power by blocking the oscillation of the oscillation circuit 6 by providing the resonance circuit 7, the detection operation in the detection circuit 8 can be performed. A voltage amplitude sufficient to stabilize can be obtained.
 また、本実施形態の電子スイッチ装置1によれば、電力使用部である電子楽器100の制御装置あるいは他の機器からのパワーマネジメント入力により、商用交流電源から電子楽器100への電力を遮断(オフ)することができるので、電子楽器100の不使用時に無駄な電力が消費されることがない。そして、操作スイッチ50がアンラッチ型のスイッチであり、ラッチ型のスイッチのように次の操作がされるまでは非操作時であっても状態が固定されるものとは異なり、非操作時には必ず二次側コイルL2の両端が開放された状態となるので、電子楽器100の制御装置からのパワーマネジメント入力により電力を遮断すれば、確実に電力の遮断を行うことができる。なお、電子楽器100から電子スイッチ装置100をオフするための入力は、不使用時に出力されるパワーマネジメント入力に限らず、電子楽器100の設計に応じて種々の入力を適用することができる。 Further, according to the electronic switch device 1 of the present embodiment, the power from the commercial AC power source to the electronic musical instrument 100 is cut off (off) by the power management input from the control device of the electronic musical instrument 100 that is the power usage unit or other equipment. Therefore, useless power is not consumed when the electronic musical instrument 100 is not used. The operation switch 50 is an unlatch type switch, and unlike the latch type switch, the state is fixed even when it is not operated until the next operation is performed. Since both ends of the secondary coil L2 are opened, if the power is cut off by the power management input from the control device of the electronic musical instrument 100, the power can be cut off reliably. The input for turning off the electronic switch device 100 from the electronic musical instrument 100 is not limited to the power management input that is output when not in use, and various inputs can be applied according to the design of the electronic musical instrument 100.
 ここで、電子スイッチ装置1によれば、操作スイッチ50として、アンラッチ型のスイッチを用いているので、非操作時にはトランスTR1の二次側コイルL2の両端が必ず開放されている。よって、電子楽器100から入力されたパワーマネジメント入力によって電力の遮断を行った場合には、その遮断を確実に行うことができ、パワーマネジメント入力がされたにもかかわらず、操作スイッチ50の状態によって電源が遮断されず、無駄に電力が消費されることを防止できる。 Here, according to the electronic switch device 1, since an unlatch type switch is used as the operation switch 50, both ends of the secondary coil L2 of the transformer TR1 are always opened when not operated. Therefore, when power is interrupted by the power management input input from the electronic musical instrument 100, the power can be reliably interrupted, and the power management input is performed, depending on the state of the operation switch 50. It is possible to prevent the power from being unnecessarily consumed without being shut off.
 また、本実施形態の電子スイッチ装置1によれば、ラッチ回路9としてポジティブエッジトリガ形のフリップフロップICを使用したので、検出回路8からの出力が2回立ち上がる毎に、ラッチ回路9(IC1の端子Q)からの出力が元に戻る。よって、かかるラッチ回路9の出力は、アンラッチ型のスイッチにおけるスイッチオンのために操作と、スイッチオフのための操作とを区別することができ。アンラッチ型のスイッチを操作スイッチ50として使用することを可能にしている。 Further, according to the electronic switch device 1 of the present embodiment, since the positive edge trigger type flip-flop IC is used as the latch circuit 9, the latch circuit 9 (IC1 of the IC1) is output every time the output from the detection circuit 8 rises twice. The output from terminal Q) is restored. Therefore, the output of the latch circuit 9 can distinguish between an operation for switching on and an operation for switching off in an unlatch type switch. An unlatch type switch can be used as the operation switch 50.
 また、本実施形態の電子スイッチ装置1によれば、電源投入(AC入力部2を商用交流電源に接続すること)から、ラッチ回路9の端子PR(プリセット端子)へハイが出力されるまでの期間を遅延させるコンデンサC11をリセット回路12に有しているので、電源投入時には必ずラッチ回路9の端子PRへローが出力されることになる。よって、電源投入時には、ラッチ回路9の端子Qからハイが出力されるので、操作スイッチ50が操作しなければ、AC出力部3から電力は供給されない。これにより、AC入力部2を商用交流電源に接続したときに意図せず電子楽器100が駆動することを防止できる。 Further, according to the electronic switch device 1 of the present embodiment, from when the power is turned on (the AC input unit 2 is connected to the commercial AC power supply) until high is output to the terminal PR (preset terminal) of the latch circuit 9. Since the reset circuit 12 has the capacitor C11 for delaying the period, a low is always output to the terminal PR of the latch circuit 9 when the power is turned on. Therefore, when the power is turned on, high is output from the terminal Q of the latch circuit 9, so that power is not supplied from the AC output unit 3 unless the operation switch 50 is operated. This can prevent the electronic musical instrument 100 from being unintentionally driven when the AC input unit 2 is connected to a commercial AC power supply.
 その一方で、操作スイッチ50が押下されている間は、押検出回路11からの出力(D点の出力)が必ずローとなる。そして、押検出回路11からの出力がローであれば、抵抗R23~R24とトランジスタQ9とにより、ラッチ回路9からの出力(C点の出力)がどのような状態であっても、トランジスタQ9がオンになり、その結果、弁回路10aの電解効果トランジスタQ8,Q10がオンとなり、AC出力部3から電力を出力させることができる。よって、操作スイッチ50を押下(操作)しながら電源投入(即ち、AC入力部2を商用交流電源に接続)することにより、電源投入したタイミングで電子楽器100を駆動させることができる。 On the other hand, while the operation switch 50 is being pressed, the output from the press detection circuit 11 (the output at point D) is always low. If the output from the push detection circuit 11 is low, the resistors R23 to R24 and the transistor Q9 cause the transistor Q9 to be in whatever state the output from the latch circuit 9 (the output at point C) is. As a result, the field effect transistors Q8 and Q10 of the valve circuit 10a are turned on, and power can be output from the AC output unit 3. Therefore, the electronic musical instrument 100 can be driven when the power is turned on by turning on the power while pressing (operating) the operation switch 50 (that is, connecting the AC input unit 2 to the commercial AC power).
 以上、実施形態に基づき本発明を説明したが、本発明は上記形態に何ら限定されるものではなく、本発明の趣旨を逸脱しない範囲内で種々の変形改良が可能であることは容易に推察できるものである。 As described above, the present invention has been described based on the embodiment, but the present invention is not limited to the above-described embodiment, and various modifications can be easily made without departing from the gist of the present invention. It can be done.
 例えば、上記実施形態では、操作スイッチ50として、アンラッチ型のスイッチを使用したが、ラッチ型のスイッチであってもよい。 For example, in the above embodiment, an unlatch type switch is used as the operation switch 50, but a latch type switch may be used.
 また、上記実施形態では、発振回路6をコルピッツ発振回路として構成したが、他のタイプの発振回路(例えば、ハートレー発振回路など)を発振回路6として使用してもよい。また、セラミック発振子Hを、水晶発振子など他のタイプの発振子としてもよい。 In the above embodiment, the oscillation circuit 6 is configured as a Colpitts oscillation circuit. However, other types of oscillation circuits (for example, a Hartley oscillation circuit) may be used as the oscillation circuit 6. The ceramic oscillator H may be another type of oscillator such as a crystal oscillator.
 また、上記実施形態では、共振回路7として、一次側コイルL1とコンデンサC3とを直列接続したものの各端を、トランジスタQ1のエミッタ端子及びベース端子に接続する構成としたが、一次側コイルL1をコイルとして少なくとも含み、発振回路6にブロッキング発振を生じさせることができる他の形態の回路を使用してもよい。 In the above embodiment, the resonance circuit 7 is configured such that each end of the primary coil L1 and the capacitor C3 connected in series is connected to the emitter terminal and the base terminal of the transistor Q1, but the primary coil L1 is Another form of circuit that includes at least the coil and can generate blocking oscillation in the oscillation circuit 6 may be used.
 また、上記実施形態では、検出回路8はラッチ回路9に検出結果を2値で出力する構成としたが、ブロッキング発振の電圧振幅に基づいたアナログ量を検出回路8から開閉回路10に直接出力し、開閉回路10において閾値を設けて導通と遮断を切替えるように構成してもよい。 In the above embodiment, the detection circuit 8 is configured to output the detection result as a binary value to the latch circuit 9. However, an analog amount based on the voltage amplitude of the blocking oscillation is directly output from the detection circuit 8 to the switching circuit 10. The switching circuit 10 may be configured to provide a threshold value so as to switch between conduction and interruption.
 また、上記実施形態では、発振回路6と、一次側コイルL1とコンデンサC3とから構成される共振回路7とを設け、共振回路7による発振によって、発振回路6(発振部G)にブロッキング発振を生じさせる構成としたが、かかる構成に限らず、A点より前段の回路(即ち、検出回路8へ信号を出力する回路)は、二次側コイルL2が開放されている場合に発振し、二次側コイルが短絡されている場合に発振が停止する(又は、発振の電圧振幅が後段の検出回路8において検出されない大きさとなる)構成であれば、電子スイッチ装置1に適用することができる。 In the above embodiment, the oscillation circuit 6 and the resonance circuit 7 including the primary coil L1 and the capacitor C3 are provided, and the oscillation by the resonance circuit 7 causes blocking oscillation to the oscillation circuit 6 (the oscillation unit G). However, the circuit before the point A (that is, the circuit that outputs a signal to the detection circuit 8) oscillates when the secondary coil L2 is open. If the configuration is such that the oscillation stops when the secondary coil is short-circuited (or the oscillation voltage amplitude is not detected by the detection circuit 8 at the subsequent stage), it can be applied to the electronic switch device 1.
 例えば、共振回路を設けることなく、即ち、発振回路にブロッキング発振を生じさせることなく、電子スイッチ装置1を構成することも可能である。図4は、変形例としての発振回路60示す回路図である。なお、発振回路60において、上述した発振回路6(図1参照)と同様の機能を果たす部品については、同一の符号を付し、その説明は省略する。 For example, the electronic switch device 1 can be configured without providing a resonance circuit, that is, without causing blocking oscillation in the oscillation circuit. FIG. 4 is a circuit diagram showing an oscillation circuit 60 as a modification. In the oscillation circuit 60, components having the same functions as those of the oscillation circuit 6 (see FIG. 1) described above are denoted by the same reference numerals, and description thereof is omitted.
 図4に示す発振回路60は、5つの抵抗R1,R51~R54と、電解コンデンサC1と、5つのコンデンサC2,C5,C51,C52,C103と、2つのPNP型のトランジスタQ51,Q52と、一次側コイルL1とから構成される。この発振回路60は、発振回路6及び共振回路7に換えて上述した図1の電子スイッチ装置1に設けられる。具体的に、トランジスタQ52のエミッタ端子が、検出回路8におけるダイオードD2のカソード(即ち、+Vcc)に接続される。また、コンデンサC5におけるトランジスタQ52のコレクタ端子に接続されていない側の端(即ち、A点側の端)が、抵抗R8におけるトランジスタQ2のベース端子が接続されていない側の端に接続される。 The oscillation circuit 60 shown in FIG. 4 includes five resistors R1, R51 to R54, an electrolytic capacitor C1, five capacitors C2, C5, C51, C52, and C103, two PNP transistors Q51 and Q52, and a primary It is comprised from the side coil L1. The oscillation circuit 60 is provided in the electronic switch device 1 of FIG. 1 described above in place of the oscillation circuit 6 and the resonance circuit 7. Specifically, the emitter terminal of the transistor Q52 is connected to the cathode (ie, + Vcc) of the diode D2 in the detection circuit 8. Further, the end of the capacitor C5 that is not connected to the collector terminal of the transistor Q52 (that is, the end on the A point side) is connected to the end of the resistor R8 that is not connected to the base terminal of the transistor Q2.
 発振回路60を構成する部品のうち、4つの抵抗R51~R54と、2つのコンデンサC51,C52と、2つのトランジスタQ51,Q52とから構成される回路は、非安定マルチバイブレータ発振回路である。発振回路60では、この非安定マルチバイブレータ発振回路におけるトランジスタQ51のコレクタ端子に、コンデンサC103の一端が接続され、コンデンサC103の他端は、一次側コイルL1の一端に接続される。一次側コイルL1の他端は、トランジスタQ52のコレクタ端子に接続される。 Among the components constituting the oscillation circuit 60, a circuit constituted by four resistors R51 to R54, two capacitors C51 and C52, and two transistors Q51 and Q52 is an astable multivibrator oscillation circuit. In the oscillation circuit 60, one end of the capacitor C103 is connected to the collector terminal of the transistor Q51 in this unstable multivibrator oscillation circuit, and the other end of the capacitor C103 is connected to one end of the primary coil L1. The other end of primary side coil L1 is connected to the collector terminal of transistor Q52.
 かかる構成を有する発振回路60は、二次側コイルL2が開放されているときには、非安定マルチバイブレータ発振回路(トランジスタQ51,Q52、抵抗R51~R54、コンデンサC51,C52)により生じた発振信号をA点から出力する。一方、操作スイッチ50が操作されたことにより二次側コイルL2が短絡されると、上述した発振回路6と同様、一次側コイルL1のインダクタ値の減少に起因して発振回路60における非安定マルチバイブレータ発振回路の発振が停止する。 When the secondary coil L2 is opened, the oscillation circuit 60 having such a configuration can generate an oscillation signal generated by the unstable multivibrator oscillation circuit (transistors Q51 and Q52, resistors R51 to R54, capacitors C51 and C52) as A. Output from the point. On the other hand, when the secondary coil L2 is short-circuited by operating the operation switch 50, as in the oscillation circuit 6, the unstable multi-phase in the oscillation circuit 60 is reduced due to the decrease in the inductor value of the primary coil L1. The oscillation of the vibrator oscillation circuit stops.
 このように、発振回路60からの出力(検出回路8への入力)の状態は、操作スイッチ50の押下に応じた二次側コイルL2の両端の状態(開放又は短絡)を反映して変化するので、発振回路60を、発振回路6及び共振回路7に換わる電子スイッチ装置1の構成として適用することができる。かかる発振回路60を用いる場合には、セラミック発振子Hを含む発振回路6より安価に発振回路を構成することができる。 As described above, the state of the output from the oscillation circuit 60 (input to the detection circuit 8) changes to reflect the state (open or shorted) of both ends of the secondary coil L2 in response to pressing of the operation switch 50. Therefore, the oscillation circuit 60 can be applied as a configuration of the electronic switch device 1 that replaces the oscillation circuit 6 and the resonance circuit 7. When such an oscillation circuit 60 is used, the oscillation circuit can be configured at a lower cost than the oscillation circuit 6 including the ceramic oscillator H.
 また、発振手段としての発振回路60及び検出手段としての検出回路8に換えて、一次側コイルL1とワンチップマイコンとにより発振手段と検出手段とを構成してもよい。即ち、ワンチップマイコンにより発振と当該発振の検出とを行う構成としてもよい。 Further, instead of the oscillation circuit 60 as the oscillation means and the detection circuit 8 as the detection means, the oscillation means and the detection means may be configured by the primary coil L1 and the one-chip microcomputer. That is, a configuration may be adopted in which oscillation and detection of the oscillation are performed by a one-chip microcomputer.
 また、上記実施形態では、検出回路8として、6つの抵抗R8~R13と、ダイオードD2と、コンデンサC7と、2つのトランジスタQ2,Q3とから構成されるフリップフロップ回路を例示したが、ICにより構成してもよい。 In the above embodiment, the detection circuit 8 is exemplified by a flip-flop circuit including six resistors R8 to R13, a diode D2, a capacitor C7, and two transistors Q2 and Q3. May be.
 また、上記実施形態では、操作スイッチ50を操作する毎に検出回路8からラッチ回路9への出力が立ち上がるようにしたが、操作スイッチ50を操作する毎に検出回路8からラッチ回路9への出力が立ち下がるようにしてもよい。かかる場合には、ラッチ回路9のIC1を、ネガティブエッジトリガ形のものとすればよい。 In the above embodiment, every time the operation switch 50 is operated, the output from the detection circuit 8 to the latch circuit 9 rises. However, every time the operation switch 50 is operated, the output from the detection circuit 8 to the latch circuit 9. May fall. In such a case, the IC 1 of the latch circuit 9 may be of a negative edge trigger type.
 また、上記実施形態では、開閉回路10における弁回路10aにおいて、電力線4aの導通と遮断とを切り換えるための部品として、MOS-FET(電解効果トランジスタQ8,Q10)を使用する構成としたが、トライアックや、絶縁ゲートバイポーラトランジスタ(IGBT)などを用いる構成としてもよい。 In the above embodiment, the valve circuit 10a in the switching circuit 10 is configured to use MOS-FETs (electrolytic effect transistors Q8, Q10) as components for switching between conduction and interruption of the power line 4a. Alternatively, an insulating gate bipolar transistor (IGBT) or the like may be used.
 また、上記実施形態では、トランジスタとしてPNP型のものを使用して回路を構成したが、NPN型のものを使用して回路を構成してもよい。 In the above embodiment, the circuit is configured using a PNP transistor as the transistor, but the circuit may be configured using an NPN transistor.
 また、上記実施形態の電子スイッチ装置1は、商用交流電源から電力使用部である電子楽器100への電力の供給と遮断とを切り換えるものとしたが、直流電源を電力供給源として、該直流電源から電力使用部への電力の供給と遮断とを切り換えるものとして構成してもよく、かかる場合にも上記実施形態の電子スイッチ装置1と同様の効果を得ることができる。 Moreover, although the electronic switch apparatus 1 of the said embodiment shall switch supply and interruption | blocking of the electric power from the commercial AC power supply to the electronic musical instrument 100 which is an electric power use part, DC power supply is used as a power supply source, and this DC power supply The power supply unit may be configured to switch between supply and interruption of power, and in such a case, the same effect as the electronic switch device 1 of the above embodiment can be obtained.
1        電子スイッチ装置
2        AC入力部(コネクタ)
4a       電力線(電力供給路)
6        発振回路(発振手段)
7        共振回路(共振手段)
8        検出回路(検出手段)
9        ラッチ回路(ラッチ手段)
10       開閉回路(切換手段)
11       押検出手段(第2の検出手段)
12       リセット回路(初期化手段、第2初期化手段)
12a      フォトカプラ(制御入力手段の一部)
50       操作スイッチ
51       コネクタ(制御入力手段の一部)
60       発振回路(発振手段)
C3       コンデンサ(共振手段のコンデンサ)
C11      コンデンサ(第2初期化手段のコンデンサ)
G        発振部
TR1      トランス
L1       一次側コイル
L2       二次側コイル
PR       プリセット端子(入力端子)
Q1       トランジスタ(発振手段のトランジスタ)
Q4       トランジスタ(第2初期化手段の出力手段)
Q9       トランジスタ(優先手段の一部)
R22~R24  抵抗(優先手段の一部)
1 Electronic switch device 2 AC input section (connector)
4a Power line (power supply path)
6 Oscillation circuit (oscillation means)
7 Resonance circuit (resonance means)
8 detection circuit (detection means)
9 Latch circuit (latch means)
10 Open / close circuit (switching means)
11 Push detection means (second detection means)
12 Reset circuit (initialization means, second initialization means)
12a Photocoupler (part of control input means)
50 Operation switch 51 Connector (part of control input means)
60 Oscillation circuit (oscillation means)
C3 capacitor (capacitor for resonance)
C11 capacitor (capacitor of the second initialization means)
G Oscillator TR1 Transformer L1 Primary coil L2 Secondary coil PR Preset terminal (input terminal)
Q1 transistor (transistor transistor)
Q4 transistor (output means of second initialization means)
Q9 Transistor (part of priority means)
R22 to R24 Resistance (part of priority means)

Claims (8)

  1.  電力供給源と電力使用部との間に介在され、前記電力供給源から前記電力使用部への電力供給路を導通又は遮断する電子スイッチ装置であって、
     一次側コイルと、その一次側コイルに対して絶縁されている二次側コイルとから構成されるトランスと、
     そのトランスにおける二次側コイルの両端の短絡と開放とを切り換える操作スイッチと、
     前記一次側コイルを含み、所定周波数で発振する発振手段と、
     前記発振手段の発振態様を検出する検出手段と、
     前記検出手段の検出結果に基づいて、前記電力供給路の導通と遮断とを切り換える切換手段とを備えていることを特徴とする電子スイッチ装置。
    An electronic switch device that is interposed between a power supply source and a power use unit, and conducts or cuts off a power supply path from the power supply source to the power use unit,
    A transformer composed of a primary coil and a secondary coil insulated from the primary coil;
    An operation switch for switching between short circuit and open at both ends of the secondary coil in the transformer;
    Oscillating means including the primary coil and oscillating at a predetermined frequency;
    Detecting means for detecting an oscillation mode of the oscillating means;
    An electronic switch device comprising switching means for switching between conduction and interruption of the power supply path based on a detection result of the detection means.
  2.  前記検出手段は、前記発振手段からの出力の電圧振幅が所定値を超える場合に、出力を、ハイ又はローのうち予め規定されている第1状態とし、前記発振手段からの出力の電圧振幅が所定値以下である場合に、出力を、前記第1状態とは異なる第2状態とし、
     前記切換手段は、前記検出手段からの出力に基づいて、前記電力供給路の導通と遮断とを切り換えることを特徴とする請求項1記載の電子スイッチ装置。
    When the voltage amplitude of the output from the oscillating means exceeds a predetermined value, the detecting means sets the output to a first state defined in advance as high or low, and the voltage amplitude of the output from the oscillating means is When the output is less than or equal to a predetermined value, the output is set to a second state different from the first state,
    2. The electronic switch device according to claim 1, wherein the switching unit switches between conduction and interruption of the power supply path based on an output from the detection unit.
  3.  電力供給源と電力使用部との間に介在され、前記電力供給源から前記電力使用部への電力供給路を導通又は遮断する電子スイッチ装置であって、
     一次側コイルと、その一次側コイルに対して絶縁されている二次側コイルとから構成されるトランスと、
     そのトランスにおける二次側コイルの両端の短絡と開放とを切り換える操作スイッチと、
     所定周波数で発振する発振部を備えた発振手段と、
     前記一次側コイルを含み、前記操作スイッチが前記二次側コイルの両端を開放している場合に、前記発振手段の発振部にブロッキング発振を生じさせる共振手段と、
     前記発振手段からの出力である前記ブロッキング発振の発振態様を検出する検出手段と、
     前記検出手段の検出結果に基づいて、前記電力供給路の導通と遮断とを切り換える切換手段とを備えていることを特徴とする電子スイッチ装置。
    An electronic switch device that is interposed between a power supply source and a power use unit, and conducts or cuts off a power supply path from the power supply source to the power use unit,
    A transformer composed of a primary coil and a secondary coil insulated from the primary coil;
    An operation switch for switching between short circuit and open at both ends of the secondary coil in the transformer;
    Oscillating means including an oscillating unit that oscillates at a predetermined frequency;
    Resonating means that includes the primary side coil and causes the oscillation unit of the oscillation means to generate blocking oscillation when the operation switch opens both ends of the secondary side coil;
    Detection means for detecting an oscillation mode of the blocking oscillation that is an output from the oscillation means;
    An electronic switch device comprising switching means for switching between conduction and interruption of the power supply path based on a detection result of the detection means.
  4.  前記発振手段は、前記発振部を発振させるためのトランジスタをさらに備え、発振信号を前記トランジスタのエミッタから出力し、
     前記共振手段は、前記一次側コイルと直列に接続されたコンデンサを有し、該直列に接続された一次側コイルとコンデンサとの一端を前記発振手段におけるトランジスタのエミッタに接続すると共に、他端を当該トランジスタのベースに接続したものであり、
     前記検出手段は、前記発振手段からの出力である前記ブロッキング発振の電圧振幅が所定値を超える場合に、出力を、ハイ又はローのうち予め規定されている第1状態とし、前記ブロッキング発振の電圧振幅が所定値以下である場合に、出力を、前記第1状態とは異なる第2状態とし、
     前記切換手段は、前記検出手段からの出力に基づいて、前記電力供給路の導通と遮断とを切り換えることを特徴とする請求項1記載の電子スイッチ装置。
    The oscillating means further includes a transistor for oscillating the oscillating unit, and outputs an oscillation signal from the emitter of the transistor,
    The resonance means includes a capacitor connected in series with the primary side coil, and connects one end of the primary side coil and the capacitor connected in series to the emitter of the transistor in the oscillation means, and the other end. Is connected to the base of the transistor,
    When the voltage amplitude of the blocking oscillation that is an output from the oscillating unit exceeds a predetermined value, the detection unit sets the output to a first state that is defined in advance as high or low, and the voltage of the blocking oscillation When the amplitude is equal to or smaller than a predetermined value, the output is set to a second state different from the first state,
    2. The electronic switch device according to claim 1, wherein the switching unit switches between conduction and interruption of the power supply path based on an output from the detection unit.
  5.  前記操作スイッチは、アンラッチ型のスイッチであり、
     前記検出手段からの入力が前記第1状態から前記第2状態に切り換わる毎に、出力の状態を反転させてラッチするラッチ手段を備え、
     前記切換手段は、前記ラッチ手段からの出力に基づいて、前記電力供給路の導通と遮断とを切り換えることを特徴とする請求項2又は4に記載の電子スイッチ装置。
    The operation switch is an unlatched switch,
    Latch means for inverting and latching the output state each time the input from the detection means is switched from the first state to the second state;
    5. The electronic switch device according to claim 2, wherein the switching unit switches between conduction and interruption of the power supply path based on an output from the latch unit. 6.
  6.  ラッチ手段は、ハイ又はローのうち予め規定されている第3状態が入力された場合に、出力状態を優先的に前記切換手段が前記電力供給路を遮断する状態とする入力端子を有しており、
     制御信号を入力する制御入力手段を備え、
     前記制御入力手段から入力された制御信号に基づき、前記入力端子への出力状態を、前記第3状態とは異なる第4状態から、前記第3状態に切り換える初期化手段を備えていることを特徴とする請求項5記載の電子スイッチ装置。
    The latch means has an input terminal for preferentially setting the output state to shut off the power supply path when a predetermined third state of high or low is inputted. And
    Comprising control input means for inputting a control signal;
    The system further comprises initialization means for switching the output state to the input terminal from a fourth state different from the third state to the third state based on a control signal input from the control input means. The electronic switch device according to claim 5.
  7.  ラッチ手段は、ハイ又はローのうち予め規定されている第3状態が入力された場合に、出力状態を優先的に前記切換手段が前記電力供給路を遮断する状態とする入力端子を有しており、
     電力供給源に接続するコネクタと、
     前記コネクタが前記電力供給源に接続されると電荷が蓄電され、前記コネクタが前記電力供給源から取り外されると放電するコンデンサと、そのコンデンサの電荷量が所定量以下である場合に前記入力端子への出力状態を前記第3状態とし、前記コンデンサの電荷量が所定量を超える場合に前記入力端子への出力状態を前記第4状態とする出力手段とを含んで構成される第2初期化手段とを備えていることを特徴とする請求項5又は6に記載の電子スイッチ装置。
    The latch means has an input terminal for preferentially setting the output state to shut off the power supply path when a predetermined third state of high or low is inputted. And
    A connector connected to a power supply source;
    When the connector is connected to the power supply source, electric charge is stored, and when the connector is removed from the power supply source, a capacitor is discharged, and when the charge amount of the capacitor is equal to or less than a predetermined amount, to the input terminal And an output means for setting the output state to the input terminal to the fourth state when the charge amount of the capacitor exceeds a predetermined amount. The electronic switch device according to claim 5, wherein the electronic switch device is provided.
  8.  前記発振手段からの出力の電圧振幅が所定値を超える場合に、ハイ又はローのうち予め規定されている第5状態を出力し、前記発振手段からの出力の電圧振幅が所定値以下である場合に、前記第5状態とは異なる第6状態を出力する第2の検出手段を備え、
     前記切換手段は、前記第2の検出手段からの入力が第6の状態である場合に、前記ラッチ手段からの入力に優先させて前記電力供給路を導通させる優先手段を含むことを特徴とする請求項7記載の電子スイッチ装置。
    When the voltage amplitude of the output from the oscillating means exceeds a predetermined value, a predetermined fifth state of high or low is output, and the voltage amplitude of the output from the oscillating means is below a predetermined value And a second detection means for outputting a sixth state different from the fifth state,
    The switching means includes priority means for conducting the power supply path in preference to the input from the latch means when the input from the second detection means is in the sixth state. The electronic switch device according to claim 7.
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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016501477A (en) * 2012-11-15 2016-01-18 日本テキサス・インスツルメンツ株式会社 Wide common mode range transmission gate
EP3104528A1 (en) * 2015-06-10 2016-12-14 Weetech GmbH Bi-directional mosfet switch and multiplexer
CN113303799A (en) * 2021-05-21 2021-08-27 上海微创医疗机器人(集团)股份有限公司 Basin bottom detection equipment based on non-contact switch
CN113640695A (en) * 2020-05-11 2021-11-12 杭州海康汽车软件有限公司 Detection device and detection method

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55143837A (en) * 1979-04-26 1980-11-10 Nec Corp Two-way switch
JPS61182322A (en) * 1985-02-07 1986-08-15 Fujitsu Ltd Contact detecting circuit
JP2003068178A (en) * 2001-08-28 2003-03-07 Nagamasa Nagano Power switch

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55143837A (en) * 1979-04-26 1980-11-10 Nec Corp Two-way switch
JPS61182322A (en) * 1985-02-07 1986-08-15 Fujitsu Ltd Contact detecting circuit
JP2003068178A (en) * 2001-08-28 2003-03-07 Nagamasa Nagano Power switch

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016501477A (en) * 2012-11-15 2016-01-18 日本テキサス・インスツルメンツ株式会社 Wide common mode range transmission gate
EP3104528A1 (en) * 2015-06-10 2016-12-14 Weetech GmbH Bi-directional mosfet switch and multiplexer
CN106253888A (en) * 2015-06-10 2016-12-21 威泰克公司 Bi-directional MOS FET switch and multiplexer
US10020805B2 (en) 2015-06-10 2018-07-10 Weetech Gmbh Bidirectional MOSFET switch and multiplexer
CN106253888B (en) * 2015-06-10 2020-04-24 威泰克公司 Bidirectional MOSFET switch and multiplexer
CN113640695A (en) * 2020-05-11 2021-11-12 杭州海康汽车软件有限公司 Detection device and detection method
CN113303799A (en) * 2021-05-21 2021-08-27 上海微创医疗机器人(集团)股份有限公司 Basin bottom detection equipment based on non-contact switch
CN113303799B (en) * 2021-05-21 2023-09-22 上海微创医疗机器人(集团)股份有限公司 Basin bottom detection equipment based on non-contact switch

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