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WO2010122795A1 - 半導体装置 - Google Patents

半導体装置 Download PDF

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Publication number
WO2010122795A1
WO2010122795A1 PCT/JP2010/002899 JP2010002899W WO2010122795A1 WO 2010122795 A1 WO2010122795 A1 WO 2010122795A1 JP 2010002899 W JP2010002899 W JP 2010002899W WO 2010122795 A1 WO2010122795 A1 WO 2010122795A1
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WO
WIPO (PCT)
Prior art keywords
metal
solder material
semiconductor element
treatment layer
electrode surface
Prior art date
Application number
PCT/JP2010/002899
Other languages
English (en)
French (fr)
Inventor
中村太一
古澤彰男
酒谷茂昭
北浦秀敏
松尾隆広
Original Assignee
パナソニック株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by パナソニック株式会社 filed Critical パナソニック株式会社
Priority to US13/259,009 priority Critical patent/US8691377B2/en
Priority to JP2011510226A priority patent/JP5383795B2/ja
Priority to CN2010800055659A priority patent/CN102292803A/zh
Publication of WO2010122795A1 publication Critical patent/WO2010122795A1/ja

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    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
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Definitions

  • the present invention relates to a semiconductor device, and more particularly to a technique for joining a semiconductor element and a support plate with a solder material.
  • solder material Due to the growing awareness of environmental protection in various countries around the world, Sn-Ag-Cu Pb-free solder is widely used as a solder material for mounting electronic components on substrates.
  • Pb solder is still used as an internal bonding material of a power IGBT (Insulated Gate Bipolar Transistor) module.
  • IGBT Insulated Gate Bipolar Transistor
  • the reflow mounting temperature is generally 240 ° C to 260 ° C.
  • Reflow mounting is also called secondary mounting.
  • Patent Document 1 describes high-temperature Pb-free solder containing Bi as a main component as a solder material intended to satisfy the requirement. ing.
  • the high temperature Pb-free solder is composed of Ag in an amount of about 2 wt% to about 18 wt%, Bi in an amount of about 98 wt% to about 82 wt%, and zinc, nickel, germanium in an amount up to about 1000 ppm, or combinations thereof. And at least one of these.
  • the high-temperature Pb-free solder has a solidus line of about 262.5 ° C. or higher and a liquidus line of about 400 ° C. or lower.
  • Patent Document 2 describes a conductive adhesive.
  • This conductive adhesive is obtained by mixing and dispersing an Ag filler and a particulate resin component and pasting it with a volatile solvent.
  • the Ag filler content is 90% at the maximum and the thermal conductivity is 60 W / (m ⁇ K) at the maximum.
  • the solder material described in Patent Document 1 is mainly composed of Bi. Therefore, the thermal conductivity is about 9 W / (m ⁇ K), which is lower than the thermal conductivity (about 35 W / (m ⁇ K)) of Pb solder still used in the market.
  • the thermal conductivity is about 9 W / (m ⁇ K)
  • the thermal conductivity is about 35 W / (m ⁇ K) of Pb solder still used in the market.
  • the solder material described in Patent Document 1 has a problem that heat dissipation must be improved.
  • the conductive adhesive described in Patent Document 2 has a thermal conductivity increased to a maximum of 60 W / (m ⁇ K) by increasing the compounding ratio of the Ag filler to a maximum of 90%.
  • the thermal conductivity of a conductive adhesive containing a general Ag filler is 1.0 W / (m ⁇ K) to 1.3 W / (m ⁇ K).
  • semiconductor elements mounted in power IGBT modules are required to control a larger current than in the current situation. With this increase in current, the amount of heat generated by the semiconductor element has increased by about 2 to 3 times.
  • a bonding material used for internal bonding is required to have a thermal conductivity of 70 W / (m ⁇ K) to 100 W / (m ⁇ K).
  • the conductive adhesive described in Patent Document 2 has a problem that heat dissipation must be improved.
  • an object of the present invention is to improve the heat dissipation of the heat generated from the semiconductor element to the support plate while ensuring sufficient bonding strength between the semiconductor element and the support plate such as a lead frame, thereby increasing the product yield.
  • An object of the present invention is to provide a semiconductor device that can be improved.
  • a semiconductor device of the present invention includes a support plate, an electrode surface treatment layer formed on the support plate, a semiconductor element, and a first metal containing Bi as a main component.
  • a solder material which contains particles of a second metal having a melting point higher than that of the first metal, and which joins the electrode surface treatment layer and the semiconductor element, and a central portion of the semiconductor element of the solder material.
  • the composition ratio of the second metal is higher than that of the first metal in the region corresponding to, and the composition ratio of the first metal is higher than that of the second metal in the region outside the region corresponding to the central portion.
  • the composition ratio of the second metal in the region corresponding to the central portion is 83.8 atomic% or more.
  • a metal having a high thermal conductivity is disposed at the lower part of the central portion of the semiconductor element, and heat generated from the semiconductor element can be efficiently radiated from the solder material which is a bonding material. Therefore, while ensuring sufficient bonding strength between the semiconductor element and the support plate, the heat dissipation from the semiconductor element to the support plate can be improved, and the product yield can be improved.
  • FIG. 1 is a flowchart showing a manufacturing process of a semiconductor device according to an embodiment of the present invention.
  • FIGS. 1 (a) to 1 (e) respectively show manufacturing processes of a semiconductor device according to the embodiment of the present invention. It is a cross-sectional schematic diagram which shows one process of these
  • FIG.1 (f) is a flowchart corresponding to the manufacturing process of the semiconductor device which concerns on embodiment of this invention.
  • FIG. 2 is a schematic cross-sectional view showing a change in state of a solder material in a manufacturing process of a semiconductor device according to an embodiment of the present invention.
  • FIGS. 2 (a) to 2 (c) are respectively related to the embodiment of the present invention.
  • FIG. 3 is a schematic diagram of a semiconductor device according to an embodiment of the present invention.
  • FIG. 3A is a schematic top view of a semiconductor device according to an embodiment of the present invention
  • FIG. It is a cross-sectional schematic diagram along the XX ′ line shown in FIG.
  • It is a figure which shows the relationship between the oxygen concentration in the manufacturing process of the semiconductor device which concerns on embodiment of this invention, and the soldering defective incidence.
  • FIG. 7 is a composition explanatory diagram of a solder material in the semiconductor device according to the embodiment of the present invention.
  • FIG. 7A is a schematic cross-sectional view of the semiconductor device according to the embodiment of the present invention as viewed from the side.
  • FIG. 7B is a schematic longitudinal sectional view taken along the line SS ′ shown in FIG.
  • FIG. 1A to FIG. 1F are flowcharts showing the manufacturing process of the semiconductor device according to this embodiment.
  • FIGS. 1A to 1E are schematic cross-sectional views in each manufacturing process
  • FIG. 1F is a flowchart represented by steps 001 to 005 corresponding to each manufacturing process. Show.
  • This manufacturing process is for manufacturing a semiconductor device having a die-bonding joint excellent in heat conduction.
  • step 001 will be described with reference to FIG.
  • a lead frame 101 is prepared as a support plate.
  • the lead frame 101 is made of a Cu alloy. Since the Cu alloy has poor wettability with molten Bi, the lead frame 101 requires an electrode surface treatment layer made of a material with good wettability with molten Bi. Accordingly, in step 001, a lead frame 101 is prepared in which an electrode surface treatment layer 102 having good wettability with Bi is formed on the electrode portion.
  • step 002 will be described with reference to FIG.
  • the solder material 103 containing Bi as a main component is placed on the center of gravity of the upper surface of the electrode surface treatment layer 102 formed on the electrode portion of the lead frame 101.
  • the lead frame 101 is kept warm at a temperature 30 ° C. higher than the melting point 271 ° C. of Bi.
  • the solder material adsorption tool 106 that adsorbs one solder material 103, the adsorbed solder material 103 is placed on the center of gravity of the upper surface of the electrode surface treatment layer 102. Thereafter, the suction by the solder material suction tool 106 is released, and the solder material suction tool 106 is retracted.
  • the solder material 103 has a two-layer structure in which particles of the second metal 105 having a higher melting point and higher thermal conductivity than the first metal 104 are dispersed on the outer periphery of the first metal 104 containing Bi as a main component. Yes.
  • FIG. 2 is a schematic sectional view showing a change in the state of the solder material in the manufacturing process of the semiconductor device according to this embodiment.
  • the first metal 104 of the solder material 103 is placed as shown in FIG. Begins to melt.
  • the melted first metal 104 is eluted from the grain boundary gaps of the particles of the second metal 105 existing on the outer periphery of the solder material 103 and gets wet onto the electrode surface treatment layer 102.
  • the time further elapses as shown in FIG. 2C, the first metal 104 of the solder material 103 wets and spreads on the electrode surface treatment layer 102, and the second metal 105 having a specific gravity smaller than that of the first metal 104 is soldered. It floats on the surface of the material 103.
  • the first metal 104 spreads wet around the center of gravity of the upper surface of the electrode surface treatment layer 102. Therefore, the center of the surface of the first metal 104 that has spread out corresponds to the center of gravity of the upper surface of the electrode surface treatment layer 102. In this way, finally, the number of particles of the second metal 105 in the central portion of the surface of the first metal 104 wetted and spread is larger than the number of particles of the second metal 105 around the central portion. .
  • a metal other than Bi may be added to the first metal to the extent that it does not affect the melting point.
  • Bi may be added in an amount of 0.06% by weight.
  • step 003 will be described with reference to FIG.
  • the solder material 103 is rolled onto the electrode surface treatment layer 102 of the lead frame 101.
  • the solder material 103 is rolled around the center of gravity of the upper surface of the electrode surface treatment layer 102. Therefore, the center of the rolled solder material 103 corresponds to the center of gravity of the upper surface of the electrode surface treatment layer 102.
  • the solder material 103 is rolled onto the electrode surface treatment layer 102 by lowering the rolling tool 107.
  • step 004 will be described with reference to FIG.
  • the semiconductor element 109 is placed on the rolled solder material 103.
  • the semiconductor element 109 is mounted so that the center of the lower surface of the semiconductor element 109 (the surface facing the electrode surface treatment layer 102) is located at the center of gravity of the upper surface of the electrode surface treatment layer 102.
  • the semiconductor element adsorption tool 108 that adsorbs the semiconductor element 109 is moved to place the adsorbed semiconductor element 109 on the solder material 103 rolled on the electrode surface treatment layer 102. To do. After the semiconductor element 109 is placed, the suction by the semiconductor element suction tool 108 is released, and the semiconductor element suction tool 108 is retracted.
  • step 005 will be described with reference to FIG.
  • the solder material 103 is cooled and solidified to join the electrode surface treatment layer 102 on the lead frame 101 and the semiconductor element 109.
  • FIG. 3A and FIG. 3B are schematic views of the semiconductor device according to this embodiment.
  • FIG. 3A is a schematic top view of the semiconductor device
  • FIG. 3B is a schematic cross-sectional view taken along line X-X ′ shown in FIG.
  • the ratio of the second metal 105 is larger than that of the first metal 104 at the center of the die bond joint (solder material joint) that joins the semiconductor element 109 and the lead frame 101.
  • the ratio of the first metal 104 is larger than that of the second metal 105 outside the central portion.
  • the central portion of the die bond bonding portion is a region corresponding to the central portion of the semiconductor element 109.
  • step 001 will be described with reference to FIG.
  • Ag was formed as an electrode surface treatment layer 102 on an electrode portion (not shown) having a top surface size of 4.5 mm ⁇ 5.5 mm on the lead frame 101 by an electrolytic plating method.
  • Ag was formed to a thickness of 3 ⁇ m as the electrode surface treatment layer 102.
  • Au, Ni, Co, Zn which is a metal having good wettability with Bi in a molten state, may be used. Considering the film thickness variation of 1 ⁇ m, the thickness may be 1 ⁇ m or more.
  • the solder material 103 used here is spherical with a diameter of 1 mm, and Cu particles having an average particle diameter of 3 ⁇ m are dispersed as the second metal 105 on the outer periphery of the spherical first metal 104.
  • the main component of the first metal 104 is Bi.
  • This solder material 103 was placed on the center of gravity of the upper surface of the electrode surface treatment layer 102.
  • grains was computed from the particle size and roundness measured with the optical system particle size measuring machine.
  • an in-oil granulation method As a method for producing a spherical solder material, an in-oil granulation method is generally known.
  • the in-oil granulation method is described in, for example, Japanese Patent Application Laid-Open No. 2000-328112. Also in this example, the in-oil granulation method was used. Specifically, first, 1 kg of Bi-8 wt% Cu alloy in ingot state in which the composition was uniformly dispersed was put into the pot, and the entire pot was heated to 500 ° C. by a heating means. Since the melting points of Cu and Bi are 1083 ° C. and 271 ° C., respectively, only Bi is melted in the pot.
  • the alloy in which only Bi was melted was discharged from a nozzle having a 0.5 mm diameter opening immersed in the oil at the tip of the pot, and the alloy was solidified in the oil at a cooling rate of 250 ° C./min.
  • Bi is solidified while Cu is dispersed and segregated on the outer peripheral portion of the molten Bi. This is because since the melting point of Cu is higher than Bi, Cu is extruded from the inside of the discharged alloy to the outer periphery of the alloy, and Bi solidifies inside the alloy.
  • Table 1 shows the composition of the solder materials of Examples 1 to 6 and Comparative Examples 1 to 6 of the solder material manufactured by the granulation method in oil, the type of the first metal, the type of the second metal, and the solder material by the nozzle. The discharge possibility, the diameter of the solder material, and the average particle diameter of the second metal are shown. This example is Example 1 of Table 1.
  • the numerical value of the diameter of the solder material was measured by observing the cross section of the solder material.
  • nozzles having an opening with a diameter of 0.5 mm were used for Examples 1 to 6 and Comparative Examples 5 to 6, and nozzles having an opening with a diameter of 0.7 mm were used for Comparative Examples 1 to 4.
  • one or two types of Cu, Ag, and Zn are selected as the second metal 105, and the amount of addition of the second metal 105 (if two types are selected, the amount of these is selected.
  • the total amount was 2% by weight or more and 8% by weight or less, ejection by a nozzle having an opening with a diameter of 0.5 mm was possible.
  • the particles of the second metal 105 were dispersed with an average particle size of 2.3 ⁇ m to 3 ⁇ m on the outer periphery of the first metal 104 containing Bi as a main component.
  • one or two kinds of Cu and Ag are selected as the second metal 105, and the added amount of the second metal 105 (if two kinds are selected, these amounts are When the total amount) was 9% by weight or more, the nozzle having an opening with a diameter of 0.5 mm was clogged, and discharge was impossible. In this case, discharge was possible using a nozzle having an opening with a diameter of 0.7 mm, but the diameter of the solder material was 1.19 mm or more and 1.23 mm or less, which was larger than that of the example. Thus, when a nozzle having an opening with a diameter of 0.7 mm is used, the amount of solder to be supplied increases.
  • the solder material 103 protrudes from the electrode surface treatment layer 102 in step 003, and the protruded solder material may wrap around the back surface of the lead frame 101, thereby interrupting the subsequent process.
  • the amount of the second metal 105 added is desirably 8% by weight or less.
  • the second metal 105 when Sn or In is selected as the second metal 105 and the addition amount of the second metal 105 is 8% by weight, the second metal 105 is the first metal. It was dispersed not in the outer periphery of 104 but in the entire interior. This is because the melting point of Bi is 271 ° C., whereas the melting points of Sn and In are 232 ° C. and 157 ° C., respectively, which are lower than the melting point of Bi. Specifically, in the solidification process of solder ball manufacturing, high melting point Bi solidifies first, and then Sn or In solidifies, so that Sn or In particles are dispersed throughout the Bi of the first metal 104. It is. For this reason, the second metal 105 needs to have a higher melting point than Bi.
  • the thermal conductivity of Pb solder (for example, Pb-3 wt% Sn), which is a bonding material inside a general semiconductor component, is 35 W / (m ⁇ K). Therefore, the solder material 103 of this embodiment is required to have a thermal conductivity of 35 W / (m ⁇ K) or more.
  • the second metal 105 needs to have a thermal conductivity of 35 W / (m ⁇ K) or higher with Pb-3 wt% Sn and a melting point higher than Bi.
  • metals that satisfy this condition include Ag, Cu, Au, Al, and Zn. Therefore, one or two types may be selected as the second metal 105 from Ag, Cu, Au, Al, and Zn. In Examples 1 to 6 above, Ag, Cu, and Zn were used.
  • the melting points of Au and Al were 1064 ° C. and 660 ° C., respectively, higher than 271 ° C. of Bi.
  • the thermal conductivities are 317 W / (m ⁇ K) and 237 W / (m ⁇ K), respectively, which are higher than 35 W / (m ⁇ K) of Pb, Au and Al are also considered suitable as the second metal 105.
  • the eutectic temperature is 262 ° C, which is 9 ° C lower than the melting point of Bi. Therefore, the solder material may be remelted at the temperature during reflow mounting.
  • the reflow mounting temperature is generally 240 to 260 ° C.
  • the eutectic temperature when Cu is added to Bi is 270 ° C., there is little possibility that the solder material is remelted during reflow mounting.
  • the second metal 105 of the solder material 103 is particularly preferably Cu. Further, the amount of the second metal 105 added needs to be 8% by weight or less. Therefore, it is desirable that the solder material 103 is a sphere having a diameter of 1 mm with a composition (Bi-8 wt% Cu) containing Bi as a main component and adding 8 wt% Cu.
  • step 002 in which the solder material 103 is placed on the center of gravity of the upper surface of the electrode surface treatment layer 102, the oxygen concentration in the space is reduced, and the oxidation of the electrode surface treatment layer 102 on the lead frame 101 and the solder material 103 are performed. It is necessary to suppress the oxidation of.
  • the oxygen concentration is reduced in this way because the solder material 103 does not have a flux component. By reducing the oxygen concentration, the solder material 103 can be satisfactorily joined (soldered) to the electrode surface treatment layer 102 on the insulated lead frame 101.
  • FIG. 4 shows oxygen in the case where the lead frame 101 is kept at 320 ° C. and the solder material 103 is placed on the electrode surface treatment layer 102 with a load of 30 gf by the solder material adsorption tool 106 made of stainless steel and having an opening diameter of 0.5 mm.
  • the relationship between the concentration and the soldering defect occurrence rate is shown.
  • the horizontal axis of the table in FIG. 4 indicates the oxygen concentration (ppm), and the vertical axis indicates the soldering failure occurrence rate (%).
  • the soldering failure is a problem such as solder scattering and non-wetting due to difficulty in joining the surface of the electrode surface treatment layer 102 and the surface of the solder material 103.
  • the soldering failure occurrence rate at each oxygen concentration was calculated with 10 samples.
  • FIG. 4 shows that when the oxygen concentration is 1, 10, 30, 50, and 100 ppm, poor soldering does not occur and good solderability is obtained.
  • the oxygen concentration is 500 ppm or 1000 ppm
  • the soldering defect occurrence rate is as high as 80% or more. This is because the oxide film on the surface of the electrode surface treatment layer 102 on the lead frame 101 and the surface of the solder material 103 becomes thick, so that the lead frame 101 and the solder material 103 are difficult to join.
  • the one where oxygen concentration is lower is desirable, it is difficult to make oxygen concentration lower than 1 ppm in the control performance of an installation.
  • the oxygen concentration is preferably selected from the range of 1 ppm to 300 ppm at which the soldering failure occurrence rate is 10% or less.
  • the oxygen concentration was 50 ppm.
  • the oxygen concentration was 50 ppm.
  • the lead frame 101 needs to be kept warm to a temperature at which the first metal 104 is melted and the second metal 105 is not melted. Since the melting point of the first metal 104 containing Bi as the main component is 271 ° C., the lower limit value of the heat retention temperature of the lead frame 101 is 30 ° C. or more than the melting point of Bi in order to stably melt Bi. It is essential to have a high temperature. Desirably, the lower limit value further has a safety region. Specifically, the lower limit is preferably 310 ° C. or higher. On the other hand, the upper limit value of the heat retention temperature of the lead frame 101 is preferably set to a temperature lower by 30 ° C.
  • the upper limit value also has a safety range. Specifically, among Ag, Cu, Au, Al, and Zn, the metal having the lowest melting point is Zn, and the melting point of Zn is 420 ° C. Therefore, the upper limit value of the heat retention temperature of the lead frame 101 is desirably Is 380 ° C. or lower. In this embodiment, the temperature of the lead frame 101 is set to 320 ° C., which is about 50 ° C. higher than the melting point of Bi. This is because the wettability of Bi is increased and the instability of temperature adjustment of the heating source is taken into consideration. In step 003 and step 004 as well, the temperature of the lead frame 101 was set to 320 ° C.
  • the mounting load of the solder material 103 needs to be a load at which the first metal 104 containing Bi as a main component elutes from the grain boundary gap of the Cu particles having an average particle diameter of 3 ⁇ m, which is the second metal 105.
  • FIG. 5 shows the relationship between the placement load of the solder material 103 and the elution amount of the first metal eluted in the electrode surface treatment layer 102. More specifically, FIG. 5 shows the solder when the lead frame 101 is kept at 320 ° C., the oxygen concentration in the space is 50 ppm, the composition is Bi-8 wt% Cu, and the solder material 103 having a diameter of 1 mm is used.
  • the relationship between the mounting load of the material 103 and the elution amount of the first metal 104 is shown.
  • the horizontal axis of the table in FIG. 5 represents the placement load (gf) of the solder material, and the vertical axis represents the elution amount (cm 3 ) of the first metal.
  • the loading load is 10 gf or more
  • the elution amount of the first metal 104 is 0.1414 ⁇ 10 ⁇ 4 cm 3 or more
  • Bi is from the grain boundary gap of the Cu particles having the average particle diameter of 3 ⁇ m as the second metal 105.
  • the first metal 104 having the main component is eluted and spreads on the electrode surface treatment layer 102.
  • the loading load is preferably 10 gf or more and 150 gf or less. In this example, the placement load was 30 gf.
  • a rectangular parallelepiped rolling tool 107 is vertically lowered with respect to the solder material 103 placed on the electrode surface treatment layer 102 on the lead frame 101, whereby the solder material 103 is removed from the electrode surface treatment layer.
  • Rolled onto 102 The lead frame 101 was kept at 320 ° C., and the oxygen concentration in the space was 50 ppm.
  • As the rolling tool 107 a steel plate having a top surface size of 3.5 mm ⁇ 4.5 mm and a height of 30 mm was used.
  • the material of the rolling tool is preferably a metal material that does not melt in the solder material 103 and does not melt at a temperature in the range of 310 ° C.
  • the area of the solder material 103 after rolling is set to be not less than the surface area of the lower surface of the semiconductor element 109 to be mounted later and not more than the surface area of the upper surface of the electrode surface treatment layer 102. For this reason, the surface area of the lower surface of the rolling tool 107 needs to be greater than or equal to the surface area of the lower surface of the semiconductor element 109 to be mounted later and less than or equal to the surface area of the upper surface of the electrode surface treatment layer 102.
  • FIG. 6 shows the relationship between the distance between the upper surface of the electrode surface treatment layer 102 and the lower surface of the lowered rolling tool 107 and the rolling rate of the solder material 103.
  • the horizontal axis in the table of FIG. 6 indicates the distance ( ⁇ m) between the upper surface of the electrode surface treatment layer 102 and the lower surface of the lowered rolling tool 107, and the vertical axis indicates the rolling rate (%).
  • the calculation formula of the rolling rate of the solder material 103 is described below.
  • Rolling ratio ((surface area of solder material 103 spread by wetting) ⁇ (surface area of upper surface of electrode surface treatment layer 102)) ⁇ 100 (%)
  • the solder material 103 is rolled to an area equivalent to the surface area of the lower surface of the semiconductor element 109.
  • the solder material 103 is the electrode surface treatment layer 102. It is rolled to an area equivalent to the surface area of the upper surface of.
  • the distance between the upper surface of the electrode surface treatment layer 102 and the lower surface of the lowered rolling tool 107 is 100 ⁇ m or less, and the rolling rate is 63.6% or more. It can also be seen that the rolling rate is 100% or more in the case of 1 ⁇ m and 5 ⁇ m. When the rolling rate is 100% or more, the solder material 103 wets and spreads over the surface area of the upper surface of the electrode surface treatment layer 102. Therefore, in this case, the solder material protruding from the electrode surface treatment layer 102 may wrap around the back surface of the lead frame 101 and interrupt subsequent processes.
  • the distance between the upper surface of the electrode surface treatment layer 102 and the lower surface of the lowered rolling tool 107 is preferably 10 ⁇ m or more and 100 ⁇ m or less. In this example, the distance between the upper surface of the electrode surface treatment layer 102 and the lower surface of the lowered rolling tool 107 was 20 ⁇ m.
  • the first metal 104 mainly composed of Bi in the solder material 103 is rolled by lowering the rolling tool 107 perpendicularly to the electrode surface treatment layer 102, and the average particle diameter of the second metal 105 is obtained.
  • the 3 ⁇ m Cu particles can be held at the position where the solder material 103 is placed.
  • step 004 will be described with reference to FIG.
  • the adsorbed semiconductor element 109 is loaded on the solder material 103 rolled on the electrode surface treatment layer 102 with no load. Placed.
  • a diffusion prevention layer and an Ag layer are formed in this order by a vapor deposition method with a thickness of 1 ⁇ m and 1.5 ⁇ m, respectively.
  • the semiconductor element suction tool 108 made of SUS304 was used. However, a tool made of another SUS material such as SUS316 may be used.
  • the semiconductor element 109 was made of Si and was cut out from a wafer having a diameter of 6 inches and a thickness of 0.3 mm to a size of 3.5 mm ⁇ 4.5 mm.
  • step 005 will be described with reference to FIG.
  • the lead frame 101 was cooled to room temperature to solidify the solder material 103, and the electrode surface treatment layer 102 on the lead frame 101 and the semiconductor element 109 were joined.
  • the oxygen concentration in the space is preferably 1 ppm or more and 300 ppm or less. In this example, the oxygen concentration in the space was 50 ppm.
  • Examples 1 to 6 in Table 2 are the same as those of the above-described Examples, and Examples 1 to 6 differ only in the composition of the solder material.
  • the above-mentioned Example is Example 1 of Table 2.
  • the manufacturing methods of Examples 1 to 6 and Comparative Examples 7 to 12 differ only in the method of placing the solder material in Step 002, and the supply amount of the solder material and other steps are the same.
  • the compositions of the solder materials in Examples 1 to 6 and Comparative Examples 7 to 12 were the same.
  • FIG. 7 is an explanatory diagram of the composition of the solder material in the semiconductor device according to this embodiment.
  • FIG. 7A shows a cross-sectional structure of the semiconductor device according to this embodiment as viewed from the side.
  • 7 (b) shows a longitudinal sectional structure taken along line SS ′ shown in FIG. 7 (a).
  • Table 2 shows the distribution state of the composition of the solder material, the thermal conductivity of the solder material, and the product yield of the semiconductor device after the semiconductor element is bonded onto the lead frame.
  • the distribution state of the composition of the solder material is represented by the composition ratio in each of the center portion and the outer peripheral portion of the die bond joint portion (solder material joint portion) for joining the lead frame and the semiconductor element.
  • the product yield of the semiconductor device was calculated by joining the semiconductor element on the lead frame, then performing the process up to the final process, assembling the power IGBT module, and executing the operation test.
  • the outer shape of the surface (lower surface) facing the electrode surface treatment layer 102 of the semiconductor element 109 is a rectangle.
  • the length of one opposing two sides (long side) is 2A
  • the length of the other two opposing sides (short side) is 2B
  • the midpoints of the short sides of length 2B are connected.
  • the mounting method of the solder material of the comparative example is a potting method which is a general die bond method.
  • the molten solder material 103 is placed on the electrode surface treatment layer 102 on the lead frame 101 by dispensing.
  • the product yield after assembly is 85% to 100% in comparison with the example, compared with the example, compared with the example in the example of 85% to 100% in the product yield after the assembly despite the same solder material composition. It can be seen that it is reduced by 55% to 80%.
  • the product yield of the example is high because, in the manufacturing method of the example, the thermal conductivity is 121 W / (m ⁇ K) to 427 W / (m ⁇ K) on the outer periphery of the first metal 104 containing Bi as a main component. Since the solder material 103 in which the particles of the second metal 105 are dispersed is used, when the solder material 103 is placed on the heat-retained lead frame 101, the first metal 104 spreads wet and spreads. The number of particles of the second metal 105 having a high thermal conductivity at the center of the surface of the first metal 104 is larger than the number of particles of the second metal 105 around the center, and the solder material 103 in such a state is rolled.
  • the second metal 105 is disposed at 83.8 atomic% to 89.8 atomic% below the central portion of the semiconductor element 109, and the thermal conductivity of the origin O portion of the die bond bonding portion.
  • the heat generated by the semiconductor element 109 during operation of the IGBT is considered to be because that is radiated to efficiently lead frame 101.
  • 121 W / (m ⁇ K) is the thermal conductivity of Zn
  • 427 W / (m ⁇ K) is the thermal conductivity of Ag.
  • the product yield of the comparative example is low because the manufacturing method of the comparative example supplies a solder material in a molten state, so that high heat conduction of 121 W / (m ⁇ K) to 427 W / (m ⁇ K) is achieved.
  • the solder material in which the particles of the second metal 105 are uniformly dispersed in the first metal 104 is rolled.
  • the second metal is formed at the lower portion of the central portion of the semiconductor element 109.
  • the thermal conductivity which is the main component of the solder material 103 is 9
  • the heat dissipation characteristics of Bi of 15 W / (m ⁇ K) are remarkably affected, and the maximum thermal conductivity of the die bond joint is Pb-3 wt% Sn used as a solder material for the current die bond joint.
  • one or two kinds of Ag, Cu, and Zn are selected as the second metal 105, but one or two kinds of Au and Al may be selected as the second metal 105.
  • the melting points of Au and Al are 1064 ° C. and 660 ° C., respectively, both melting points are higher than 271 ° C. of Bi, and the thermal conductivity of Au and Al is 317 W / (m ⁇ K), respectively.
  • the thermal conductivity is 237 W / (m ⁇ K), which is higher than 35 W / (m ⁇ K) of Pb.
  • the outer shape of the center portion of the die bond joint portion is set to a square, but the area of the interface between the die bond joint portion and the semiconductor element 109 is A region having about half the area and centering on the position where the spherical solder material 103 is placed may be set at the center, and the outer shape of the center is not limited to a quadrangle.
  • the power IGBT module which is a kind of power semiconductor device used in the power supply unit, is manufactured.
  • the present invention is not applied only to the power IGBT module.
  • Si semiconductor elements are used in the examples, the present invention is not applied only when Si semiconductor elements are used.
  • GaN semiconductor elements or SiC semiconductor elements are used. It can also be applied when used.
  • the present invention may include, for example, a plurality of functional blocks (CPU unit,
  • the present invention can also be applied to a semiconductor device in which an LSI incorporating a RAM portion, a ROM portion, an IO portion, a power supply portion, etc.) is mounted on a support plate.
  • an LSI is mounted, since a plurality of heat sources are scattered, the solder material 103 is disposed below each of the heat sources.
  • a solder material having a diameter smaller than that of the above-described embodiment is used.
  • the semiconductor device according to the present invention can improve the heat dissipation from the semiconductor element to the support plate while ensuring sufficient bonding strength between the semiconductor element and the support plate, thereby improving the product yield. It can be used for semiconductor packages such as power semiconductor devices and small power transistors.

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Abstract

　本発明は、半導体素子と支持板との十分な接合強度を確保しつつ、半導体素子からの発熱の支持体への放熱性を向上させる半導体装置を提供することを課題とする。本発明に係る半導体装置は、支持板と、前記支持板上に形成された電極表面処理層と、半導体素子と、Ｂｉを主成分とする第１金属の内部に前記第１金属よりも融点が高い第２金属の粒子を含有しており、前記電極表面処理層と前記半導体素子とを接合するはんだ材料と、を備え、前記はんだ材料の前記半導体素子の中央部に対応する領域では前記第１金属よりも前記第２金属の組成比率が高く、前記中央部に対応する領域の外側の領域では前記第２金属よりも前記第１金属の組成比率が高く、前記中央部に対応する領域内での前記第２金属の組成比率が８３．８原子％以上である。

Description

半導体装置
　本発明は、半導体装置に関し、特に、半導体素子と支持板をはんだ材料により接合する技術に関する。
　環境保護に対する世界各国での意識の高まりから、基板に電子部品を搭載するためのはんだ材料として、主にＳｎ－Ａｇ－Ｃｕ系のＰｂフリーはんだが普及している。
　しかし、例えばパワー用ＩＧＢＴ（Ｉｎｓｕｌａｔｅｄ　Ｇａｔｅ　Ｂｉｐｏｌａｒ　Ｔｒａｎｓｉｓｔｏｒ）モジュールの内部接合材料には、未だにＰｂはんだが使用されている。これは、半導体素子を支持板の搭載部に固定する為の内部接合に用いるはんだ材料には、モジュールとマザーボードを接合する際のリフロー実装温度で溶融しないことが要求されるためである。内部接合に用いるはんだ材料がリフロー実装温度により再溶融すると、モジュールが短絡する不具合が発生する。リフロー実装温度は、一般的に２４０°Ｃ～２６０°Ｃである。リフロー実装は、２次実装とも呼ばれる。
　そのため、リフロー実装温度で溶融しないＰｂフリーはんだが求められており、例えば特許文献１には、その要求を満たすことを目的とするはんだ材料として、Ｂｉを主成分とする高温Ｐｂフリーはんだが記載されている。この高温Ｐｂフリーはんだは、約２ｗｔ％～約１８ｗｔ％の量のＡｇと、約９８ｗｔ％～約８２ｗｔ％の量のＢｉと、約１０００ｐｐｍまでの量の亜鉛、ニッケル、ゲルマニウムまたはそれらの組み合わせのうちの少なくとも１種とを含有する。また、この高温Ｐｂフリーはんだは、約２６２．５°Ｃ以上の固相線と約４００°Ｃ以下の液相線を有する。
　一方、内部接合に用いる他の接合材料として、例えば特許文献２に、導電性接着剤が記載されている。この導電性接着剤は、Ａｇフィラーと粒子状樹脂成分とを混合分散させ、揮発性溶剤によりペースト状にしたものである。Ａｇフィラー含有率は最大９０％で、熱伝導率は最大６０Ｗ／（ｍ・Ｋ）である。
特表２００５－５０３９２６号公報 特開２００１－３５１９２９号公報
　しかしながら、前記特許文献１に記載のはんだ材料はＢｉを主成分としている。そのため、熱伝導率は９Ｗ／（ｍ・Ｋ）程度であり、市場で未だ使用されているＰｂはんだの熱伝導率（３５Ｗ／（ｍ・Ｋ）程度）よりも低い。例えば、電源回路に組み込まれるパワー用ＩＧＢＴモジュールに搭載される半導体素子の発熱源の下部に、熱伝導率が９Ｗ／（ｍ・Ｋ）程度のはんだ材料を載置した場合、放熱性が悪くなる。このことから、前記特許文献１に記載のはんだ材料は、放熱性を向上しなければならないという課題を有している。
　一方、前記特許文献２に記載の導電性接着剤は、Ａｇフィラーの配合比を最大９０％まで増加させることにより、熱伝導率を最大６０Ｗ／（ｍ・Ｋ）まで上昇させたものである。なお、一般的なＡｇフィラーを含む導電性接着剤の熱伝導率は、１．０Ｗ／（ｍ・Ｋ）～１．３Ｗ／（ｍ・Ｋ）である。しかし、電子機器の高機能化に伴い、例えばパワー用ＩＧＢＴモジュールに搭載される半導体素子には、現行以上に大電流を制御することが求められている。この大電流化に伴い、半導体素子の発熱量は２～３倍程度増大している。そのため、内部接合に用いる接合材料には、７０Ｗ／（ｍ・Ｋ）～１００Ｗ／（ｍ・Ｋ）の熱伝導率が要求される。このことから、前記特許文献２に記載の導電性接着剤は、放熱性を向上しなければならないという課題を有している。
　本発明の目的は、上記した問題点を解決することである。即ち、本発明の目的は、半導体素子とリードフレーム等の支持板との十分な接合強度を確保しつつ、半導体素子からの発熱の支持板への放熱性を向上させることができ、製品歩留まりを向上することができる半導体装置を提供することにある。
　上記の目的を達成するために、本発明の半導体装置は、支持板と、前記支持板上に形成された電極表面処理層と、半導体素子と、Ｂｉを主成分とする第１金属の内部に前記第１金属よりも融点が高い第２金属の粒子を含有しており、前記電極表面処理層と前記半導体素子とを接合するはんだ材料と、を備え、前記はんだ材料の前記半導体素子の中央部に対応する領域では前記第１金属よりも前記第２金属の組成比率が高く、前記中央部に対応する領域の外側の領域では前記第２金属よりも前記第１金属の組成比率が高く、前記中央部に対応する領域内での前記第２金属の組成比率が８３．８原子％以上であることを特徴とする。
　本発明によれば、半導体素子の中央部の下部に高熱伝導率の金属が配置され、半導体素子からの発熱を接合材料であるはんだ材料から効率よく放熱させることができる。よって半導体素子と支持板との十分な接合強度を確保しつつ、半導体素子からの発熱の支持板への放熱性を向上させることができ、製品歩留まりを向上することができる。
本発明の実施の形態に係る半導体装置の製造工程を示すフロー図であり、詳しくは、図１（ａ）～図１（ｅ）はそれぞれ本発明の実施の形態に係る半導体装置の製造工程のうちの一工程を示す断面模式図であり、図１（ｆ）は本発明の実施の形態に係る半導体装置の製造工程に対応させたフローチャートである。 本発明の実施の形態に係る半導体装置の製造工程におけるはんだ材料の状態変化を表す断面模式図であり、詳しくは、図２（ａ）～図２（ｃ）はそれぞれ本発明の実施の形態に係る半導体装置の製造工程におけるはんだ材料の状態変化のうちの一状態を表す断面模式図である。 本発明の実施の形態に係る半導体装置の模式図であり、詳しくは、図３（ａ）は本発明の実施の形態に係る半導体装置の上面模式図であり、図３（ｂ）は図３（ａ）に示すＸ－Ｘ’線に沿った断面模式図である。 本発明の実施の形態に係る半導体装置の製造工程における酸素濃度とはんだ付け不良発生率の関係を示す図である。 本発明の実施の形態に係る半導体装置の製造工程におけるはんだ材料の載置荷重と第１金属の溶出量の関係を示す図である。 本発明の実施の形態に係る半導体装置の製造工程における、電極表面処理層から圧延ツールまでの距離と圧延率の関係を示す図である。 本発明の実施の形態に係る半導体装置におけるはんだ材料の組成説明図であり、詳しくは、図７（ａ）は本発明の実施の形態に係る半導体装置を横から見た横断面模式図であり、図７（ｂ）は図７（ａ）に示すＳ－Ｓ’線に沿った縦断面模式図である。
　以下、本発明の実施の形態について、図面を参照しながら具体的に説明する。この実施の形態では、半導体素子と支持板とが、Ｂｉを主成分とするはんだ材料により接合された半導体装置について説明する。
　まず、この実施の形態に係る半導体装置の製造工程について説明する。図１（ａ）～図１（ｆ）は、この実施の形態に係る半導体装置の製造工程を示すフロー図である。具体的には、図１（ａ）～図１（ｅ）は各製造工程における断面模式図を示し、図１（ｆ）は各製造工程に対応させてステップ００１～ステップ００５で表したフローチャートを示す。この製造工程は、熱伝導に優れたダイボンド接合部を具備する半導体装置を製造するためのものである。
　まずステップ００１を図１（ａ）により説明する。ステップ００１では、支持板として、リードフレーム１０１を準備する。リードフレーム１０１はＣｕ合金製である。Ｃｕ合金は溶融状態のＢｉとの濡れ性が悪いため、リードフレーム１０１には溶融状態のＢｉとの濡れ性が良い材料からなる電極表面処理層が必要となる。したがって、ステップ００１では、Ｂｉとの濡れ性が良い電極表面処理層１０２が電極部分に形成されたリードフレーム１０１を準備する。
　次にステップ００２を図１（ｂ）により説明する。ステップ００２では、リードフレーム１０１の電極部分に形成された電極表面処理層１０２の上面の重心部に、Ｂｉを主成分とするはんだ材料１０３を載置する。
　ここで、はんだ材料１０３を載置する方法について説明する。まずリードフレーム１０１を、Ｂｉを安定して溶融させるために、Ｂｉの融点２７１°Ｃよりも３０°Ｃ以上高い温度で保温する。次に、はんだ材料１０３を１個吸着したはんだ材料吸着ツール１０６を移動させることで、その吸着されたはんだ材料１０３を、電極表面処理層１０２の上面の重心部に載置する。その後、はんだ材料吸着ツール１０６による吸着を解除して、はんだ材料吸着ツール１０６を退避させる。はんだ材料１０３は、Ｂｉを主成分とする第１金属１０４の外周部に、その第１金属１０４よりも融点が高くかつ高熱伝導率の第２金属１０５の粒子が分散した２層構造となっている。
　ここで、はんだ材料１０３を電極表面処理層１０２上に載置した際のはんだ材料１０３の状態変化について図２を用いて説明する。図２はこの実施の形態に係る半導体装置の製造工程におけるはんだ材料の状態変化を表す断面模式図である。
　図２（ａ）に示すように、はんだ材料１０３を、加熱したリードフレーム１０１の電極表面処理層１０２上に載置すると、図２（ｂ）に示すように、はんだ材料１０３の第１金属１０４が溶融し始める。溶融した第１金属１０４は、はんだ材料１０３の外周部に存在する第２金属１０５の粒子の粒界隙間から溶出し、電極表面処理層１０２上に濡れる。さらに時間が経過すると、図２（ｃ）に示すように、はんだ材料１０３の第１金属１０４が電極表面処理層１０２上に濡れ広がり、第１金属１０４よりも比重の小さい第２金属１０５がはんだ材料１０３の表面に浮遊する。このとき、第１金属１０４は、電極表面処理層１０２の上面の重心部を中心にして濡れ広がる。したがって、濡れ広がった第１金属１０４の表面の中心は、電極表面処理層１０２の上面の重心部に対応する。このようにして、最終的には、濡れ広がった第１金属１０４の表面の中央部における第２金属１０５の粒子数が、その中央部の周囲における第２金属１０５の粒子数に比べて多くなる。
　尚、第１金属には、融点に影響を及ぼさない程度にＢｉ以外の金属が添加されていてもよい。例えば、Ｂｉに０．０６重量％の量のＧｅを添加させてもよい。
　次にステップ００３を図１（ｃ）により説明する。ステップ００３では、はんだ材料１０３をリードフレーム１０１の電極表面処理層１０２上に圧延する。このとき、はんだ材料１０３は、電極表面処理層１０２の上面の重心部を中心にして圧延される。したがって、圧延されたはんだ材料１０３の中心は、電極表面処理層１０２の上面の重心部に対応する。この実施の形態では、圧延ツール１０７を降下させることで、はんだ材料１０３を電極表面処理層１０２上に圧延している。
　次にステップ００４を図１（ｄ）により説明する。ステップ００４では、圧延したはんだ材料１０３の上に半導体素子１０９を載置する。このとき、半導体素子１０９の下面（電極表面処理層１０２に対向する面）の中心が、電極表面処理層１０２の上面の重心部に位置するように、半導体素子１０９を載置する。この実施の形態では、半導体素子１０９を吸着した半導体素子吸着ツール１０８を移動させることで、その吸着された半導体素子１０９を、電極表面処理層１０２上で圧延されたはんだ材料１０３の上に載置する。半導体素子１０９が載置された後、半導体素子吸着ツール１０８による吸着を解除して、半導体素子吸着ツール１０８を退避させる。
　次にステップ００５を図１（ｅ）により説明する。ステップ００５では、はんだ材料１０３を冷却して凝固させることにより、リードフレーム１０１上の電極表面処理層１０２と半導体素子１０９とを接合する。
　続いて、この実施の形態の半導体装置について説明する。図３（ａ）および図３（ｂ）は、この実施の形態に係る半導体装置の模式図である。具体的には、図３（ａ）は半導体装置の上面模式図であり、図３（ｂ）は図３（ａ）に示すＸ－Ｘ’線に沿った断面模式図である。図３（ｂ）に示すように、半導体素子１０９とリードフレーム１０１とを接合するダイボンド接合部（はんだ材料接合部）の中央部においては、第１金属１０４よりも第２金属１０５の割合が多く、その中央部の外側では逆に第２金属１０５よりも第１金属１０４の割合が多い。ダイボンド接合部の中央部は、半導体素子１０９の中央部に対応する領域である。
　続いて、この実施の形態の一実施例を前述のステップ順に説明する。尚、この実施例では、Ｓｉ製の半導体素子を搭載したパワー用ＩＧＢＴモジュールを製造した。
　まず、ステップ００１を図１（ａ）により説明する。この実施例では、リードフレーム１０１上の天面サイズ４．５ｍｍ×５．５ｍｍの電極部分（図示せず）に、電極表面処理層１０２としてＡｇを３μｍの厚みで電解めっき法により成膜した。尚、この実施例では、電極表面処理層１０２としてＡｇを３μｍの厚みで成膜したが、溶融状態のＢｉとの濡れ性が良い金属であるＡｕ、Ｎｉ、Ｃｏ、Ｚｎを用いてもよく、厚みも１μｍの成膜厚みバラつきを考慮して１μｍ以上あればよい。
　次に、ステップ００２を図１（ｂ）により説明する。ここで用いたはんだ材料１０３は直径１ｍｍの球状であり、球状の第１金属１０４の外周部に第２金属１０５として平均粒径３μｍのＣｕ粒子が分散している。第１金属１０４の主成分はＢｉである。このはんだ材料１０３を電極表面処理層１０２の上面の重心部に載置した。尚、Ｃｕ粒子の平均粒径は、光学系粒径測定機により測定した粒径と真円度から算出した。
　球状のはんだ材料の製造方法としては、一般に油中造粒法が知られている。油中造粒法は、例えば、特開２０００－３２８１１２号公報に記載されている。この実施例でも、油中造粒法を用いた。具体的には、始めに、組成が均一に分散しているインゴッドの状態のＢｉ－８重量％Ｃｕの合金１ｋｇをポットに投入し、ポット全体を加熱手段により５００°Ｃに加熱した。Ｃｕ、Ｂｉの融点はそれぞれ１０８３°Ｃ、２７１°Ｃであるため、ポット内ではＢｉのみ溶融する。次に、Ｂｉのみ溶融した合金をポット先端の油内に浸漬された直径０．５ｍｍの開口部を持つノズルより吐出し、油内で合金を２５０°Ｃ／ｍｉｎの冷却速度で凝固させた。この油内の凝固過程において、溶融状態のＢｉの外周部にＣｕが分散、偏析しながら、Ｂｉが凝固する。これは、Ｃｕの融点がＢｉよりも高いために、吐出された合金の内部からＣｕが合金の外周部に押し出され、合金の内部でＢｉが凝固するためである。
　かかる方法により製造したはんだ材料１０３は、図１（ｂ）に示すように、球状の第１金属１０４の外周部に第２金属１０５である平均粒径３μｍのＣｕ粒子が分散した状態となる。また、はんだ材料１０３の直径は１ｍｍ（許容誤差±５０μｍ以内、工程能力指数Ｃｐｋ＝３．７７）である。
　表１に、油中造粒法により製造したはんだ材料の実施例１～６と比較例１～６のそれぞれのはんだ材料の組成、第１金属の種類、第２金属の種類、ノズルによるはんだ材料の吐出の可否、はんだ材料の直径、および第２金属の平均粒子径を示す。尚、本実施例は、表１の実施例１である。
　はんだ材料の直径の数値は、はんだ材料の断面観察により計測した。但し、実施例１～６および比較例５～６については直径０．５ｍｍの開口部を持つノズルを用い、比較例１～４については直径０．７ｍｍの開口部を持つノズルを用いた。
Figure JPOXMLDOC01-appb-T000001
  
　表１の実施例１～６のように、第２金属１０５としてＣｕ、Ａｇ、Ｚｎより１種類または２種類選択し、第２金属１０５の添加量（２種類選択した場合は、それらの量を合計した量）を２重量％以上で８重量％以下とした場合、直径０．５ｍｍの開口部を持つノズルによる吐出が可能であった。また、Ｂｉを主成分とする第１金属１０４の外周部に第２金属１０５の粒子が平均粒径２．３μｍ～３μｍで分散した。
　一方、表１の比較例１～４のように、第２金属１０５としてＣｕ、Ａｇより１種類または２類選択し、第２金属１０５の添加量（２種類選択した場合は、それらの量を合計した量）を９重量％以上とした場合、直径０．５ｍｍの開口部を持つノズルでは詰まりが生じ、吐出が不可能であった。この場合、直径０．７ｍｍの開口部を持つノズルを用いれば吐出が可能であったが、はんだ材料の直径が１．１９ｍｍ以上で１．２３ｍｍ以下となり実施例に比べて大きくなった。このように、直径０．７ｍｍの開口部を持つノズルを用いた場合、供給するはんだ量が多くなる。供給するはんだ量が多くなると、ステップ００３において電極表面処理層１０２からはんだ材料１０３がはみ出し、そのはみ出したはんだ材料がリードフレーム１０１の背面に回りこみ、後の工程を中断させる可能性がある。このことから、第２金属１０５の添加量は、８重量％以下であることが望ましい。
　さらに、表１の比較例５～６のように、第２金属１０５としてＳｎまたはＩｎを選択し、第２金属１０５の添加量を８重量％とした場合、第２金属１０５は、第１金属１０４の外周部ではなく内部全体に分散した。これは、Ｂｉの融点が２７１°Ｃであるのに対し、Ｓｎ、Ｉｎの融点がそれぞれ２３２°Ｃ、１５７°ＣであってＢｉの融点よりも低いためである。詳しくは、はんだ球製造の凝固過程において、高融点のＢｉが先に凝固し、次にＳｎあるいはＩｎが凝固することで、ＳｎあるいはＩｎの粒子が第１金属１０４のＢｉの内部全体に分散したためである。このことから、第２金属１０５はＢｉよりも融点が高い必要がある。
　また、一般的な半導体部品内部の接合材料であるＰｂはんだ（例えば、Ｐｂ－３重量％Ｓｎ）の熱伝導率は３５Ｗ／（ｍ・Ｋ）である。したがって、この実施の形態のはんだ材１０３には、３５Ｗ／（ｍ・Ｋ）以上の熱伝導率が求められる。
　以上のことから、第２金属１０５は、熱伝導率がＰｂ－３重量％Ｓｎの３５Ｗ／（ｍ・Ｋ）以上であって、融点がＢｉよりも高い必要がある。この条件を満たす金属として、Ａｇ、Ｃｕ、Ａｕ、Ａｌ、Ｚｎを挙げることできる。よって、第２金属１０５として、Ａｇ、Ｃｕ、Ａｕ、Ａｌ、Ｚｎより１種類或いは２種類選択すればよい。上記の実施例１～６では、Ａｇ、Ｃｕ、Ｚｎを用いたが、ＡｕおよびＡｌの融点はそれぞれ１０６４°Ｃ、６６０°ＣでありＢｉの２７１°Ｃよりも高く、また、ＡｕおよびＡｌの熱伝導率はそれぞれ３１７Ｗ／（ｍ・Ｋ）、２３７Ｗ／（ｍ・Ｋ）でありＰｂの３５Ｗ／（ｍ・Ｋ）よりも高いので、Ａｕ、Ａｌも第２金属１０５として相応しいと考えられる。
　また、Ａｇ、Ｃｕ、Ａｕ、Ａｌ、Ｚｎのうちでは、特にＡｇ、Ｃｕが熱伝導率の大きい金属であるので、第２金属としてＡｇ、Ｃｕより1種類まはた２種類選択した場合、半導体素子１０９からの発熱のリードフレーム１０１への放熱性の向上が期待される。
　しかし、ＢｉにＡｇを加えると共晶温度が２６２°ＣとなりＢｉの融点からは９°Ｃ以上低下する。そのため、リフロー実装時の温度ではんだ材料が再溶融する可能性がある。リフロー実装温度は一般的に２４０～２６０°Ｃである。これに対して、ＢｉにＣｕを添加した場合の共晶温度は２７０°Ｃであるため、リフロー実装時にはんだ材料が再溶融する可能性は少ない。
　以上のことより、はんだ材料１０３の第２金属１０５は、特にＣｕであることが望ましい。また、第２金属１０５の添加量は８重量％以下とする必要がある。よって、はんだ材料１０３は、Ｂｉを主成分として８重量％の量のＣｕを添加した組成（Ｂｉ－８重量％Ｃｕ）で、直径１ｍｍの球状であることが望ましい。
　また、はんだ材料１０３を電極表面処理層１０２の上面の重心部に載置するステップ００２では、空間の酸素濃度を低減して、リードフレーム１０１上の電極表面処理層１０２の酸化、及びはんだ材料１０３の酸化を抑制する必要がある。このように酸素濃度を低減するのは、はんだ材料１０３がフラックス成分を有さないためである。酸素濃度を低減することで、保温したリードフレーム１０１上の電極表面処理層１０２にはんだ材料１０３を良好に接合（はんだ付け）できる。
　図４は、リードフレーム１０１を３２０°Ｃに保温し、電極表面処理層１０２にはんだ材料１０３をステンレス製で開口径０．５ｍｍのはんだ材料吸着ツール１０６により３０ｇｆの荷重で載置した場合の酸素濃度とはんだ付け不良発生率の関係を示している。図４の表の横軸は酸素濃度（ｐｐｍ）を示し、その縦軸は、はんだ付け不良発生率（％）を示している。ここで、はんだ付け不良とは、電極表面処理層１０２の表面とはんだ材料１０３の表面が接合しにくくなることによる、はんだの飛散、不濡れといった不具合のことである。また、各酸素濃度におけるはんだ付け不良発生率は、それぞれサンプル数を１０として算出した。
　図４から、酸素濃度１、１０、３０、５０、１００ｐｐｍでは、はんだ付け不良は発生せず、良好なはんだ付け性が得られていることがわかる。酸素濃度５００ｐｐｍ、１０００ｐｐｍでは、はんだ付け不良発生率が８０％以上と高くなる。これは、リードフレーム１０１上の電極表面処理層１０２の表面及びはんだ材料１０３の表面の酸化膜が厚くなることで、リードフレーム１０１とはんだ材料１０３が接合しにくくなるためである。また、酸素濃度は低い方が望ましいが、設備の制御性能では酸素濃度を１ｐｐｍよりも低くすることが困難である。これらのことから、酸素濃度は、はんだ付け不良発生率が１０％以下となる１ｐｐｍ以上で３００ｐｐｍ以下の範囲から選択するのが好ましい。本実施例では酸素濃度は５０ｐｐｍとした。尚、ステップ００３、ステップ００４においても、酸素濃度は５０ｐｐｍとした。
　また、リードフレーム１０１は、第１金属１０４が溶融しかつ第２金属１０５が溶融しない温度に保温しておく必要がある。Ｂｉを主成分とする第１金属１０４の融点は２７１°Ｃであるので、リードフレーム１０１の保温温度の下限値は、Ｂｉを安定して溶融させるために、Ｂｉの融点よりも３０°Ｃ以上高い温度とするのが必須である。望ましくは、下限値にさらに安全領域を持たせる。具体的には、下限値は３１０°Ｃ以上が望ましい。一方、リードフレーム１０１の保温温度の上限値は、第２金属１０５を確実に溶融させないために、第２金属１０５の融点よりも３０°Ｃ以上低い温度とするのが好適である。望ましくは、上限値にも安全領域を持たせる。具体的には、Ａｇ、Ｃｕ、Ａｕ、Ａｌ、Ｚｎの中で最も融点の低い金属はＺｎであり、Ｚｎの融点は４２０°Ｃであるので、リードフレーム１０１の保温温度の上限値は、望ましくは３８０°Ｃ以下である。この実施例では、リードフレーム１０１の保温温度は、Ｂｉの融点よりも約５０°Ｃ高い３２０°Ｃとした。これは、Ｂｉの濡れ性を高めるとともに、加熱源の温度調整の不安定さを考慮したためである。尚、ステップ００３、ステップ００４においても、リードフレーム１０１の保温温度は３２０°Ｃとした。
　また、はんだ材料１０３の載置荷重は、第２金属１０５である平均粒径３μｍのＣｕ粒子の粒界隙間からＢｉを主成分とする第１金属１０４が溶出する荷重にする必要がある。図５は、はんだ材料１０３の載置荷重と電極表面処理層１０２に溶出した第１金属の溶出量の関係を示している。詳しくは、図５は、リードフレーム１０１を３２０°Ｃに保温し、空間の酸素濃度は５０ｐｐｍとし、組成がＢｉ－８重量％Ｃｕで直径１ｍｍの球状であるはんだ材料１０３を用いた場合のはんだ材料１０３の載置荷重と第１金属１０４の溶出量の関係を示している。図５の表の横軸は、はんだ材料の載置荷重（ｇｆ）を示し、その縦軸は第１金属の溶出量（ｃｍ３）を示している。
　図５から、載置荷重１０ｇｆ以上では、第１金属１０４の溶出量が０．１４１４×１０－４ｃｍ３以上となり、第２金属１０５である平均粒径３μｍのＣｕ粒子の粒界隙間からＢｉを主成分とする第１金属１０４が溶出して、電極表面処理層１０２上に濡れ広がることがわかる。ただし、載置荷重２００ｇｆ、５００ｇｆでは、溶出した第１金属１０４がはんだ材料吸着ツール１０６の開口部に詰まることがわかった。このことから、載置荷重は、１０ｇｆ以上で１５０ｇｆ以下とするのが好ましい。この実施例では、載置荷重は３０ｇｆとした。
　次にステップ００３を図１（ｃ）により説明する。この実施例では、リードフレーム１０１上の電極表面処理層１０２の上に載置したはんだ材料１０３に対して、直方体状の圧延ツール１０７を垂直に降下させることにより、はんだ材料１０３を電極表面処理層１０２上に圧延した。リードフレーム１０１は３２０°Ｃに保温し、空間の酸素濃度は５０ｐｐｍとした。圧延ツール１０７には、天面サイズ３．５ｍｍ×４．５ｍｍ、高さ３０ｍｍの張鋼製のものを用いた。圧延ツールの材料は、はんだ材料１０３に溶解せず、３１０°Ｃ以上で３８０°Ｃ以下の範囲の温度で溶融しない金属材料が好適である。この条件を満たす材質としては、例えばＳＵＳ３０４、ＳＵＳ３１６等のＳＵＳ系の材質を挙げることができる。はんだ材料１０３の圧延後の面積は、後に搭載する半導体素子１０９の下面の表面積以上で電極表面処理層１０２の上面の表面積以下にする。この為、圧延ツール１０７の下面の表面積も、後に搭載する半導体素子１０９の下面の表面積以上で電極表面処理層１０２の上面の表面積以下にする必要がある。
　図６に電極表面処理層１０２の上面と降下した圧延ツール１０７の下面との間の距離とはんだ材料１０３の圧延率の関係を示す。図６の表の横軸は、電極表面処理層１０２の上面と降下した圧延ツール１０７の下面との間の距離（μｍ）を示し、その縦軸は圧延率（％）を示している。はんだ材料１０３の圧延率の算出式を以下に記す。
　　圧延率＝（（濡れ広がったはんだ材料１０３の表面積）÷（電極表面処理層１０２の上面の表面積））×１００（％）
　ここで、電極表面処理層１０２の上面の表面積は４．５×５．５＝２４．７５ｍｍ２である。また、後に搭載する半導体素子１０９の下面の表面積は３．５×４．５＝１５．７５ｍｍ２である。そのため、はんだ材料１０３の圧延後の面積を、半導体素子１０９の下面の表面積以上で電極表面処理層１０２の上面の表面積以下にする為には、圧延率は６３．６％（１５．７５÷２４．７５×１００）以上で１００％以下にする必要がある。圧延率が６３．６％のときは、はんだ材料１０３は、半導体素子１０９の下面の表面積と同等の面積に圧延され、圧延率が１００％のときは、はんだ材料１０３は、電極表面処理層１０２の上面の表面積と同等の面積に圧延される。
　図６から、電極表面処理層１０２の上面と降下した圧延ツール１０７の下面との間の距離が１００μｍ以下で、圧延率が６３．６％以上となることがわかる。また、１μｍと５μｍの場合、圧延率が１００％以上となることがわかる。圧延率が１００％以上の場合、電極表面処理層１０２の上面の表面積以上にはんだ材料１０３が濡れ広がる。したがって、この場合、電極表面処理層１０２からはみ出したはんだ材料が、リードフレーム１０１の背面に回りこみ、後の工程を中断させる可能性がある。これらのことから、電極表面処理層１０２の上面と降下した圧延ツール１０７の下面との間の距離は、１０μｍ以上で１００μｍ以下にすることが望ましい。本実施例では、電極表面処理層１０２の上面と降下した圧延ツール１０７の下面との間の距離は２０μｍとした。
　また、リードフレーム１０１の保温温度３２０°Ｃでは、Ｃｕ、Ｂｉの融点がそれぞれ１０８３°Ｃ、２７１°Ｃであることから、Ｂｉのみが溶融状態となる。従って、圧延ツール１０７を電極表面処理層１０２に対して垂直に降下させることで、はんだ材料１０３中のＢｉを主成分とする第１金属１０４を圧延して、第２金属１０５である平均粒径３μｍのＣｕ粒子を、はんだ材料１０３を載置した位置に留めることができる。
　次にステップ００４を図１（ｄ）により説明する。この実施例では、半導体素子１０９を吸着した半導体素子吸着ツール１０８を移動させることで、その吸着された半導体素子１０９を、電極表面処理層１０２上で圧延されたはんだ材料１０３の上に無荷重で載置した。半導体素子１０９のはんだ材料１０３と対向する表面（下面）には、拡散防止層とＡｇ層がこの順にそれぞれ１μｍ、１．５μｍの厚みで蒸着法により成膜されている。半導体素子吸着ツール１０８には、ＳＵＳ３０４製のものを用いた。ただし、ＳＵＳ３１６等の他のＳＵＳ系の材質のツールを用いてもよい。また、半導体素子１０９には、Ｓｉ製で、直径が６インチで厚みが０．３ｍｍのウエハから、３．５ｍｍ×４．５ｍｍの大きさで切り出したものを用いた。
　次にステップ００５を図１（ｅ）により説明する。この実施例では、リードフレーム１０１を室温まで冷却することにより、はんだ材料１０３を凝固させ、リードフレーム１０１上の電極表面処理層１０２と半導体素子１０９とを接合した。空間の酸素濃度は１ｐｐｍ以上で３００ｐｐｍ以下とするのが好ましい。この実施例では、空間の酸素濃度は５０ｐｐｍとした。
　続いて、この実施の形態の半導体装置の特徴を、図７および表２を用いて説明する。表２の実施例１～６の製造方法は、上記した実施例と同じであり、実施例１～６は、はんだ材料の組成のみが異なる。なお、上記した実施例は表２の実施例１である。また、実施例１～６と比較例７～１２の製造方法は、ステップ００２のはんだ材料の載置方法のみが異なり、はんだ材料の供給量および他のステップに関しては同じである。実施例１～６と比較例７～１２のはんだ材料の組成は同じ条件とした。
　図７はこの実施の形態に係る半導体装置におけるはんだ材料の組成説明図であり、詳しくは、図７（ａ）はこの実施の形態に係る半導体装置を横から見た横断面構造を示し、図７（ｂ）は図７（ａ）に示すＳ－Ｓ’線に沿った縦断面構造を示す。表２は、リードフレーム上に半導体素子を接合した後における、はんだ材料の組成物の分布状態、はんだ材料の熱伝導率、および半導体装置の製品歩留まりを示す。はんだ材料の組成物の分布状態は、リードフレームと半導体素子とを接合するダイボンド接合部（はんだ材料接合部）の中央部と外周部のそれぞれにおける組成比率で表す。半導体装置の製品歩留まりは、リードフレーム上に半導体素子を接合した後、最終工程まで行ってパワー用ＩＧＢＴモジュールを組み立て、動作試験を実行することで算出した。
Figure JPOXMLDOC01-appb-T000002
  
　図７（ａ）および図７（ｂ）に示すように、半導体素子１０９の電極表面処理層１０２に対向する面（下面）の外形は四角形である。その外形における一方の対向する２辺（長辺）の長さを２Ａとし、他方の対向する２辺（短辺）の長さを２Ｂとし、長さ２Ｂの短辺の中点同士を結んだ直線をＸ軸とし、長さ２Ａの長辺の中点同士を結んだ直線をＹ軸とし、Ｘ軸とＹ軸の交点を原点Ｏ（Ｘ＝０、Ｙ＝０）としてＸ－Ｙ座標面を設定し、そのＸ－Ｙ座標面においてＸ＝±７Ａ／１０の直線とＹ＝±７Ｂ／１０の直線で囲まれる領域とその領域より外側の領域をそれぞれ中央部、外周部として設定して、その設定した中央部、外周部のそれぞれに対応するはんだ材料１０３中の各領域における第１金属１０４と第２金属１０５の比率を調べた結果、表２に示すように、実施例１～６では、中央部に対応する領域（ダイボンド接合部の中央部）において第１金属１０４よりも第２金属１０５の比率が高くなり、外周部に対応する領域（ダイボンド接合部の外周部）において第２金属１０５よりも第１金属１０４の比率が高くなっていた。
　比較例のはんだ材料の載置方法は、一般的なダイボンド工法であるポッティング工法である。ポッティング工法では、溶融状態のはんだ材料１０３をディスペンスによりリードフレーム１０１上の電極表面処理層１０２に載置する。
　表２より、同じはんだ材料組成であるにも関わらず、組み立て後の製品歩留まりでは、実施例が８５％～１００％であるのに対し、比較例は２０％～３０％と実施例と比べて５５％～８０％低下していることがわかる。
　実施例の製品歩留まりが高いのは、実施例の製造方法では、Ｂｉを主成分とする第１金属１０４の外周部に、熱伝導率が１２１Ｗ／（ｍ・Ｋ）～４２７Ｗ／（ｍ・Ｋ）の第２金属１０５の粒子が分散したはんだ材料１０３を用いたので、保温されたリードフレーム１０１上にはんだ材料１０３を載置したときに、第１金属１０４が濡れ広がるとともに、その濡れ広がった第１金属１０４の表面の中央部における高熱伝導率の第２金属１０５の粒子数がその中央部の周囲における第２金属１０５の粒子数よりも多くなり、そのような状態のはんだ材料１０３を圧延することで、表２に示すように、半導体素子１０９の中央部の下部に第２金属１０５が８３．８原子％～８９．８原子％配置され、ダイボンド接合部の原点Ｏ部の熱伝導率が１０３Ｗ／（ｍ・Ｋ）～１５８Ｗ／（ｍ・Ｋ）となり、ＩＧＢＴの動作中に半導体素子１０９から発生した熱が効率的にリードフレーム１０１に放熱されたためであると考えられる。尚、１２１Ｗ／（ｍ・Ｋ）はＺｎの熱伝導率であり、４２７Ｗ／（ｍ・Ｋ）はＡｇの熱伝導率である。
　一方、比較例の製品歩留まりが低くなっているのは、比較例の製造方法では、溶融状態のはんだ材料を供給するため、１２１Ｗ／（ｍ・Ｋ）～４２７Ｗ／（ｍ・Ｋ）の高熱伝導率の第２金属１０５の粒子が第１金属１０４中で均一に分散したはんだ材料を圧延することになり、その結果、表２に示すように、半導体素子１０９の中央部の下部に第２金属１０５が２．４原子％～５原子％しか配置されず、ＩＧＢＴの動作中に半導体素子１０９から発生した熱をリードフレームに放熱する際に、はんだ材料１０３の主成分である熱伝導率が９．１５Ｗ／（ｍ・Ｋ）のＢｉの放熱特性が顕著に影響して、ダイボンド接合部の最高熱伝導率が、現行のダイボンド接合用のはんだ材料として用いられているＰｂ－３重量％Ｓｎの熱伝導率３５Ｗ／（ｍ・Ｋ）よりも低い９．７Ｗ／（ｍ・Ｋ）～１１Ｗ／（ｍ・Ｋ）となり、半導体素子１０９で発生した熱の放熱が不十分となり、半導体素子１０９の温度が動作限界温度よりも高くなったためであると考えられる。
　なお、実施例では第２金属１０５として、Ａｇ、Ｃｕ、Ｚｎより１種類または２種類選択したが、第２金属１０５としてＡｕ、Ａｌより１種類または２種類選択してもよい。これは、ＡｕおよびＡｌの融点はそれぞれ１０６４°Ｃ、６６０°Ｃであり、いずれの融点もＢｉの２７１°Ｃより高く、また、ＡｕおよびＡｌの熱伝導率はそれぞれ３１７Ｗ／（ｍ・Ｋ）、２３７Ｗ／（ｍ・Ｋ）であり、いずれの熱伝導率もＰｂの３５Ｗ／（ｍ・Ｋ）より高いためである。
　また、実施例では、第１金属１０４と第２金属１０５の比率を調べるのに、ダイボンド接合部の中央部の外形を四角形に設定したが、ダイボンド接合部と半導体素子１０９との界面の面積の約半分の面積を持ち、球状のはんだ材料１０３を載置した位置を中心とする領域を中央部に設定すればよく、中央部の外形は四角形に限定されるものではない。
　また、実施例では、電源部に使用されるパワー用半導体装置の一種であるパワー用ＩＧＢＴモジュールを製造したが、本発明はパワー用ＩＧＢＴモジュールにのみ適用されるものではない。また、実施例ではＳｉ製の半導体素子を用いたが、本発明は、Ｓｉ製の半導体素子を用いる場合にのみ適用されるものではなく、例えばＧａＮ製の半導体素子やＳｉＣ製の半導体素子などを用いる場合にも適用することができる。
　また、以上説明した実施の形態では、１個の半導体素子を支持板上に搭載した半導体装置を例に挙げて説明したが、本発明は、半導体素子１０９として例えば複数の機能ブロック（ＣＰＵ部、ＲＡＭ部、ＲＯＭ部、ＩＯ部、電源部など）を内蔵したＬＳＩを支持板上に搭載した半導体装置にも適用することができる。ＬＳＩを搭載する場合、発熱源が複数散在するので、それぞれの発熱源の下部にはんだ材料１０３をそれぞれ配置させる。但し、この場合、上記の実施の形態のはんだ材料よりも径が小さいはんだ材料を用いる。
　本発明にかかる半導体装置は、半導体素子と支持板との十分な接合強度を確保しつつ、半導体素子からの発熱の支持板への放熱性を向上させることができ、製品歩留まりを向上することができるものであり、パワー用半導体装置や小電力トランジスタ等の半導体パッケージへの活用が期待される。

Claims (6)

  1. 　支持板と、
    　前記支持板上に形成された電極表面処理層と、
    　半導体素子と、
    　Ｂｉを主成分とする第１金属の内部に前記第１金属よりも融点が高い第２金属の粒子を含有しており、前記電極表面処理層と前記半導体素子とを接合するはんだ材料と、
    を備え、前記はんだ材料の前記半導体素子の中央部に対応する領域では前記第１金属よりも前記第２金属の組成比率が高く、前記中央部に対応する領域の外側の領域では前記第２金属よりも前記第１金属の組成比率が高く、前記中央部に対応する領域内での前記第２金属の組成比率が８３．８原子％以上であることを特徴とする半導体装置。
  2. 　前記半導体素子の前記電極表面処理層と対向する面の外形は四角形であり、
    　その外形における一方の対向する２辺の長さを２Ａとし、他方の対向する２辺の長さを２Ｂとし、
    　長さ２Ｂの２辺の中点同士を結んだ直線をＸ軸とし、長さ２Ａの２辺の中点同士を結んだ直線をＹ軸とし、
    　Ｘ軸とＹ軸の交点を原点としてＸ－Ｙ座標面を設定した場合、
    　前記半導体素子の中央部が前記Ｘ－Ｙ座標面において－７Ａ／１０≦Ｘ≦７Ａ／１０、－７Ｂ／１０≦Ｙ≦７Ｂ／１０で規定される
    ことを特徴とする請求項１記載の半導体装置。
  3. 　前記第２金属は、熱伝導率が３５Ｗ／（ｍ・Ｋ）以上で４２７Ｗ／（ｍ・Ｋ）以下の範囲にあり、融点が４２０°Ｃ以上で１０８３°Ｃ以下の範囲にある金属であることを特徴とする請求項１もしくは２のいずれかに記載の半導体装置。
  4. 　前記第２金属は、Ａｇ、Ｃｕ、Ａｕ、Ａｌ、Ｚｎより少なくとも１種類選択された金属であることを特徴とする請求項１ないし３のいずれかに記載の半導体装置。
  5. 　前記第２金属としてＣｕが選択されており、前記中央部に対応する領域内での前記第２金属の組成比率が８４．１原子％以上であることを特徴とする請求項４記載の半導体装置。
  6. 　前記第２金属としてＣｕとＡｇが選択されており、前記中央部に対応する領域内での前記第２金属の組成比率が８４．７原子％以上であることを特徴とする請求項４記載の半導体装置。
     
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CN105448744B (zh) * 2015-11-17 2017-11-07 通富微电子股份有限公司 无助焊剂式凸块回流成球率控制方法

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