WO2009013315A3 - Halbleitersubstrat mit durchkontaktierung und verfahren zu seiner herstellung - Google Patents
Halbleitersubstrat mit durchkontaktierung und verfahren zu seiner herstellung Download PDFInfo
- Publication number
- WO2009013315A3 WO2009013315A3 PCT/EP2008/059662 EP2008059662W WO2009013315A3 WO 2009013315 A3 WO2009013315 A3 WO 2009013315A3 EP 2008059662 W EP2008059662 W EP 2008059662W WO 2009013315 A3 WO2009013315 A3 WO 2009013315A3
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- contact
- production
- semiconductor substrate
- layer
- metallization
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title abstract 4
- 239000000758 substrate Substances 0.000 title abstract 2
- 238000004519 manufacturing process Methods 0.000 title 1
- 238000001465 metallisation Methods 0.000 abstract 2
- 238000009413 insulation Methods 0.000 abstract 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76898—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics formed through a semiconductor substrate
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- H01L24/02—Bonding areas ; Manufacturing methods related thereto
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
Die Durchkontaktierung des Substrates wird durch eine Kontaktlochfüllung (4) einer Halbleiterschicht (11) und eine Metallisierung (17) einer Ausnehmung (16) in einer rückseitigen Halbleiterschicht (13) gebildet, wobei die Halbleiterschichten durch eine vergrabene Isolationsschicht (12) voneinander getrennt sind, an deren Schichtlage die Kontaktlochfüllung beziehungsweise die Metallisierung jeweils endet.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US12/670,303 US8378496B2 (en) | 2007-07-24 | 2008-07-23 | Semiconductor substrate with interlayer connection and method for production of a semiconductor substrate with interlayer connection |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE102007034306.1 | 2007-07-24 | ||
DE102007034306A DE102007034306B3 (de) | 2007-07-24 | 2007-07-24 | Halbleitersubstrat mit Durchkontaktierung und Verfahren zur Herstellung eines Halbleitersubstrates mit Durchkontaktierung |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2009013315A2 WO2009013315A2 (de) | 2009-01-29 |
WO2009013315A3 true WO2009013315A3 (de) | 2009-04-02 |
Family
ID=39884282
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/EP2008/059662 WO2009013315A2 (de) | 2007-07-24 | 2008-07-23 | Halbleitersubstrat mit durchkontaktierung und verfahren zu seiner herstellung |
Country Status (3)
Country | Link |
---|---|
US (1) | US8378496B2 (de) |
DE (1) | DE102007034306B3 (de) |
WO (1) | WO2009013315A2 (de) |
Families Citing this family (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7863187B2 (en) * | 2005-09-01 | 2011-01-04 | Micron Technology, Inc. | Microfeature workpieces and methods for forming interconnects in microfeature workpieces |
TWI502705B (zh) | 2009-08-19 | 2015-10-01 | Xintec Inc | 晶片封裝體及其製造方法 |
EP2306506B1 (de) | 2009-10-01 | 2013-07-31 | ams AG | Verfahren zur Herstellung einer Halbleitervorrichtung mit einer Durchkontaktierung |
DE102009049102B4 (de) * | 2009-10-13 | 2012-10-04 | Austriamicrosystems Ag | Halbleiterbauelement mit Durchkontaktierung und Verfahren zur Herstellung einer Durchkontaktierung in einem Halbleiterbauelement |
US9559001B2 (en) * | 2010-02-09 | 2017-01-31 | Xintec Inc. | Chip package and method for forming the same |
EP2597677B1 (de) | 2011-11-23 | 2014-08-06 | ams AG | Halbleitervorrichtung mit Substratdurchgang, der von einer Lötkugel abgedeckt wird, und zugehöriges Herstellungsverfahren |
US9012324B2 (en) * | 2012-08-24 | 2015-04-21 | United Microelectronics Corp. | Through silicon via process |
KR101960496B1 (ko) * | 2012-08-29 | 2019-03-20 | 에스케이하이닉스 주식회사 | 반도체 장치 |
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US20100314762A1 (en) | 2010-12-16 |
US8378496B2 (en) | 2013-02-19 |
DE102007034306B3 (de) | 2009-04-02 |
WO2009013315A2 (de) | 2009-01-29 |
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