WO2008126206A1 - 半導体装置の製造方法 - Google Patents
半導体装置の製造方法 Download PDFInfo
- Publication number
- WO2008126206A1 WO2008126206A1 PCT/JP2007/056368 JP2007056368W WO2008126206A1 WO 2008126206 A1 WO2008126206 A1 WO 2008126206A1 JP 2007056368 W JP2007056368 W JP 2007056368W WO 2008126206 A1 WO2008126206 A1 WO 2008126206A1
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- WIPO (PCT)
- Prior art keywords
- copper
- copper layer
- forming
- layer
- semiconductor device
- Prior art date
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- 238000000034 method Methods 0.000 title abstract 3
- 239000004065 semiconductor Substances 0.000 title abstract 3
- 239000010949 copper Substances 0.000 abstract 12
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 abstract 9
- 229910052802 copper Inorganic materials 0.000 abstract 9
- 239000010410 layer Substances 0.000 abstract 8
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 abstract 2
- 239000000956 alloy Substances 0.000 abstract 2
- 229910045601 alloy Inorganic materials 0.000 abstract 2
- 239000011229 interlayer Substances 0.000 abstract 2
- 239000000463 material Substances 0.000 abstract 2
- 239000000758 substrate Substances 0.000 abstract 2
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 abstract 1
- PWHULOQIROXLJO-UHFFFAOYSA-N Manganese Chemical compound [Mn] PWHULOQIROXLJO-UHFFFAOYSA-N 0.000 abstract 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 abstract 1
- 230000004888 barrier function Effects 0.000 abstract 1
- 229910052799 carbon Inorganic materials 0.000 abstract 1
- 238000009792 diffusion process Methods 0.000 abstract 1
- 238000010438 heat treatment Methods 0.000 abstract 1
- 229910052748 manganese Inorganic materials 0.000 abstract 1
- 239000011572 manganese Substances 0.000 abstract 1
- 229910052751 metal Inorganic materials 0.000 abstract 1
- 239000002184 metal Substances 0.000 abstract 1
- 229910052757 nitrogen Inorganic materials 0.000 abstract 1
- 229910052760 oxygen Inorganic materials 0.000 abstract 1
- 239000001301 oxygen Substances 0.000 abstract 1
Classifications
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- H—ELECTRICITY
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
- H01L21/76831—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers in via holes or trenches, e.g. non-conductive sidewall liners
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
- H01L21/2855—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table by physical means, e.g. sputtering, evaporation
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
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- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
- H01L21/28556—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table by chemical means, e.g. CVD, LPCVD, PECVD, laser CVD
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/288—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition
- H01L21/2885—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition using an external electrical current, i.e. electro-deposition
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- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
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- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76807—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures
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- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
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- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76853—Barrier, adhesion or liner layers characterized by particular after-treatment steps
- H01L21/76861—Post-treatment or after-treatment not introducing additional chemical elements into the layer
- H01L21/76864—Thermal treatment
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- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76867—Barrier, adhesion or liner layers characterized by methods of formation other than PVD, CVD or deposition from a liquids
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76871—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers
- H01L21/76873—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers for electroplating
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- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/53204—Conductive materials
- H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
- H01L23/53228—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being copper
- H01L23/53233—Copper alloys
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- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/53204—Conductive materials
- H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
- H01L23/53228—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being copper
- H01L23/53238—Additional layers associated with copper layers, e.g. adhesion, barrier, cladding layers
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
(課題)Cu拡散バリア膜を形成するためにCu中に添加した金属を、Cu配線中から効率的に除去することを可能とする半導体装置の製造方法を提供する。
(解決手段)基板上に層間絶縁膜を形成する工程と、前記層間絶縁膜に開口部を形成する工程と、前記開口部の内面を覆うように、マンガンと銅を含む合金層を形成する工程と、前記合金層上に、銅を主成分とする材料からなる第1の銅層を、前記開口部を埋めるように形成する工程と、前記第1の銅層上に、銅を主成分とする材料からなり、且つ、酸素、炭素又は窒素のいずれかの濃度が前記第1の銅層よりも高い第2の銅層を形成する工程と、前記第2の銅層が形成された基板を加熱する工程と、前記第2の銅層を除去する工程とを有する。
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2009508757A JP5141683B2 (ja) | 2007-03-27 | 2007-03-27 | 半導体装置の製造方法 |
PCT/JP2007/056368 WO2008126206A1 (ja) | 2007-03-27 | 2007-03-27 | 半導体装置の製造方法 |
US12/566,016 US8003518B2 (en) | 2007-03-27 | 2009-09-24 | Semiconductor device fabrication method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/JP2007/056368 WO2008126206A1 (ja) | 2007-03-27 | 2007-03-27 | 半導体装置の製造方法 |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US12/566,016 Continuation US8003518B2 (en) | 2007-03-27 | 2009-09-24 | Semiconductor device fabrication method |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2008126206A1 true WO2008126206A1 (ja) | 2008-10-23 |
Family
ID=39863389
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP2007/056368 WO2008126206A1 (ja) | 2007-03-27 | 2007-03-27 | 半導体装置の製造方法 |
Country Status (3)
Country | Link |
---|---|
US (1) | US8003518B2 (ja) |
JP (1) | JP5141683B2 (ja) |
WO (1) | WO2008126206A1 (ja) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2010080606A (ja) * | 2008-09-25 | 2010-04-08 | Rohm Co Ltd | 半導体装置の製造方法 |
WO2013191065A1 (ja) * | 2012-06-18 | 2013-12-27 | 東京エレクトロン株式会社 | マンガン含有膜の形成方法 |
Families Citing this family (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5343417B2 (ja) * | 2008-06-25 | 2013-11-13 | 富士通セミコンダクター株式会社 | 半導体装置およびその製造方法 |
US8852674B2 (en) | 2010-11-12 | 2014-10-07 | Applied Materials, Inc. | Method for segregating the alloying elements and reducing the residue resistivity of copper alloy layers |
US8461683B2 (en) * | 2011-04-01 | 2013-06-11 | Intel Corporation | Self-forming, self-aligned barriers for back-end interconnects and methods of making same |
US8492897B2 (en) * | 2011-09-14 | 2013-07-23 | International Business Machines Corporation | Microstructure modification in copper interconnect structures |
TWI645511B (zh) * | 2011-12-01 | 2018-12-21 | 美商應用材料股份有限公司 | 用於銅阻障層應用之摻雜的氮化鉭 |
JP5972317B2 (ja) * | 2014-07-15 | 2016-08-17 | 株式会社マテリアル・コンセプト | 電子部品およびその製造方法 |
US10453740B2 (en) * | 2017-06-29 | 2019-10-22 | Taiwan Semiconductor Manufacturing Co., Ltd. | Interconnect structure without barrier layer on bottom surface of via |
US10760156B2 (en) | 2017-10-13 | 2020-09-01 | Honeywell International Inc. | Copper manganese sputtering target |
US11035036B2 (en) | 2018-02-01 | 2021-06-15 | Honeywell International Inc. | Method of forming copper alloy sputtering targets with refined shape and microstructure |
US11069526B2 (en) | 2018-06-27 | 2021-07-20 | Taiwan Semiconductor Manufacturing Co., Ltd. | Using a self-assembly layer to facilitate selective formation of an etching stop layer |
US11270911B2 (en) | 2020-05-06 | 2022-03-08 | Applied Materials Inc. | Doping of metal barrier layers |
Citations (3)
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---|---|---|---|---|
JP2007012996A (ja) * | 2005-07-01 | 2007-01-18 | Toshiba Corp | 半導体装置 |
JP2007059660A (ja) * | 2005-08-25 | 2007-03-08 | Sony Corp | 半導体装置の製造方法および半導体装置 |
JP2007067107A (ja) * | 2005-08-30 | 2007-03-15 | Fujitsu Ltd | 半導体装置の製造方法 |
Family Cites Families (10)
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---|---|---|---|---|
US6037257A (en) * | 1997-05-08 | 2000-03-14 | Applied Materials, Inc. | Sputter deposition and annealing of copper alloy metallization |
US5969422A (en) * | 1997-05-15 | 1999-10-19 | Advanced Micro Devices, Inc. | Plated copper interconnect structure |
US6249055B1 (en) * | 1998-02-03 | 2001-06-19 | Advanced Micro Devices, Inc. | Self-encapsulated copper metallization |
US6265305B1 (en) * | 1999-10-01 | 2001-07-24 | United Microelectronics Corp. | Method of preventing corrosion of a titanium layer in a semiconductor wafer |
JP3992654B2 (ja) * | 2003-06-26 | 2007-10-17 | 沖電気工業株式会社 | 半導体装置の製造方法 |
JP4478038B2 (ja) | 2004-02-27 | 2010-06-09 | 株式会社半導体理工学研究センター | 半導体装置及びその製造方法 |
JP2006294922A (ja) * | 2005-04-12 | 2006-10-26 | Renesas Technology Corp | 半導体装置の製造方法 |
JP4589835B2 (ja) * | 2005-07-13 | 2010-12-01 | 富士通セミコンダクター株式会社 | 半導体装置の製造方法及び半導体装置 |
JP2007109687A (ja) * | 2005-10-11 | 2007-04-26 | Sony Corp | 半導体装置の製造方法 |
JP2008135569A (ja) * | 2006-11-28 | 2008-06-12 | Rohm Co Ltd | 半導体装置の製造方法および半導体装置 |
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2007
- 2007-03-27 WO PCT/JP2007/056368 patent/WO2008126206A1/ja active Application Filing
- 2007-03-27 JP JP2009508757A patent/JP5141683B2/ja not_active Expired - Fee Related
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2009
- 2009-09-24 US US12/566,016 patent/US8003518B2/en active Active
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2007012996A (ja) * | 2005-07-01 | 2007-01-18 | Toshiba Corp | 半導体装置 |
JP2007059660A (ja) * | 2005-08-25 | 2007-03-08 | Sony Corp | 半導体装置の製造方法および半導体装置 |
JP2007067107A (ja) * | 2005-08-30 | 2007-03-15 | Fujitsu Ltd | 半導体装置の製造方法 |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2010080606A (ja) * | 2008-09-25 | 2010-04-08 | Rohm Co Ltd | 半導体装置の製造方法 |
WO2013191065A1 (ja) * | 2012-06-18 | 2013-12-27 | 東京エレクトロン株式会社 | マンガン含有膜の形成方法 |
JPWO2013191065A1 (ja) * | 2012-06-18 | 2016-05-26 | 東京エレクトロン株式会社 | マンガン含有膜の形成方法 |
Also Published As
Publication number | Publication date |
---|---|
US8003518B2 (en) | 2011-08-23 |
JP5141683B2 (ja) | 2013-02-13 |
JPWO2008126206A1 (ja) | 2010-07-22 |
US20100009530A1 (en) | 2010-01-14 |
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