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WO2005072032A1 - Circuit board, mounting structure of circuit board, and mounting method for circuit board - Google Patents

Circuit board, mounting structure of circuit board, and mounting method for circuit board Download PDF

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Publication number
WO2005072032A1
WO2005072032A1 PCT/JP2005/000887 JP2005000887W WO2005072032A1 WO 2005072032 A1 WO2005072032 A1 WO 2005072032A1 JP 2005000887 W JP2005000887 W JP 2005000887W WO 2005072032 A1 WO2005072032 A1 WO 2005072032A1
Authority
WO
WIPO (PCT)
Prior art keywords
circuit board
component
land
mounting
lead
Prior art date
Application number
PCT/JP2005/000887
Other languages
French (fr)
Japanese (ja)
Inventor
Naomi Ishizuka
Yoshifumi Kanetaka
Original Assignee
Nec Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nec Corporation filed Critical Nec Corporation
Priority to JP2005517301A priority Critical patent/JPWO2005072032A1/en
Publication of WO2005072032A1 publication Critical patent/WO2005072032A1/en

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/306Lead-in-hole components, e.g. affixing or retention before soldering, spacing means
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09818Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09909Special local insulating pattern, e.g. as dam around component
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/20Details of printed circuits not provided for in H05K2201/01 - H05K2201/10
    • H05K2201/2036Permanent spacer or stand-off in a printed circuit or printed circuit assembly
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3447Lead-in-hole components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3452Solder masks

Definitions

  • Circuit board mounting structure of circuit board, and mounting method of circuit board
  • the present invention relates to a circuit board for soldering a plug-in type electronic component with lead-free solder, and
  • a plug-in type electronic component is mounted on a circuit board having lands on the front and back surfaces, and the front and back lands are connected by plated through holes.
  • the present invention relates to a circuit board to be mounted, a mounting structure using the same, and a mounting method.
  • FIG. 1 is a cross-sectional view of a soldered portion showing a conventional mounting structure of an insertion-type electronic component on a circuit board.
  • a circuit board used for mounting electronic components is manufactured as follows, taking the most common subtractive method as an example.
  • a copper-clad laminate made by applying pressure and heat treatment to a copper foil on a laminate of a pre-predator impregnated with a thermosetting resin such as epoxy resin on a base material obtained by folding glass or the like into a fibrous form.
  • a copper foil is patterned to produce a wiring board having a predetermined number of inner layer patterns, and the wiring board and the copper-clad laminate are laminated via a pre-preder so that the copper-clad laminate becomes the outermost layer.
  • the substrates are integrated by pressurizing and heating to produce a substrate having the inner layer wiring 3 in the resin laminate 2.
  • an opening 5 is formed by drilling, an activation process, electroless plating, and electrolytic plating are performed to form a through hole 8.
  • patterning of the outermost copper layer is performed to form the outer layer wiring 4 and, at the same time, the substrate surface side (in this specification, the mounting surface of the insertion type electronic component is the front surface side, and The front surface land 6 is formed on the back surface, and the back surface land 7 is formed on the back surface side.
  • a photosensitive solder resist material is applied to a region excluding a soldered portion on the front and back surfaces of the substrate.
  • a white display paint is applied by a screen printing method or the like to form a display symbol such as a mounting position of the electronic component, a component number, a board number, and the like, thereby manufacturing the circuit board 1. The process is completed.
  • the process of soldering electronic components using the circuit board 1 manufactured as described above generally involves mounting a chip component or a surface mount type component such as a QFP (Quad Flat Package). After performing the reflow step, a flow step of mounting the import-type electronic component is performed. In the reflow process, solder is supplied to the land for mounting surface-mounted components on the circuit board, and a thermosetting adhesive for temporary fixing is applied to prevent falling and component displacement, and then surface mounting is performed. Soldering is performed by mounting the mold parts and heating them in a reflow oven.
  • QFP Quad Flat Package
  • the electronic component is mounted by inserting the lead 12 of the insertable electronic component 13 into the through hole 8, and in that state, the solder is brought into contact with the molten solder using a wave solder bath or the like. Then, soldering is performed. As a result, a solder fillet 14 is formed, and the lead 12 is electrically and mechanically coupled to the lands 6, 7 and the through hole 8. If surface-mounted components are also mounted on the back side of the circuit board, the surface-mounted components are soldered together with the insert-type electronic components in this flow step. In this case, a thermosetting adhesive for temporary fixing is applied, surface-mounted components such as chip components are mainly mounted, the adhesive is cured by heating, and then the insertion-type electronic components 13 are mounted. And perform flow soldering.
  • solder used in the reflow step and the flow step is tin-lead eutectic solder.
  • environmental pollution due to lead has led to an increase in environmental consciousness, and a shift to lead-free solder that does not contain lead is in progress.
  • This lead-free solder contains tin as a main component and is made of silver, copper, zinc, bismuth, indium, antimony, nickel, germanium, or the like.
  • the main lead-free solders are tin-zinc-based solders (tin-9, Owt% Zn, which is a eutectic composition of tin-zinc, and the amount of zinc is changed or other elements are added.
  • the solders with improved characteristics are collectively referred to as tin-zinc-based solders, such as Sn-8.OZn-3.OBi) or tin-copper-based solder (Sn-0, a eutectic composition of tin-copper).
  • Sn-8.OZn-3.OBi tin-copper-based solder
  • Sn-0 a eutectic composition of tin-copper
  • the amount of silver can be changed or other elements can be added, centered on Sn-0.7Cu-0.3Ag) or tin-silver solder (Sn-3.5wt% Ag, which is the eutectic composition of tin-silver). Those with improved characteristics are collectively referred to as “tin-silver based solders.” Typical columns are Sn-3.OAg-0. 5Cu, Sn_3.5Ag-0.
  • solders have higher tensile strength and creep strength and elongation of metal than the tin-lead eutectic solder (Sn 63wt%, remaining Pb), which has been used most frequently for soldering of electronic equipment. It has the metal characteristic that there is little. For this reason, stress relaxation is less likely to occur in the soldered part than in lead solder.
  • the melting temperature of tin-lead eutectic solder is 183 ° C, whereas that of lead-free solder is 190 ° C-230 ° C. Because of the increase, residual stress due to the difference in thermal expansion after solder solidification tends to increase.
  • FIGS. 2, 3, and 4 are cross-sectional views showing states of leads and solder fillets after soldering an electronic component having a housing made of a polyamide resin using a lead-free solder on a conventional circuit board. It is. 2, the right side of the figure shows the center of the electronic component 13, and the left side of the figure shows the end of the electronic component 13.
  • Table 1 shows the coefficient of thermal expansion between the glass epoxy resin laminate as the substrate material of the circuit board 1 and the polyamide resin as the housing material of the electronic component 13. As can be seen from Table 1, there is a large difference in the coefficient of thermal expansion between the board material and the electronic component housing in the horizontal direction of the circuit board.
  • the lead 12 fixed with lead-free solder is greatly inclined from the center of the electronic component 13 to the end.
  • the inclination of the lead is exaggerated.
  • the lead 12 located at the end is inclined by about half the radius of the lead with respect to the center of the through hole 8. Therefore, the thermal expansion coefficient of the housing of the electronic component 13 and
  • a large stress is applied particularly to the lead 12 at the end. Accordingly, a great deal of stress is generated in the through hole into which the lead 12 at the end is inserted and the solder fillet formed therein.
  • the tin-lead eutectic solder is very susceptible to creep deformation, even if such stress is generated, the stress has been absorbed by the creep deformation of the solder itself.
  • the lead-free solder 6 in which the creep resistance of the solder itself is several tens to several hundred times that of the tin-lead eutectic, the effect of reducing the stress as much as the tin-lead eutectic solder cannot be expected.
  • FIG. 3 shows the state where through-hole peeling 15 has occurred.
  • the through-hole peeling 15 tends to occur mainly when the mismatch between the thermal expansion coefficient of the housing of the electronic component 13 and the thermal expansion coefficient of the circuit board 1 is large.
  • the X-Y direction the direction of the board surface
  • land peeling a phenomenon that the surface land 6 peels off from the substrate surface (hereinafter referred to as land peeling) as shown in FIG. 4 is also confirmed. Due to the higher melting point of the lead-free solder, the land peeling 16 solidifies earlier at a higher temperature than the solder fillet 14 of lead-free solder formed on the surface land 6 and the eutectic tin-tin solder. Therefore, the amount of shrinkage of the circuit board 1 in the Z direction after the solder fillet 14 is formed on the surface increases, and the stress is concentrated on the end of the solder fillet 14.
  • the front surface land 6 and the rear surface land 7 are provided on the front and rear surfaces so as to sandwich the resin laminate 2, and the front surface land 6 and the rear surface
  • solder fillets are formed on both of the lands 7, residual stress and the resulting through-hole peeling and land peeling have a serious effect on reliability.
  • high densification and high performance have been accelerated, and multilayer circuit boards have become essential.
  • the present invention has been made to solve the above problems, and an object of the present invention is to prevent through-hole peeling even when soldering with lead-free solder.
  • An object of the present invention is to provide a circuit board having high performance and a mounting structure and a mounting method thereof.
  • a conductive through hole into which a lead of a leaded component is inserted and soldered, and a surface land is mounted on a mounting surface of the leaded component, and vice versa.
  • a circuit board having a back surface land electrically connected to the front land via the conductive through hole on a side surface, a component for restricting a mounting height of the lead component on a mounting surface of the lead component.
  • a circuit board characterized by having a plurality of receivers is provided.
  • a land coating is formed on the mounting surface of the component with leads to cover the peripheral edge of the surface land.
  • the surface land is mounted on the mounting surface of the leaded component, and the surface land is electrically connected to the surface land via the conductive through hole on the opposite surface.
  • the circuit is mounted in such a manner that the lead is inserted into the conductive through hole and soldered to the mounting surface of the leaded component of the circuit board having the back surface land connected to the lead.
  • a circuit board mounting structure is provided, wherein a plurality of component receivers for regulating the mounting height of the leaded component are provided on the circuit board below the leaded component. Is done.
  • a surface on a mounting surface of a component with leads is provided.
  • the mounting height of the leaded component is mounted on the mounting surface of the leaded component of the circuit board having the back surface land electrically connected to the surface land via a conductive through hole on the opposite surface.
  • a method for mounting a circuit board is provided.
  • a constant distance can be secured between the circuit board and the bottom surface of the plug-in electronic component.
  • FIG. 5 illustrates two leads of the plug-in type electronic component.It is assumed that the lead 12a on the left side is fixed and the lead 12b on the right side is deformed due to a thermal change between the leads 12a and 12b. Model is shown.
  • the electronic component 13 having the leads 12a and the leads 12b When the electronic component 13 having the leads 12a and the leads 12b is mounted on the circuit board 1 and flow soldering is performed with lead-free solder, the electronic component 13 and the circuit board 1 are heated and then returned to room temperature. These cause thermal deformation at the ratio of the coefficient of thermal expansion ay (82 ppm / ° C) of the 13 case and the coefficient of thermal expansion (XY direction) ax (16 ppm / ° C) of the circuit board 1.
  • the displacement of the lead 12b will be a large displacement as shown by the width W ', and a large stress will be applied to the soldered part and the through hole. . Therefore, by increasing the standoff L, the displacement of the lead 12b can be suppressed to a small value, and the force S for suppressing an increase in stress generated in the through hole can be suppressed.
  • Table 2 shows electronic components having different thermal expansion coefficients y, pin diameters in the longitudinal direction of the housing, and standoffs L, respectively, at -40 ° C (30 minutes) and 25. This is a table showing the relationship between the number of disconnection cycles until disconnection when a temperature cycle test was performed with one cycle of C (5 minutes) and 125 ° C (30 minutes).
  • the thermal expansion coefficient ay of the housing is 80 ppm / ° C or more
  • the pin diameter in the longitudinal direction of the housing is 0.5 mm or more
  • the standoff is: !.
  • the component receiver is provided between the circuit board and the electronic component, it is possible to secure a certain or more standoff between the circuit board and the electronic component. Therefore, the occurrence of peeling of through holes can be suppressed, and the reliability of the mounting structure using the circuit board can be improved.
  • the peripheral edge of the surface land is covered with the insulating film, it is possible to prevent the solder from spreading to the edge of the surface land and to spread the solder to the edge of the surface land. Fillet stress is no longer applied, and it is easy to follow the thermal expansion and contraction of the circuit board, so that the concentration of stress on the peripheral portion can be reduced and land separation can be prevented.
  • FIG. 1 is a cross-sectional view showing a conventional mounting structure.
  • FIG. 2 is a cross-sectional view for explaining a problem of a conventional example.
  • FIG. 3 is a cross-sectional view showing a problem of a conventional example.
  • FIG. 4 is a cross-sectional view showing a problem of a conventional example.
  • FIG. 5 is a cross-sectional view showing a mounting structure for explaining advantages of the present invention.
  • FIG. 6A is a sectional view showing a circuit board according to the first exemplary embodiment of the present invention.
  • FIG. 6B is a sectional view showing a mounting structure according to the first embodiment of the present invention.
  • FIG. 7A is a sectional view showing a circuit board according to a second exemplary embodiment of the present invention.
  • FIG. 7B is a sectional view showing a mounting structure according to the second embodiment of the present invention.
  • FIG. 8A is a cross-sectional view showing a mounting structure according to Example 1 of the present invention.
  • FIG. 8B is a plan view showing a mounting structure according to Example 1 of the present invention.
  • FIG. 9A is a cross-sectional view showing a mounting structure according to Example 2 of the present invention.
  • FIG. 9B is a plan view showing a mounting structure according to Example 2 of the present invention.
  • FIG. 10A is a cross-sectional view showing a mounting structure according to Example 3 of the present invention.
  • FIG. 10B is a plan view showing a mounting structure of Embodiment 3 of the present invention.
  • FIG. 11A is a sectional view showing a mounting structure according to Example 4 of the present invention.
  • FIG. 11B is a plan view showing a mounting structure according to Example 4 of the present invention.
  • FIGS. 6A and 6B are cross-sectional views showing the first embodiment of the present invention.
  • the circuit board 1 has a resin laminate 2 made of glass epoxy or the like as a substrate material, and has an inner wiring 3 therein and an outer wiring 4 on its outer surface.
  • An opening 5 is formed in the lead insertion portion of the circuit board, and a front land 6 and a back land 7 are formed around the opening on the front and rear surfaces of the substrate.
  • Front land 6 and rear land 7 are through holes (Plated through holes) 8 electrically connected.
  • FIGS. 6A and 6B show examples having two layers of inner layer wirings 3, but the number of layers is not limited. Further, a double-sided circuit board having no inner layer wiring may be used. Areas other than the soldering locations on the front and back surfaces of the substrate are covered with solder resist 9.
  • the peripheral edge of the surface land 6 on the substrate surface is covered with a solder dam 10 for preventing the solder from spreading.
  • the solder dam can be formed by printing a heat-resistant resin using a screen printing method or the like. Also, when the component mounting position, part number, board number, etc. are printed on the board surface using a white display paint, the same paint may be used. Accordingly, it is possible to prevent the man-hour for forming the solder dam 10 from increasing. Although not shown, a solder dam covering the peripheral edge may be formed on the back surface land 7. Thereby, the reliability can be further improved.
  • a component receiver 11 for regulating the mounting height of the plug-in electronic component.
  • the location of the component receiver 11 may be just below the electronic components to be mounted, and the location is not particularly limited. Also, the number of installations is not limited as long as it is several or more.
  • the component receiver 11 can be formed by printing and applying a heat-resistant resin once or a plurality of times. Also, when printing and applying a thermosetting adhesive for temporarily fixing the surface mount type component, the component receiver 11 may be formed simultaneously using the same material. This can prevent an increase in man-hours for forming the component receiver 11.
  • 6A and 6B show an example in which the component receiver 11 is provided at a position different from that of the solder dam 10, but the component receiver 11 may be provided on the solder dam 10. This makes it possible to efficiently form the component receiver 11 having a required altitude.
  • the component receiver 11 can be formed by bonding a spacer made of resin, metal or ceramic instead of a method of printing and applying a resin composition or the like by a printing method.
  • the adhesive used in this case may be simultaneously applied using the same material when printing and applying an adhesive for temporarily fixing the surface-mounted electronic component.
  • the component receiver 11 may be formed of a material that can be soldered at least partially, and may be soldered on the board in a reflow soldering process. In this case, it is desirable to perform the reflow soldering with the component receiver 11 temporarily fixed with an adhesive.
  • FIG. 6B is a cross-sectional view showing a state where electronic components are mounted on the circuit board according to the first embodiment of the present invention shown in FIG. 6A.
  • the mounting of the surface-mounted electronic component has been completed.
  • the electronic component 13 is mounted on the circuit board 1 by inserting the lead 12 into the through hole 8 of the circuit board.
  • the bottom surface of the electronic component 13 contacts the top surface of the component receiver 11, a certain level of standoff can be secured.
  • the back surface of the substrate is immersed in a wave solder bath or the like to perform flow soldering.
  • the leads 12 of the electronic component 13 and the through holes 8, the front lands 6, and the rear lands 7 of the circuit board 1 are electrically and mechanically coupled by the solder fillets 14.
  • the electronic component 13 After completion of the flow soldering, the electronic component 13 is often fixed with its bottom surface in contact with the component receiver 11 as shown in FIG. 6B, but is floated and fixed from the component receiver 11. There are things.
  • FIGS. 7A and 7B are a cross-sectional view of a circuit board according to the second embodiment of the present invention and a cross-sectional view showing a state where electronic components are mounted on the circuit board.
  • FIGS. 7A and 7B parts that are the same as the parts of the first embodiment shown in FIGS. 6A and 6B are given the same reference numerals, and overlapping descriptions are omitted.
  • the difference from the first embodiment shown in FIGS. 6A and 6B of the present embodiment is that no solder dam is formed, and solder-resist 9 replaces front surface land 6 and rear surface land 7. The point extending to the peripheral edge and the point where the component receiver 11 is formed into a spherical body.
  • the component receiver 11 is formed of resin, metal, or ceramics, and is bonded by an adhesive previously applied to a substrate.
  • a spherical body having a surface coated with an adhesive may be arranged on the substrate.
  • Example 1 of the present invention will be described with reference to FIGS. 8A and 8B.
  • 8A is a cross-sectional view illustrating a structure in which electronic components are mounted on the circuit board according to the first embodiment of the present invention
  • FIG. 8B is a perspective plan view when FIG. 8A is viewed from the upper side of the electronic components. is there. 8A and 8B, parts that are the same as the parts in the embodiment shown in FIGS. 6A and 6B, and FIGS. Omitted as appropriate To do. The same applies to the other embodiments shown in FIGS. 9A to 11B.
  • the solder dam 10 is formed by using a display paint used for marking and printing of electronic components, component numbers, board numbers, and the like. Then, in the process of forming the display portion, a solder dam is also formed at the same time. In addition, display paints have demonstrated heat resistance to heat applied during soldering.
  • the component receiver 11 is formed on the solder dam 10 by using a thermosetting adhesive used for temporarily fixing the surface mount type electronic component. . And since the component receiver 11 is formed in the adhesive layer forming step for temporarily fixing the surface mount type component, the number of steps is not increased.
  • FIG. 9A is a cross-sectional view showing a structure in which an electronic component is mounted on a circuit board according to the second embodiment of the present invention.
  • FIG. 9B is a perspective plan view when FIG. 9A is viewed from the upper surface on the electronic component side.
  • FIG. 9A is a cross-sectional view showing a structure in which an electronic component is mounted on a circuit board according to the second embodiment of the present invention.
  • FIG. 9B is a perspective plan view when FIG. 9A is viewed from the upper surface on the electronic component side.
  • the solder resist 9 used to protect the outer layer wiring 4 on the substrate surface is applied so as to extend to the peripheral edge of the surface land 6.
  • the component receiver 11 is formed at a position away from the surface land 6 by using a thermosetting adhesive that is a temporary fixing adhesive.
  • FIG. 10A is a cross-sectional view showing a structure in which electronic components are mounted on a circuit board according to Embodiment 3 of the present invention.
  • FIG. 10B is a perspective view when FIG. 10A is viewed from the upper surface on the electronic component side. It is a top view.
  • the solder dam 10 is formed using a thermosetting adhesive for temporarily fixing the surface mount electronic component. Then, a component receiver 11 which is a spacer made of resin is adhered to the substrate by an adhesive constituting the solder dam 10.
  • FIG. 11A is a cross-sectional view showing a structure in which electronic components are mounted on a circuit board according to Embodiment 4 of the present invention.
  • FIG. 11B is a perspective view when FIG. 11A is viewed from the upper surface on the electronic component side. It is a top view. In this embodiment, no solder dam is formed, and the solder resist 9 is extended to the peripheral edge of the surface land 6 as in the second embodiment.
  • the component receiver 11 has a configuration in which the surface of a resin ball 1 la, which is a resin sphere, is covered with 1 lb of an adhesive.
  • the component receiver 11 is provided by arranging a resin ball on which a thermosetting adhesive is applied in advance on a substrate and performing heat treatment to cure the adhesive.

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)

Abstract

A solder dam (10) is formed around a surface land (6) on a circuit board (1). A part receiver (11) for ensuring that the installation height of an insertion type electronic part is a predetermined height is provided. An electronic part (13) is flow-soldered in a state that it is lifted over the board.

Description

明 細 書  Specification
回路基板、回路基板の実装構造および回路基板の実装方法  Circuit board, mounting structure of circuit board, and mounting method of circuit board
技術分野  Technical field
[0001] 本発明は、揷入型の電子部品を無鉛はんだにてはんだ付けする回路基板、および The present invention relates to a circuit board for soldering a plug-in type electronic component with lead-free solder, and
、それを用いた実装構造と実装方法に関し、特に、表面、裏面にランドを有し、表-裏 面ランド間がプレーテッドスルーホールによって接続されている回路基板に、揷入型 の電子部品を実装する回路基板およびそれを用いた実装構造と実装方法に関する ものである。 In particular, with regard to the mounting structure and mounting method using the same, particularly, a plug-in type electronic component is mounted on a circuit board having lands on the front and back surfaces, and the front and back lands are connected by plated through holes. The present invention relates to a circuit board to be mounted, a mounting structure using the same, and a mounting method.
背景技術  Background art
[0002] 回路基板上には、多くのリードレス化された電子部品が表面実装される力 S、コネクタ 、可変抵抗器などのいくつかの電子部品は、挿入型電子部品としてそのリードがプレ 一テッドスルーホール(以下、単にスルーホールと記す)に挿入されはんだ付けされ る。図 1は、従来の回路基板への挿入型電子部品の実装構造を示すはんだ付け部 の断面図である。  [0002] On a circuit board, a number of electronic components, such as a force S, a connector, and a variable resistor, on which many leadless electronic components are surface-mounted, have leads as insertable electronic components. It is inserted into a ted through hole (hereinafter simply referred to as a through hole) and soldered. FIG. 1 is a cross-sectional view of a soldered portion showing a conventional mounting structure of an insertion-type electronic component on a circuit board.
[0003] 電子部品の実装用に使用される回路基板は、最も一般的なサブトラクティブ法を例 に挙げると次のように作製される。ガラスなどを繊維状に折り込んだ基材に、エポキシ 樹脂など熱硬化性の樹脂をしみこませたプリプレダの積層体上に、銅箔を加圧加熱 処理して貼り付けた銅張積層板を用レ、、銅箔をパターユングして所定層数の内層パ ターンを有する配線基板を作製し、それらの配線基板と銅張積層板を銅張積層板が 最外層となるようにプリプレダを介して積層し加圧加熱して一体化させ、樹脂積層板 2内に内層配線 3を有する基板を作製する。  [0003] A circuit board used for mounting electronic components is manufactured as follows, taking the most common subtractive method as an example. A copper-clad laminate made by applying pressure and heat treatment to a copper foil on a laminate of a pre-predator impregnated with a thermosetting resin such as epoxy resin on a base material obtained by folding glass or the like into a fibrous form. Then, a copper foil is patterned to produce a wiring board having a predetermined number of inner layer patterns, and the wiring board and the copper-clad laminate are laminated via a pre-preder so that the copper-clad laminate becomes the outermost layer. Then, the substrates are integrated by pressurizing and heating to produce a substrate having the inner layer wiring 3 in the resin laminate 2.
[0004] 次いで、ドリルカ卩ェにより開口 5を形成し、活性化処理、無電解めつき、電解めつき を行って、スルーホール 8を形成する。続いて、最外層の銅層のパターユングを行つ て、外層配線 4を形成するとともに、基板表面側(本明細書においては、挿入型電子 部品の取り付け面を表面側とし、その反対側の面を裏面とする)に表面ランド 6を、裏 面側に裏面ランド 7を形成する。  [0004] Next, an opening 5 is formed by drilling, an activation process, electroless plating, and electrolytic plating are performed to form a through hole 8. Subsequently, patterning of the outermost copper layer is performed to form the outer layer wiring 4 and, at the same time, the substrate surface side (in this specification, the mounting surface of the insertion type electronic component is the front surface side, and The front surface land 6 is formed on the back surface, and the back surface land 7 is formed on the back surface side.
[0005] その後、基板表裏面のはんだ付け部を除く領域に感光性のソルダーレジスト材を 印刷塗布し、露光してソルダーレジスト 9を形成する。最後に、図示はしていないが、 白色の表示用塗料をスクリーン印刷法などで塗布して電子部品の実装位置や、部品 番号、基板番号などの表示記号を形成して、回路基板 1の作製工程が完了する。 [0005] After that, a photosensitive solder resist material is applied to a region excluding a soldered portion on the front and back surfaces of the substrate. Print-coat and expose to form solder resist 9. Finally, although not shown, a white display paint is applied by a screen printing method or the like to form a display symbol such as a mounting position of the electronic component, a component number, a board number, and the like, thereby manufacturing the circuit board 1. The process is completed.
[0006] このように作製された回路基板 1を用いて、電子部品のはんだ付けを行う工程は、 一般的には、チップ部品や QFP(Quad Flat Package)などの表面実装型部品を実 装するリフロー工程を行った後、揷入型の電子部品を実装するフロー工程が行われ る。リフロー工程においては、回路基板上の表面実装型部品搭載用のランドにソルダ 一^ i一ストを供給し、落下、部品ズレ防止のための仮固定用熱硬化性接着剤を塗布 後、表面実装型部品を搭載し、リフロー炉等で加熱することによってはんだ付けされ る。次のフロー工程においては、スルーホール 8に揷入型の電子部品 13のリード 12 を揷入することによって電子部品を搭載し、その状態で、ウェーブはんだ槽などを用 いて溶融状態のはんだに接触させることによって、はんだ付けを行う。これにより、は んだフィレット 14が形成され、リード 12はランド 6、 7およびスルーホール 8と電気的' 機械的に結合される。回路基板裏面側にも表面実装型部品を搭載する場合には、こ のフロー工程において、挿入型電子部品と同時に表面実装型部品もはんだ付けさ れる。この場合には、仮固定用の熱硬化性接着剤を塗布し、主にチップ部品などの 表面実装型部品を搭載し加熱して接着剤を硬化した後、挿入型の電子部品 13を搭 載し、フローはんだ付けを行う。  [0006] The process of soldering electronic components using the circuit board 1 manufactured as described above generally involves mounting a chip component or a surface mount type component such as a QFP (Quad Flat Package). After performing the reflow step, a flow step of mounting the import-type electronic component is performed. In the reflow process, solder is supplied to the land for mounting surface-mounted components on the circuit board, and a thermosetting adhesive for temporary fixing is applied to prevent falling and component displacement, and then surface mounting is performed. Soldering is performed by mounting the mold parts and heating them in a reflow oven. In the next flow step, the electronic component is mounted by inserting the lead 12 of the insertable electronic component 13 into the through hole 8, and in that state, the solder is brought into contact with the molten solder using a wave solder bath or the like. Then, soldering is performed. As a result, a solder fillet 14 is formed, and the lead 12 is electrically and mechanically coupled to the lands 6, 7 and the through hole 8. If surface-mounted components are also mounted on the back side of the circuit board, the surface-mounted components are soldered together with the insert-type electronic components in this flow step. In this case, a thermosetting adhesive for temporary fixing is applied, surface-mounted components such as chip components are mainly mounted, the adhesive is cured by heating, and then the insertion-type electronic components 13 are mounted. And perform flow soldering.
[0007] 従前の実装方法では、リフロー工程、フロー工程で用いられるはんだは、錫鉛共晶 はんだであった。し力しながら、近年、鉛による環境汚染が環境意識の高まりにより、 鉛を含まない無鉛はんだへの転換が進んでいる。この無鉛はんだは、錫を主成分と し、銀、銅、亜鉛、ビスマス、インジウム、アンチモン、ニッケル、ゲルマニウムなどから なっている。  [0007] In the conventional mounting method, the solder used in the reflow step and the flow step is tin-lead eutectic solder. In recent years, however, environmental pollution due to lead has led to an increase in environmental consciousness, and a shift to lead-free solder that does not contain lead is in progress. This lead-free solder contains tin as a main component and is made of silver, copper, zinc, bismuth, indium, antimony, nickel, germanium, or the like.
[0008] 現在のおもな無鉛はんだとしては、錫亜鉛系はんだ(錫亜鉛の共晶組成である Sn -9. Owt%Znを中心に、亜鉛の量を変更したり、他の元素を添加して特性を改善し たものを総称して錫亜鉛系はんだという。代表例は、 Sn-8. OZn-3. OBi)や、錫銅 系はんだ(錫銅の共晶組成である Sn— 0. 7wt%Cuを中心に、銅の量を変更したり、 他の元素を添加して特性を改善したものを総称して錫銅系はんだという。代表例は、 Sn-0. 7Cu— 0. 3Ag)や錫銀系はんだ(錫銀の共晶組成である Sn— 3. 5wt%Agを 中心に、銀の量を変更したり、他の元素を添加して特性を改善したものを総称して錫 銀系はんだ'とレヽう。代表 ί列は、 Sn-3. OAg-0. 5Cu、 Sn_3. 5Ag-0. 75Cu)等力 S ある。 [0008] Currently, the main lead-free solders are tin-zinc-based solders (tin-9, Owt% Zn, which is a eutectic composition of tin-zinc, and the amount of zinc is changed or other elements are added. The solders with improved characteristics are collectively referred to as tin-zinc-based solders, such as Sn-8.OZn-3.OBi) or tin-copper-based solder (Sn-0, a eutectic composition of tin-copper). With a focus on 7wt% Cu, the amount of copper changed or other elements added to improve the characteristics are collectively referred to as tin-copper solder. The amount of silver can be changed or other elements can be added, centered on Sn-0.7Cu-0.3Ag) or tin-silver solder (Sn-3.5wt% Ag, which is the eutectic composition of tin-silver). Those with improved characteristics are collectively referred to as “tin-silver based solders.” Typical columns are Sn-3.OAg-0. 5Cu, Sn_3.5Ag-0.
[0009] これら無鉛はんだは、電子機器のはんだ接合に最も多く使われてきた錫鉛共晶は んだ(Sn63wt%、残り Pb)に比べ、金属の引張り強度、クリープ強度が強ぐまた伸 びが少ないという金属特性を持っている。このため、はんだ付け部においては鉛はん だより応力緩和が起こりにくぐまた、溶融温度も錫鉛共晶はんだが 183°Cであるのに 比べ、無鉛はんだは 190°C— 230°Cと高くなつているため、はんだ凝固後の熱膨張 差による残留応力が大きくなりやすい。  [0009] These lead-free solders have higher tensile strength and creep strength and elongation of metal than the tin-lead eutectic solder (Sn 63wt%, remaining Pb), which has been used most frequently for soldering of electronic equipment. It has the metal characteristic that there is little. For this reason, stress relaxation is less likely to occur in the soldered part than in lead solder.In addition, the melting temperature of tin-lead eutectic solder is 183 ° C, whereas that of lead-free solder is 190 ° C-230 ° C. Because of the increase, residual stress due to the difference in thermal expansion after solder solidification tends to increase.
[0010] 図 2、図 3、図 4は、従来の回路基板において、無鉛はんだを用いて、ポリアミド樹脂 による筐体を有する電子部品をはんだ付けした後のリード、はんだフィレットの状態を 示す断面図である。図 2において、図の右側は電子部品 13の中心部を示し、図の左 側は電子部品 13の端部を示している。表 1に回路基板 1の基板材料であるガラスェ ポキシ樹脂積層板と電子部品 13の筐体材料であるポリアミド樹脂との熱膨張係数を 示す。表 1から分かるように、回路基板の水平方向において、基板材料と電子部品筐 体との間には大きな熱膨張係数差がある。  [0010] FIGS. 2, 3, and 4 are cross-sectional views showing states of leads and solder fillets after soldering an electronic component having a housing made of a polyamide resin using a lead-free solder on a conventional circuit board. It is. 2, the right side of the figure shows the center of the electronic component 13, and the left side of the figure shows the end of the electronic component 13. Table 1 shows the coefficient of thermal expansion between the glass epoxy resin laminate as the substrate material of the circuit board 1 and the polyamide resin as the housing material of the electronic component 13. As can be seen from Table 1, there is a large difference in the coefficient of thermal expansion between the board material and the electronic component housing in the horizontal direction of the circuit board.
[0011] [表 1]  [0011] [Table 1]
Figure imgf000005_0001
図 2に示されるように、無鉛はんだにて固定されたリード 12は、電子部品 13の中心 から端部に行くに従って、大きく傾く。図 2では、リードの傾きは実際より誇張されて示 されている。実際には、最も端部に位置するリード 12は、スルーホール 8の中心に対 して、リードの半径の半分程度傾く。したがって、電子部品 13の筐体の熱膨張係数と 、回路基板 1の基板材料の熱膨張係数とのミスマッチにより、特に端部のリード 12に は多大な応力が掛カることになる。これに伴って、端部のリード 12が挿入されている スルーホールとそこに形成されているはんだフィレットには多大な応力が生じることに なる。従来は、錫鉛共晶はんだが、非常にクリープ変形しやすいため、このような応 力が発生しても、はんだ自身のクリープ変形によって応力は吸収されてきた。しかし、 はんだ自身のクリープ耐性が錫鉛共晶の数十倍一数百倍になる無鉛はんだ 6にお いては、錫鉛共晶はんだほどの応力緩和の効果は期待出来ない。
Figure imgf000005_0001
As shown in FIG. 2, the lead 12 fixed with lead-free solder is greatly inclined from the center of the electronic component 13 to the end. In FIG. 2, the inclination of the lead is exaggerated. Actually, the lead 12 located at the end is inclined by about half the radius of the lead with respect to the center of the through hole 8. Therefore, the thermal expansion coefficient of the housing of the electronic component 13 and On the other hand, due to the mismatch with the thermal expansion coefficient of the substrate material of the circuit board 1, a large stress is applied particularly to the lead 12 at the end. Accordingly, a great deal of stress is generated in the through hole into which the lead 12 at the end is inserted and the solder fillet formed therein. Conventionally, since the tin-lead eutectic solder is very susceptible to creep deformation, even if such stress is generated, the stress has been absorbed by the creep deformation of the solder itself. However, in the case of the lead-free solder 6 in which the creep resistance of the solder itself is several tens to several hundred times that of the tin-lead eutectic, the effect of reducing the stress as much as the tin-lead eutectic solder cannot be expected.
[0013] さらに、溶融温度が高くなつたことにより、熱膨張/収縮によって大きな応力が発生 し、スルーホールめつきが基板から剥離 (以後、スルーホール剥離と記す)する現象 が発生し、スルーホール周辺において断線が発生することになる。図 3にスルーホー ル剥離 15が発生した状態を示す。このスルーホール剥離 15は、主に、電子部品 13 の筐体の熱膨張係数と、回路基板 1の熱膨張係数のミスマッチが大きい場合に多発 する傾向が見られ、はんだ付け時に発生した回路基板 14の X— Y方向(基板面方向) の応力が、スルーホールめつきと回路基板 1の界面に集中することによって発生する [0013] Further, as the melting temperature increases, a large stress is generated due to thermal expansion / contraction, and a phenomenon occurs in which the through-hole plating peels from the substrate (hereinafter, referred to as through-hole peeling). Disconnection will occur in the periphery. Figure 3 shows the state where through-hole peeling 15 has occurred. The through-hole peeling 15 tends to occur mainly when the mismatch between the thermal expansion coefficient of the housing of the electronic component 13 and the thermal expansion coefficient of the circuit board 1 is large. In the X-Y direction (the direction of the board surface) is concentrated on the through-hole plating and the interface of the circuit board 1
[0014] また、無鉛はんだを使用した場合、図 4に示すような、表面ランド 6が基板表面より 剥離 (以後、ランド剥離と記す)する現象も確認される。このランド剥離 16は、無鉛は んだの融点が高くなることによって、表面ランド 6上に形成される無鉛はんだのはんだ フィレット 14力 S、錫鉛共晶はんだに比べ、高温で先に凝固してしまうため、表面では んだフィレット 14が形成された後の回路基板 1の Z方向の収縮量が増加し、はんだフ ィレット 14の端部に応力が集中することより発生する。 When a lead-free solder is used, a phenomenon that the surface land 6 peels off from the substrate surface (hereinafter referred to as land peeling) as shown in FIG. 4 is also confirmed. Due to the higher melting point of the lead-free solder, the land peeling 16 solidifies earlier at a higher temperature than the solder fillet 14 of lead-free solder formed on the surface land 6 and the eutectic tin-tin solder. Therefore, the amount of shrinkage of the circuit board 1 in the Z direction after the solder fillet 14 is formed on the surface increases, and the stress is concentrated on the end of the solder fillet 14.
[0015] なお、これらの問題は、片面にのみランドおよび配線パターンが形成されている片 面の回路基板では発生しない。片面基板では揷入型の電子部品のリードを揷入する 貫通孔は形成されている力 電解めつきされたスルーホールは形成されなレ、。また、 片面にし力 ンド (本発明の裏面ランドに相当)が形成されないため、電子部品側には 、表面ランドに当たるものが存在せず、はんだフィレットも形成されなレ、。更に、片面 の回路基板では裏面ランド側しかはんだ付けがなされないため、リードは回路基板の 貫通孔内および電子部品側は固定されないフリーの状態となる。したがって、はんだ 付け部に応力集中が起こらず、電子部品側で、スルーホール剥離、ランド剥離など は発生しない。 [0015] These problems do not occur on a single-sided circuit board having lands and wiring patterns formed only on one side. On the single-sided board, insert the lead of the plug-in type electronic component. The through-hole is formed. The through-hole is not formed by electrolytic plating. Also, since no force lands (corresponding to the back surface lands of the present invention) are formed on one side, there is no object hitting the front surface lands on the electronic component side, and no solder fillets are formed. Furthermore, since only the rear surface land is soldered on a single-sided circuit board, the leads are in a free state in which the leads are not fixed in the through holes of the circuit board and on the electronic component side. Therefore, the solder There is no stress concentration at the attachment part, and no through-hole peeling or land peeling occurs on the electronic component side.
[0016] しかし、図 2に示すように、樹脂積層板 2を挟み込むようにして、表'裏面に表面ラン ド 6、裏面ランド 7をもち、スルーホール 8を介して、前記表面ランド 6、裏面ランド 7の 両方にはんだフィレットが形成される両面ないし多層回路基板においては、残留応 力およびそれに伴って発生するスルーホール剥離、ランド剥離は、信頼性に重大な 影響を及ぼす問題となる。而して、近年は、高密度化、高性能化が加速しており、回 路基板の多層化は必須となっている。  However, as shown in FIG. 2, the front surface land 6 and the rear surface land 7 are provided on the front and rear surfaces so as to sandwich the resin laminate 2, and the front surface land 6 and the rear surface In a double-sided or multilayer circuit board in which solder fillets are formed on both of the lands 7, residual stress and the resulting through-hole peeling and land peeling have a serious effect on reliability. In recent years, high densification and high performance have been accelerated, and multilayer circuit boards have become essential.
発明の開示  Disclosure of the invention
[0017] 本発明は、上記問題点を解決すべくなされたものであって、その目的は、無鉛はん だにてはんだ付けを行う場合でも、スルーホール剥離を起こすことのなレ、、信頼性の 高い回路基板とその実装構造および実装方法とを提供することにある。  The present invention has been made to solve the above problems, and an object of the present invention is to prevent through-hole peeling even when soldering with lead-free solder. An object of the present invention is to provide a circuit board having high performance and a mounting structure and a mounting method thereof.
[0018] 上記の目的を達成するため、本発明によれば、リード付き部品のリードが挿入され はんだ付けされる導電化スルーホールを有し、リード付き部品の搭載面に表面ランド を、その反対側の面に前記導電化スルーホールを介して前記表面ランドと電気的に 接続された裏面ランドを有する回路基板において、リード付き部品の搭載面にはリー ド付き部品の取り付け高さを規制する部品受けが複数個設けられていることを特徴と する回路基板が提供される。  According to the present invention, in order to achieve the above object, according to the present invention, there is provided a conductive through hole into which a lead of a leaded component is inserted and soldered, and a surface land is mounted on a mounting surface of the leaded component, and vice versa. A circuit board having a back surface land electrically connected to the front land via the conductive through hole on a side surface, a component for restricting a mounting height of the lead component on a mounting surface of the lead component. A circuit board characterized by having a plurality of receivers is provided.
[0019] そして、好ましくは、リード付き部品の搭載面には前記表面ランドの周縁部を被覆す るランド被膜が形成される。  [0019] Preferably, a land coating is formed on the mounting surface of the component with leads to cover the peripheral edge of the surface land.
[0020] また、上記の目的を達成するため、本発明によれば、リード付き部品の搭載面に表 面ランドを、その反対側の面に導電化スルーホールを介して前記表面ランドと電気的 に接続された裏面ランドを有する回路基板のリード付き部品の搭載面にリード付き部 品力 そのリードが前記導電化スルーホールに揷入されはんだ付けされてレ、る態様 にて実装されている回路基板の実装構造において、前記リード付き部品下の回路基 板上には前記リード付き部品の取り付け高さを規制する部品受けが複数個設けられ ていることを特徴とする回路基板の実装構造が提供される。  Further, in order to achieve the above object, according to the present invention, the surface land is mounted on the mounting surface of the leaded component, and the surface land is electrically connected to the surface land via the conductive through hole on the opposite surface. The circuit is mounted in such a manner that the lead is inserted into the conductive through hole and soldered to the mounting surface of the leaded component of the circuit board having the back surface land connected to the lead. A circuit board mounting structure is provided, wherein a plurality of component receivers for regulating the mounting height of the leaded component are provided on the circuit board below the leaded component. Is done.
[0021] また、上記の目的を達成するため、本発明によれば、リード付き部品の搭載面に表 面ランドを、その反対側の面に導電化スルーホールを介して前記表面ランドと電気的 に接続された裏面ランドを有する回路基板のリード付き部品の搭載面に前記リード付 き部品の取り付け高さを規制する部品受けを複数個設ける第 1の工程と、リード付き 部品を、そのリードを前記導電化スルーホールに揷入しはんだ付けすることにより実 装する第 2の工程と、を有することを特徴とする回路基板の実装方法が提供される。 Further, according to the present invention, in order to achieve the above object, a surface on a mounting surface of a component with leads is provided. The mounting height of the leaded component is mounted on the mounting surface of the leaded component of the circuit board having the back surface land electrically connected to the surface land via a conductive through hole on the opposite surface. A first step of providing a plurality of component receivers for regulating the components, and a second step of mounting the component with leads by inserting the leads into the conductive through-holes and soldering. A method for mounting a circuit board is provided.
[0022] 上記の構成を有する本発明によれば、回路基板と揷入型電子部品の底面との間に 一定の距離 (スタンドオフ)を確保することができる。これにより、溶融はんだが凝固し 電子部品、回路基板が収縮する際の電子部品のリードの変形が抑制され、電子部品 筐体と回路基板の熱膨張係数差に起因してリード、はんだフィレットに発生する応力 を緩和することができる。この状況を、図 5を参照して、より具体的に説明する。図 5は 、揷入型電子部品の 2本のリードを模しており、左側のリード 12aは固定し、右側のリ ード 12bにてリード 12a-12b間の熱変化による変形が発生すると仮定したモデルが 示されている。回路基板 1にリード 12a、リード 12bを有する電子部品 13を搭載し、無 鉛はんだでフローはんだ付けを行うと、電子部品 13および回路基板 1は加熱され、 次いで常温に戻されることにより、電子部品 13の筐体の熱膨張係数 a y (82ppm/°C) と、回路基板 1の熱膨張係数 (X-Y方向) a x (16ppm/°C)の割合で、これらは熱変 形を起こす。このとき、リード 12bは電子部品の筐体側で、 a y_ ct x= α ζの割合だけ 変形することになる力 スタンドオフ Lが大きい場合には、リード 12bは、 X— Y方向に 幅 Wだけ変位するのに対し、スタンドオフが 1/ と小さい場合には、リード 12bの変位 は幅 W'で示されるような大きな変位量となり、はんだ付け部及びスルーホール内に 大きな応力が掛かることになる。従って、スタンドオフ Lを大きくすることにより、リード 1 2bの変位を少なく抑えることができ、スルーホール内に発生する応力の増加を抑制 すること力 Sできる。 According to the present invention having the above configuration, a constant distance (stand-off) can be secured between the circuit board and the bottom surface of the plug-in electronic component. This suppresses deformation of the leads of the electronic component when the molten solder solidifies and the electronic components and the circuit board shrink, and is generated in the leads and solder fillets due to the difference in the thermal expansion coefficient between the electronic component housing and the circuit board. Stress can be reduced. This situation will be described more specifically with reference to FIG. FIG. 5 illustrates two leads of the plug-in type electronic component.It is assumed that the lead 12a on the left side is fixed and the lead 12b on the right side is deformed due to a thermal change between the leads 12a and 12b. Model is shown. When the electronic component 13 having the leads 12a and the leads 12b is mounted on the circuit board 1 and flow soldering is performed with lead-free solder, the electronic component 13 and the circuit board 1 are heated and then returned to room temperature. These cause thermal deformation at the ratio of the coefficient of thermal expansion ay (82 ppm / ° C) of the 13 case and the coefficient of thermal expansion (XY direction) ax (16 ppm / ° C) of the circuit board 1. At this time, the lead 12b is on the housing side of the electronic component, and the force to be deformed by the ratio of a y_ct x = α ζ If the standoff L is large, the lead 12b is only the width W in the X—Y direction. If the standoff is as small as 1 /, the displacement of the lead 12b will be a large displacement as shown by the width W ', and a large stress will be applied to the soldered part and the through hole. . Therefore, by increasing the standoff L, the displacement of the lead 12b can be suppressed to a small value, and the force S for suppressing an increase in stress generated in the through hole can be suppressed.
[0023] [表 2] 部品 熱膨張係数 筐体 手方向の スタンドォ 温度サイクル試験による [Table 2] Parts Thermal expansion coefficient Enclosure Hand-stand Stando Temperature cycle test
(ppn/ :) ビン径(ran) フ L (咖) 断線サイクル数(eye) 部品 A 20 0.3 1.5 2 > 1000  (ppn / :) Bin diameter (ran) F L (咖) Number of disconnection cycles (eye) Part A 20 0.3 1.5 2> 1000
部品 B 83 0.3 1.5 > 1000  Part B 83 0.3 1.5> 1000
部品 C 82 1.14 9.0 > 1000  Part C 82 1.14 9.0> 1000
83 0.64 0.1 7 300 部品 Ε 82 1.25 1.0 2 14  83 0.64 0.1 7 300 Parts Ε 82 1.25 1.0 2 14
都 i¾F 82 1.14 0.3 6 1  Tokyo i¾F 82 1.14 0.3 6 1
[0024] 表 2は、筐体の熱膨張係数ひ y、筐体長手方向のピン径、スタンドオフ Lがそれぞれ 異なる電子部品を、 -40°C (30分)一 25。C (5分)一 125°C (30分)を 1サイクルとして 温度サイクル試験の行なった時の、断線に至るまでの断線サイクル数との関係を示 す表である。これより、部品 D、部品 E、部品 Fのように、筐体の熱膨張係数 ayが 80 ppm/°C以上、筐体長手方向のピン径が 0.5mm以上で、なお且つ、スタンドオフが:!. Omm以下の電子部品 4においては、はんだ付け部に非常に大きな応力が発生する ため、早期に断線しやすいことが分かる。これらの部品は、図 3に示すようなスルーホ ール剥離が特に発生しやすぐ信頼性に多大な影響を及ぼす。しかし、部品 Cのよう に、スタンドオフ Lが大きくなれば、筐体の熱膨張係数 ayが、 80ppm/°C以上で、筐 体長手方向のピン径が 0.5mm以上の電子部品でも、リードの変形量が小さくなるた め、はんだ付け部及び回路基板への応力集中を小さくすることができる。よって、部 品受けの基板表面から見た高さは、回路基板の基板材料と電子部品筐体の熱膨張 係数および電子部品のリードの径に基づいて決定されることが望ましい。 [0024] Table 2 shows electronic components having different thermal expansion coefficients y, pin diameters in the longitudinal direction of the housing, and standoffs L, respectively, at -40 ° C (30 minutes) and 25. This is a table showing the relationship between the number of disconnection cycles until disconnection when a temperature cycle test was performed with one cycle of C (5 minutes) and 125 ° C (30 minutes). Thus, like parts D, E, and F, the thermal expansion coefficient ay of the housing is 80 ppm / ° C or more, the pin diameter in the longitudinal direction of the housing is 0.5 mm or more, and the standoff is: !. With electronic components 4 of Omm or less, very large stress is generated in the soldered part, so it is clear that disconnection is easy at an early stage. These components are particularly prone to through-hole peeling as shown in Fig. 3 and have a significant impact on reliability immediately. However, if the standoff L is large as in the case of component C, even if the electronic component has a thermal expansion coefficient ay of 80 ppm / ° C or more and a pin diameter in the longitudinal direction of the housing of 0.5 mm or more, the lead of Since the amount of deformation is small, the concentration of stress on the soldered portion and the circuit board can be reduced. Therefore, it is desirable that the height of the component receiver viewed from the board surface be determined based on the board material of the circuit board, the coefficient of thermal expansion of the electronic component housing, and the diameter of the lead of the electronic component.
[0025] このように、回路基板一電子部品間に部品受けを設ける本発明によれば、回路基板 —電子部品間に一定以上のスタンドオフを確保することができるため、スルーホール 内部での応力を低減することができ、スルーホール剥離の発生を抑止して、回路基 板による実装構造の信頼性を向上させることができる。  [0025] As described above, according to the present invention in which the component receiver is provided between the circuit board and the electronic component, it is possible to secure a certain or more standoff between the circuit board and the electronic component. Therefore, the occurrence of peeling of through holes can be suppressed, and the reliability of the mounting structure using the circuit board can be improved.
[0026] ここで、スタンドオフ Lを大きくする手法は、部品筐体材質やピン径などの設計仕様 を変更する必要がない。  Here, in the method of increasing the standoff L, it is not necessary to change design specifications such as a component housing material and a pin diameter.
[0027] また、表面ランドの周縁部を絶縁性被膜にて被覆する構成によれば、はんだが表 面ランドの端部まで濡れ拡がるのを防止することができ、表面ランド端部へははんだ フィレットの応力が掛からなくなり、回路基板の熱膨張'収縮に追従しやすくなり周縁 部への応力集中を緩和してランド剥離を防止することができる。 According to the configuration in which the peripheral edge of the surface land is covered with the insulating film, it is possible to prevent the solder from spreading to the edge of the surface land and to spread the solder to the edge of the surface land. Fillet stress is no longer applied, and it is easy to follow the thermal expansion and contraction of the circuit board, so that the concentration of stress on the peripheral portion can be reduced and land separation can be prevented.
図面の簡単な説明  Brief Description of Drawings
[0028] [図 1]従来の実装構造を示す断面図である。  FIG. 1 is a cross-sectional view showing a conventional mounting structure.
[図 2]従来例の問題点を説明するための断面図である。  FIG. 2 is a cross-sectional view for explaining a problem of a conventional example.
[図 3]従来例の問題点を示す断面図である。  FIG. 3 is a cross-sectional view showing a problem of a conventional example.
[図 4]従来例の問題点を示す断面図である。  FIG. 4 is a cross-sectional view showing a problem of a conventional example.
[図 5]本発明の利点を説明するための、実装構造を示す断面図である。  FIG. 5 is a cross-sectional view showing a mounting structure for explaining advantages of the present invention.
[図 6A]本発明の第 1の実施の形態の回路基板を示す断面図である。  FIG. 6A is a sectional view showing a circuit board according to the first exemplary embodiment of the present invention.
[図 6B]本発明の第 1の実施の形態の実装構造を示す断面図である。  FIG. 6B is a sectional view showing a mounting structure according to the first embodiment of the present invention.
[図 7A]本発明の第 2の実施の形態の回路基板を示す断面図である。  FIG. 7A is a sectional view showing a circuit board according to a second exemplary embodiment of the present invention.
[図 7B]本発明の第 2の実施の形態の実装構造を示す断面図である。  FIG. 7B is a sectional view showing a mounting structure according to the second embodiment of the present invention.
[図 8A]本発明の実施例 1の実装構造を示す断面図である。  FIG. 8A is a cross-sectional view showing a mounting structure according to Example 1 of the present invention.
[図 8B]本発明の実施例 1の実装構造を示す平面図である。  FIG. 8B is a plan view showing a mounting structure according to Example 1 of the present invention.
[図 9A]本発明の実施例 2の実装構造を示す断面図である。  FIG. 9A is a cross-sectional view showing a mounting structure according to Example 2 of the present invention.
[図 9B]本発明の実施例 2の実装構造を示す平面図である。  FIG. 9B is a plan view showing a mounting structure according to Example 2 of the present invention.
[図 10A]本発明の実施例 3の実装構造を示す断面図である。  FIG. 10A is a cross-sectional view showing a mounting structure according to Example 3 of the present invention.
[図 10B]本発明の実施例 3の実装構造を示す平面図である。  FIG. 10B is a plan view showing a mounting structure of Embodiment 3 of the present invention.
[図 11A]本発明の実施例 4の実装構造を示す断面図である。  FIG. 11A is a sectional view showing a mounting structure according to Example 4 of the present invention.
[図 11B]本発明の実施例 4の実装構造を示す平面図である。  FIG. 11B is a plan view showing a mounting structure according to Example 4 of the present invention.
発明を実施するための最良の形態  BEST MODE FOR CARRYING OUT THE INVENTION
[0029] 本発明に係る回路基板およびそれを用いた実装構造の好ましい実施の形態につ いて、以下に図面を参照して詳述する。  A preferred embodiment of a circuit board according to the present invention and a mounting structure using the same will be described below in detail with reference to the drawings.
[0030] 図 6Aおよび図 6Bは、本発明の第 1の実施の形態を示す断面図である。図 6Aに示 されるように、回路基板 1は、ガラスエポキシなどからなる樹脂積層板 2を基板材料と してその内部に内層配線 3を、その外表面に外層配線 4を有している。回路基板のリ ード挿入個所には開口 5が開けられており、基板表'裏面の開口部周辺には表面ラ ンド 6と裏面ランド 7とが形成されている。表面ランド 6と裏面ランド 7とはスルーホール (プレーテッドスルーホール) 8により電気的に接続されている。図 6Aおよび図 6Bに は、 2層の内層配線 3を有する例が示されているがその層数については制限がなレ、。 また、内層配線を有しない両面回路基板であってもよい。基板表裏面のはんだ付け 個所以外の領域は、ソルダーレジスト 9により被覆されている。 FIGS. 6A and 6B are cross-sectional views showing the first embodiment of the present invention. As shown in FIG. 6A, the circuit board 1 has a resin laminate 2 made of glass epoxy or the like as a substrate material, and has an inner wiring 3 therein and an outer wiring 4 on its outer surface. An opening 5 is formed in the lead insertion portion of the circuit board, and a front land 6 and a back land 7 are formed around the opening on the front and rear surfaces of the substrate. Front land 6 and rear land 7 are through holes (Plated through holes) 8 electrically connected. FIGS. 6A and 6B show examples having two layers of inner layer wirings 3, but the number of layers is not limited. Further, a double-sided circuit board having no inner layer wiring may be used. Areas other than the soldering locations on the front and back surfaces of the substrate are covered with solder resist 9.
[0031] 基板表面の表面ランド 6の周縁部は、はんだの濡れ広がりを防止するためのはんだ ダム 10により覆われている。はんだダムは耐熱性樹脂をスクリーン印刷法など用いて 印刷することにより形成することができる。また、基板表面に部品実装位置や部品番 号、基板番号などを白色の表示用塗料を用いて印刷する際に、同一の塗料により形 成するようにしてもよレ、。これにより、はんだダム 10を形成するための工数増加を防止 すること力 Sできる。図示されてはいないが、裏面ランド 7上にもその周縁部を被覆する はんだダムを形成してもよい。これにより、信頼性を一層高めることができる。  The peripheral edge of the surface land 6 on the substrate surface is covered with a solder dam 10 for preventing the solder from spreading. The solder dam can be formed by printing a heat-resistant resin using a screen printing method or the like. Also, when the component mounting position, part number, board number, etc. are printed on the board surface using a white display paint, the same paint may be used. Accordingly, it is possible to prevent the man-hour for forming the solder dam 10 from increasing. Although not shown, a solder dam covering the peripheral edge may be formed on the back surface land 7. Thereby, the reliability can be further improved.
[0032] 基板表面上には、揷入型電子部品の取り付け高さを規制するための部品受け 11 が設けられる。部品受け 11の設置個所は、搭載される電子部品の直下であればよく その位置に特に制限はない。また、その設置個数も数個以上であればよくこれにも特 別な制限はない。この部品受け 11は、耐熱性樹脂を 1回ないし複数回印刷'塗布し て形成すること力 Sできる。また、表面実装型部品を仮固定するための熱硬化性接着 剤を印刷'塗布する際に、同一材料を用いて同時に部品受け 11を形成するようにし てもよレ、。これにより、部品受け 11を形成するための工数増加を防止することができ る。図 6Aおよび図 6Bには、部品受け 11をはんだダム 10とは異なる位置に設ける例 が示されているが、はんだダム 10上に部品受け 11を設けるようにしてもよレ、。これに より、必要な標高高さの部品受け 1 1を効率的に形成することができる。  [0032] On the surface of the substrate, there is provided a component receiver 11 for regulating the mounting height of the plug-in electronic component. The location of the component receiver 11 may be just below the electronic components to be mounted, and the location is not particularly limited. Also, the number of installations is not limited as long as it is several or more. The component receiver 11 can be formed by printing and applying a heat-resistant resin once or a plurality of times. Also, when printing and applying a thermosetting adhesive for temporarily fixing the surface mount type component, the component receiver 11 may be formed simultaneously using the same material. This can prevent an increase in man-hours for forming the component receiver 11. 6A and 6B show an example in which the component receiver 11 is provided at a position different from that of the solder dam 10, but the component receiver 11 may be provided on the solder dam 10. This makes it possible to efficiently form the component receiver 11 having a required altitude.
[0033] 部品受け 11は、樹脂組成物などを印刷的手法により印刷'塗布して形成する方法 に代え、樹脂、金属またはセラミックス製のスぺーサを接着して形成することもできる。 この場合に用いる接着剤は、表面実装型電子部品を仮固定するための接着剤を印 刷'塗布する際に、同一材料を用いて同時に塗布するようにしてもよい。また、部品受 け 11を少なくとも部分的にはんだ付け可能な材料により形成しておき、リフローはん だ付け工程において基板上にはんだ付けするようにしてもよい。この場合、部品受け 11を接着剤により仮固定した状態でリフローはんだ付けを行うことが望ましい。 [0034] 図 6Bは、図 6Aに示された本発明の第 1の実施の形態の回路基板へ電子部品を実 装した状態を示す断面図である。図示されてはいないが、図 6Bに示される電子部品 13を搭載する前に、表面実装型の電子部品の実装は完了しているものとする。回路 基板 1上に、回路基板のスルーホール 8にリード 12を揷入して電子部品 13を搭載す る。このとき、電子部品 13の底面が部品受け 11の頂面と接触することにより、一定以 上のスタンドオフを確保することができる。この状態で、基板裏面をウェーブはんだ槽 などに浸漬してフローはんだ付けを行う。これにより、電子部品 13のリード 12と、回路 基板 1のスルーホール 8、表面ランド 6および裏面ランド 7とは、はんだフィレット 14に より電気的 ·機械的に結合される。 The component receiver 11 can be formed by bonding a spacer made of resin, metal or ceramic instead of a method of printing and applying a resin composition or the like by a printing method. The adhesive used in this case may be simultaneously applied using the same material when printing and applying an adhesive for temporarily fixing the surface-mounted electronic component. Alternatively, the component receiver 11 may be formed of a material that can be soldered at least partially, and may be soldered on the board in a reflow soldering process. In this case, it is desirable to perform the reflow soldering with the component receiver 11 temporarily fixed with an adhesive. FIG. 6B is a cross-sectional view showing a state where electronic components are mounted on the circuit board according to the first embodiment of the present invention shown in FIG. 6A. Although not shown, it is assumed that before mounting the electronic component 13 shown in FIG. 6B, the mounting of the surface-mounted electronic component has been completed. The electronic component 13 is mounted on the circuit board 1 by inserting the lead 12 into the through hole 8 of the circuit board. At this time, since the bottom surface of the electronic component 13 contacts the top surface of the component receiver 11, a certain level of standoff can be secured. In this state, the back surface of the substrate is immersed in a wave solder bath or the like to perform flow soldering. Thus, the leads 12 of the electronic component 13 and the through holes 8, the front lands 6, and the rear lands 7 of the circuit board 1 are electrically and mechanically coupled by the solder fillets 14.
[0035] フローはんだ付け終了後、電子部品 13は、図 6Bに示すように、その底面が部品受 け 11に接触する状態で固定されることが多いが、部品受け 11から浮いて固定される ことちある。  After completion of the flow soldering, the electronic component 13 is often fixed with its bottom surface in contact with the component receiver 11 as shown in FIG. 6B, but is floated and fixed from the component receiver 11. There are things.
[0036] 図 7Aおよび図 7Bは、本発明の第 2の実施の形態の回路基板の断面図とその回路 基板への電子部品の実装状態を示す断面図である。図 7Aおよび図 7Bにおいて、 図 6Aおよび図 6Bに示す第 1の実施の形態の部分と同等の部分には同一の参照番 号を付し、重複する説明は省略する。本実施の形態の図 6Aおよび図 6Bに示される 第 1の実施の形態と相違する点は、はんだダムが形成されておらず、代わってソルダ 一レジスト 9が表面ランド 6と裏面ランド 7との周縁部にまで延在されている点と、部品 受け 11が球状体になされてレ、る点である。  FIGS. 7A and 7B are a cross-sectional view of a circuit board according to the second embodiment of the present invention and a cross-sectional view showing a state where electronic components are mounted on the circuit board. In FIGS. 7A and 7B, parts that are the same as the parts of the first embodiment shown in FIGS. 6A and 6B are given the same reference numerals, and overlapping descriptions are omitted. The difference from the first embodiment shown in FIGS. 6A and 6B of the present embodiment is that no solder dam is formed, and solder-resist 9 replaces front surface land 6 and rear surface land 7. The point extending to the peripheral edge and the point where the component receiver 11 is formed into a spherical body.
[0037] 部品受け 11は、樹脂、金属またはセラミックスにより形成されており、予め基板上に 塗布された接着剤により接着されている。あるいは、表面に接着剤が塗布された球状 体を基板上に配置するようにしてもよい。  [0037] The component receiver 11 is formed of resin, metal, or ceramics, and is bonded by an adhesive previously applied to a substrate. Alternatively, a spherical body having a surface coated with an adhesive may be arranged on the substrate.
実施例 1  Example 1
[0038] 図 8Aおよび図 8Bを参照して本発明の実施例 1について説明する。図 8Aは、本発 明の実施例 1の回路基板に電子部品が実装された構造を示す断面図であり、図 8B は、図 8Aを電子部品側の上面から見た場合の透視平面図である。図 8Aおよび図 8 Bにおいて、図 6Aおよび図 6B、図 7Aおよび図 7Bに示された実施の形態の部分と 同等の部分には同一の参照番号が付せられているので、重複する説明は適宜省略 する。図 9A—図 11Bに示される他の実施例の場合も同様である。 Example 1 of the present invention will be described with reference to FIGS. 8A and 8B. 8A is a cross-sectional view illustrating a structure in which electronic components are mounted on the circuit board according to the first embodiment of the present invention, and FIG. 8B is a perspective plan view when FIG. 8A is viewed from the upper side of the electronic components. is there. 8A and 8B, parts that are the same as the parts in the embodiment shown in FIGS. 6A and 6B, and FIGS. Omitted as appropriate To do. The same applies to the other embodiments shown in FIGS. 9A to 11B.
[0039] 実施例 1においては、はんだダム 10は、電子部品の配置、部品番号、基板番号な どのマーキング印字などに使われている表示用塗料を用いて形成されている。そし て、表示部を形成する工程において同時にはんだダムも形成されている。また、表示 用塗料は、はんだ付け時に掛カ 熱に対する耐熱性もこれまでの実績で実証済であ る。 In the first embodiment, the solder dam 10 is formed by using a display paint used for marking and printing of electronic components, component numbers, board numbers, and the like. Then, in the process of forming the display portion, a solder dam is also formed at the same time. In addition, display paints have demonstrated heat resistance to heat applied during soldering.
[0040] また、本実施例においては、部品受け 11は、表面実装型電子部品を仮固定するた めに用いられる熱硬化性接着剤を用いて、はんだダム 10に重ねて、形成されている 。そして、表面実装型部品を仮固定するための接着層形成工程において部品受け 1 1を形成しているため、工数の増加はない。  Further, in the present embodiment, the component receiver 11 is formed on the solder dam 10 by using a thermosetting adhesive used for temporarily fixing the surface mount type electronic component. . And since the component receiver 11 is formed in the adhesive layer forming step for temporarily fixing the surface mount type component, the number of steps is not increased.
実施例 2  Example 2
[0041] 図 9Aは、本発明の実施例 2の回路基板に電子部品が実装された構造を示す断面 図であり、図 9Bは、図 9Aを電子部品側の上面から見た場合の透視平面図である。  FIG. 9A is a cross-sectional view showing a structure in which an electronic component is mounted on a circuit board according to the second embodiment of the present invention. FIG. 9B is a perspective plan view when FIG. 9A is viewed from the upper surface on the electronic component side. FIG.
[0042] 本実施例においては、基板表面の外層配線 4を保護するために用いられているソ ルダーレジスト 9を、表面ランド 6の周縁部にまで延長して塗布している。また、部品受 け 11は、仮固定用接着剤である熱硬化性接着剤を用いて、表面ランド 6から離れた 位置に形成されている。  In the present embodiment, the solder resist 9 used to protect the outer layer wiring 4 on the substrate surface is applied so as to extend to the peripheral edge of the surface land 6. The component receiver 11 is formed at a position away from the surface land 6 by using a thermosetting adhesive that is a temporary fixing adhesive.
実施例 3  Example 3
[0043] 図 10Aは、本発明の実施例 3の回路基板に電子部品が実装された構造を示す断 面図であり、図 10Bは、図 10Aを電子部品側の上面から見た場合の透視平面図であ る。  FIG. 10A is a cross-sectional view showing a structure in which electronic components are mounted on a circuit board according to Embodiment 3 of the present invention. FIG. 10B is a perspective view when FIG. 10A is viewed from the upper surface on the electronic component side. It is a top view.
[0044] 本実施例においては、はんだダム 10は、表面実装型電子部品を仮固定するため の熱硬化性接着剤を用いて形成されている。そして、樹脂製のスぺーサである部品 受け 11が、はんだダム 10を構成する接着剤により基板上に接着されている。  In the present embodiment, the solder dam 10 is formed using a thermosetting adhesive for temporarily fixing the surface mount electronic component. Then, a component receiver 11 which is a spacer made of resin is adhered to the substrate by an adhesive constituting the solder dam 10.
実施例 4  Example 4
[0045] 図 11Aは、本発明の実施例 4の回路基板に電子部品が実装された構造を示す断 面図であり、図 11Bは、図 11Aを電子部品側の上面から見た場合の透視平面図であ る。 本実施例においては、はんだダムが形成されておらず、実施例 2と同様に、ソルダ 一レジスト 9が表面ランド 6の周縁部にまで延長されている。そして、部品受け 11は、 樹脂製の球体である樹脂球 1 laの表面を接着剤 1 lbが被覆した構成となってレ、る。 この部品受け 11は、予め熱硬化性の接着剤が塗布された樹脂球を基板上に配置し 熱処理を行って接着剤を硬化させることによって設けられたものである。 FIG. 11A is a cross-sectional view showing a structure in which electronic components are mounted on a circuit board according to Embodiment 4 of the present invention. FIG. 11B is a perspective view when FIG. 11A is viewed from the upper surface on the electronic component side. It is a top view. In this embodiment, no solder dam is formed, and the solder resist 9 is extended to the peripheral edge of the surface land 6 as in the second embodiment. The component receiver 11 has a configuration in which the surface of a resin ball 1 la, which is a resin sphere, is covered with 1 lb of an adhesive. The component receiver 11 is provided by arranging a resin ball on which a thermosetting adhesive is applied in advance on a substrate and performing heat treatment to cure the adhesive.

Claims

請求の範囲 The scope of the claims
[1] リード付き部品のリードが揷入されはんだ付けされる導電化スルーホールを有し、 前記リード付き部品の搭載面に表面ランドを、その反対側の面に前記導電化スルー ホールを介して前記表面ランドと電気的に接続された裏面ランドを有する回路基板に おいて、  [1] There is a conductive through hole into which the lead of the leaded component is inserted and soldered. A surface land is provided on the mounting surface of the leaded component, and the conductive land is provided on the opposite surface through the conductive through hole. In a circuit board having a back land electrically connected to the front land,
前記リード付き部品の搭載面には前記リード付き部品の取り付け高さを規制する部 品受けが複数個設けられていることを特徴とする回路基板。  A circuit board, wherein a plurality of component receivers for regulating a mounting height of the leaded component are provided on a mounting surface of the leaded component.
[2] 前記リード付き部品の搭載面には前記表面ランドの周縁部を被覆するランド被膜が 形成されていることを特徴とする請求項 1に記載の回路基板。  2. The circuit board according to claim 1, wherein a land coating covering a peripheral portion of the surface land is formed on a mounting surface of the component with leads.
[3] 前記ランド被膜は前記表面ランドの周縁部の全周を被覆していることを特徴とする 請求項 2に記載の回路基板。 3. The circuit board according to claim 2, wherein the land coating covers the entire periphery of the peripheral edge of the surface land.
[4] 前記部品受けが前記ランド被膜上に形成されていることを特徴とする請求項 2また は 3に記載の回路基板。 4. The circuit board according to claim 2, wherein the component receiver is formed on the land coating.
[5] 前記部品受けが熱硬化性接着材により形成されていることを特徴とする請求項 2か ら 4のいずれか 1項に記載の回路基板。 [5] The circuit board according to any one of claims 2 to 4, wherein the component receiver is formed of a thermosetting adhesive.
[6] 前記部品受けが、樹脂、金属またはセラミックスにより形成されたスぺーサを接着す ることにより形成されていることを特徴とする請求項 2から 5のいずれ力 4項に記載の 回路基板。 6. The circuit board according to claim 4, wherein the component receiver is formed by bonding a spacer formed of resin, metal, or ceramic. .
[7] 当該回路基板の表裏面にはソルダーレジストが形成されて形成されており、前記ラ ンド被膜はソルダーレジストの延長部としてソルダーレジスト材により形成されているこ とを特徴とする請求項 2から 6のいずれ力 4項に記載の回路基板。  [7] The solder resist is formed on the front and back surfaces of the circuit board, and the land film is formed of a solder resist material as an extension of the solder resist. The circuit board according to item 4;
[8] 前記ランド被膜は耐熱性樹脂により形成されていることを特徴とする請求項 2から 7 のいずれか 1項に記載の回路基板。  [8] The circuit board according to any one of claims 2 to 7, wherein the land coating is formed of a heat-resistant resin.
[9] 前記ランド被膜は、当該回路基板の表面および裏面に形成された表示部と同一材 料により形成されていることを特徴とする請求項 2から 8のいずれ力 1項に記載の回路 基板。  [9] The circuit board according to any one of claims 2 to 8, wherein the land coating is formed of the same material as a display portion formed on the front and back surfaces of the circuit board. .
[10] リード付き部品の搭載面の反対側の面には前記裏面ランドの周縁部を被覆する裏 面ランド被膜が形成されていることを特徴とする請求項 1から 6のいずれ力 1項に記載 の回路基板。 [10] The force according to any one of [1] to [6], wherein a back surface land coating is formed on a surface opposite to a mounting surface of the leaded component to cover a periphery of the back surface land. Description Circuit board.
[11] 当該回路基板の表裏面にはソルダーレジストが形成されて形成されており、前記裏 面ランド被膜はソルダーレジストの延長部としてソルダーレジスト材により形成されて いることを特徴とする請求項 10に記載の回路基板。  11. The circuit board according to claim 10, wherein a solder resist is formed on the front and back surfaces of the circuit board, and the land coating on the back surface is formed of a solder resist material as an extension of the solder resist. The circuit board according to claim 1.
[12] 前記裏面ランド被膜は耐熱性樹脂により形成されていることを特徴とする請求項 10 または 11に記載の回路基板。 12. The circuit board according to claim 10, wherein the back surface land coating is formed of a heat-resistant resin.
[13] 前記裏面ランド被膜は、当該回路基板の表面および裏面に形成された表示部と同 一材料により形成されていることを特徴とする請求項 10から 12のいずれ力、 1項に記 載の回路基板。 13. The force according to claim 10, wherein the back surface land film is formed of the same material as a display portion formed on the front surface and the back surface of the circuit board. Circuit board.
[14] リード付き部品の搭載面に表面ランドを、その反対側の面に導電化スルーホールを 介して前記表面ランドと電気的に接続された裏面ランドを有する回路基板の前記リー ド付き部品の搭載面にリード付き部品が、そのリードが前記導電化スルーホールに揷 入されはんだ付けされている態様にて実装されている回路基板の実装構造において 前記リード付き部品下の回路基板上には前記リード付き部品の取り付け高さを規制 する部品受けが複数個設けられていることを特徴とする回路基板の実装構造。  [14] The component with a lead of the circuit board having a surface land on the mounting surface of the component with the lead and a rear surface land electrically connected to the surface land via a conductive through hole on the opposite surface. In a circuit board mounting structure in which a component with a lead is mounted on a mounting surface and the lead is inserted into the conductive through hole and soldered, the circuit board below the component with the lead is A circuit board mounting structure comprising a plurality of component receivers for regulating a mounting height of a component with a lead.
[15] 少なくとも一つの前記部品受けの頂部に前記リード付き部品の筐体の底面が接触 していることを特徴とする請求項 14に記載の回路基板の実装構造。 15. The circuit board mounting structure according to claim 14, wherein a bottom surface of the housing of the component with leads is in contact with a top of at least one of the component receivers.
[16] 前記リード付き部品の筐体の材料の熱膨張係数が、回路基板の基板材料の熱膨 張係数より大きいことを特徴とする請求項 14または 15に記載の回路基板の実装構 造。 16. The circuit board mounting structure according to claim 14, wherein a thermal expansion coefficient of a material of a housing of the component with a lead is larger than a thermal expansion coefficient of a substrate material of the circuit board.
[17] 前記リード付き部品のリードが無鉛はんだによりはんだ付けされていることを特徴と する請求項 14から 16のいずれか 1項に記載の回路基板の実装構造。  17. The circuit board mounting structure according to claim 14, wherein the leads of the component with leads are soldered with lead-free solder.
[18] 前記部品受けの基板表面から見た高さは、回路基板の基板材料と前記リード付き 部品の熱膨張係数および前記リード付き部品のリードの径に基づいて決定されてい ることを特徴とする請求項 14から 17のいずれ力 4項に記載の回路基板の実装構造。  [18] The height of the component receiver as viewed from the substrate surface is determined based on the substrate material of the circuit board, the coefficient of thermal expansion of the component with the lead, and the diameter of the lead of the component with the lead. 18. The mounting structure for a circuit board according to claim 4, wherein the circuit board has a force of any one of claims 14 to 17.
[19] リード付き部品の搭載面に表面ランドを、その反対側の面に導電化スルーホールを 介して前記表面ランドと電気的に接続された裏面ランドを有する回路基板の前記リー ド付き部品の搭載面に前記リード付き部品の取り付け高さを規制する部品受けを複 数個設ける第 1の工程と、 [19] The lead of the circuit board having a surface land on the mounting surface of the component with leads and a back land electrically connected to the surface land via a conductive through hole on the opposite surface. A first step of providing a plurality of component receivers for regulating the mounting height of the leaded component on the mounting surface of the component with a lead,
前記リード付き部品を、そのリードを前記導電化スルーホールに挿入しはんだ付け することにより実装する第 2の工程と、  A second step of mounting the leaded component by inserting the lead into the conductive through hole and soldering the component;
を有することを特徴とする回路基板の実装方法。  A method for mounting a circuit board, comprising:
[20] 前記第 1の工程は、耐熱性接着材を塗布することにより部品受けを形成する工程で あることを特徴とする請求項 19に記載の回路基板の実装方法。 20. The circuit board mounting method according to claim 19, wherein the first step is a step of forming a component receiver by applying a heat-resistant adhesive.
[21] 前記第 1の工程は、耐熱性接着材を塗布する工程と該耐熱性接着材を用いてスぺ ーサを回路基板に接着する工程とにより部品受けを形成する工程であることを特徴と する請求項 19に記載の回路基板の実装方法。 [21] The first step is a step of forming a component receiver by a step of applying a heat-resistant adhesive and a step of bonding a spacer to a circuit board using the heat-resistant adhesive. 20. The method for mounting a circuit board according to claim 19, wherein the method is characterized in that:
[22] 前記第 1の工程の耐熱性接着材を塗布する工程においては、同時に表面実装型 部品を仮固定するための耐熱性接着材を表面実装型部品の実装部に塗布し、前記 第 2の工程に先だってリフローにより表面実装型部品を実装する工程が付加されるこ とを特徴とする請求項 20または 21に記載の回路基板の実装方法。 [22] In the step of applying the heat-resistant adhesive in the first step, a heat-resistant adhesive for temporarily fixing the surface-mounted component is simultaneously applied to the mounting portion of the surface-mounted component, and the second step is performed. 22. The circuit board mounting method according to claim 20, wherein a step of mounting the surface mount component by reflow is added prior to the step.
[23] 前記第 1の工程に先だって、前記表面ランドの周縁部を被覆するランド被膜を形成 する工程が付加され、前記部品受けはランド被膜上に設けられることを特徴とする請 求項 19から 22のいずれか 1項に記載の回路基板の実装方法。 23. The method according to claim 19, wherein a step of forming a land coating covering the peripheral portion of the surface land is added prior to the first step, and the component receiver is provided on the land coating. 23. The method of mounting a circuit board according to any one of 22.
[24] 前記ランド被膜を形成する工程においては、同時に表示部を前記ランド被膜を形 成する材料を用いて形成することを特徴とする請求項 23に記載の回路基板の実装 方法。 24. The circuit board mounting method according to claim 23, wherein, in the step of forming the land film, a display portion is formed simultaneously using a material forming the land film.
PCT/JP2005/000887 2004-01-26 2005-01-25 Circuit board, mounting structure of circuit board, and mounting method for circuit board WO2005072032A1 (en)

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WO2020133238A1 (en) * 2018-12-28 2020-07-02 华为技术有限公司 Printed circuit board and manufacturing method therefor, and electronic device
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JP7571087B2 (en) 2022-07-05 2024-10-22 株式会社平和 Gaming Machines

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JP2017028215A (en) * 2015-07-28 2017-02-02 住友電装株式会社 Connector mounting substrate
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