WO1998030072A1 - Ceramic composite wiring structures for semiconductor devices and method of manufacture - Google Patents
Ceramic composite wiring structures for semiconductor devices and method of manufacture Download PDFInfo
- Publication number
- WO1998030072A1 WO1998030072A1 PCT/US1997/023976 US9723976W WO9830072A1 WO 1998030072 A1 WO1998030072 A1 WO 1998030072A1 US 9723976 W US9723976 W US 9723976W WO 9830072 A1 WO9830072 A1 WO 9830072A1
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- Prior art keywords
- electrical
- composite structure
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- thermal
- ceramic
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/4857—Multilayer substrates
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/367—Cooling facilitated by shape of device
- H01L23/3677—Wire-like or pin-like cooling fins or heat sinks
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
- H01L23/3735—Laminates or multilayers, e.g. direct bond copper ceramic substrates
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49833—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers the chip support structure consisting of a plurality of insulating substrates
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/64—Impedance arrangements
- H01L23/642—Capacitive arrangements
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68377—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support with parts of the auxiliary support remaining in the finished device
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45147—Copper (Cu) as principal constituent
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
- H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
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- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
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- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01015—Phosphorus [P]
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- H01L2924/01078—Platinum [Pt]
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- H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
- H01L2924/097—Glass-ceramics, e.g. devitrified glass
- H01L2924/09701—Low temperature co-fired ceramic [LTCC]
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- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12042—LASER
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- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19041—Component type being a capacitor
Definitions
- the present invention relates generally to circuit wiring boards and, more particularly, to ceramic composite circuit wiring boards and/or multichip modules and methods to construct the same.
- SIC Semiconductor integrated circuits
- semiconductor chips are being developed to operate at increasingly higher speeds and to handle larger volumes of data. This trend has caused the density of electrical interconnections required between the semiconductor chip and the larger electronic system to increase dramatically. Conversely, this ultra-large scale integration restricts the physical dimensions of the SIC.
- the drive to implement more sophisticated SIC ' s which require much larger numbers of electrical interconnections to be crammed into smaller physical dimensions creates a technical bottleneck, wherein SIC performance is increasingly limited by the circuit board/package connecting the chip to the larger electronic system.
- the industry convention has been to use a lead frame that electrically interconnects the SIC to a printed circuit board ("PCB"), and to envelop the chip and lead frame in a ceramic laminate package.
- the packaged SIC is socketed to the PCB, which electrically connects the SIC to the larger electronic system.
- the modern, more sophisticated SIC ' s generate greater amounts of heat than their predecessors. This heat, if not dissipated from the SIC, reduces circuit performance.
- Robust lead frames have been able to function as both electrical connection and heat sink, however, as the density of leads per unit area has increased, the physical dimension of the individual lead must be shrunk. Smaller lead sizes sharply limit their function as a heat sink.
- the prior art discloses methods to construct multilayer ceramic composite printed circuit boards with electrical interconnection networks embedded within the circuit boards.
- these methods are performance-limited because the embedded electrode network is composed of metallic films, conducting pastes, or both, which have much higher electrical resistance than the wire form of the same conducting metal.
- Lower-resistance at higher signal frequency is also enhanced by forming the wiring board from low dielectric constant materials. Therefore, circuit wiring board and multichip module designs that comprise electrode networks of conducting metal wire embedded within a low dielectric ceramic, such as silica or alumina, and simultaneously contain heat sinks, embedded within the ceramic to dissipate heat generated by the SIC would be highly desirable.
- Relevant prior art includes the following patents. Fujita et al . , U.S. Patent No.
- 5,375,039 discloses the construction of a printed circuit board with internal heat dissipation means channeling heat from power units mounted on the board to heat sinks, wherein the core of the printed circuit board comprises glass cloth.
- Chobot et al. U.S. Patent No. 5,363,280, discloses methods to construct a multilayer ceramic circuit board in which some metal film layers function as electrode networks, and are separated from other metal film layers which function as heat sinks.
- Ohtaki et al . U.S. Patent No., 5,300,163, discloses a process to fabricate a multilayer ceramic circuit board comprising a ceramic substrate, multiple layers of green tape with conductive paste patterns therein, and via holes with conductive paste to electrically interconnect the assembled layers.
- 4,679,321 discloses a method of making interconnection boards with coaxial wire interconnects on the external major surface of the board substrate that opposes the major surface upon which integrated circuits are mounted.
- Ushifusa et al . U.S. Patent No. 4,598,167, discloses the construction of multilayered ceramic circuit board that comprises a plurality of integrally bonded ceramic layers, each having a patterned electrically conducting paste layer and through holes filled with electrical conductors for connecting the patterned electrically conducting layers on respective ceramic layers to form a predetermined wiring circuit.
- 4,551,357 discloses a manufacturing process for ceramic circuit boards that comprises firing a circuit pattern formed from an organic-laden conductive paste on the surface of a green-state ceramic with an organic binder. It is therefore an object of the present invention to provide a composite wiring structure which enhances SIC performance .
- the preferred embodiments include a composite circuit wiring structure having one or more electrodes on one major surface of a dielectric member, and wherein a semiconductor integrated circuit ("SIC") is placed in direct electrical contact with the electrodes which are electrically contacted, through an electrical interconnection network within the dielectric ceramic member, to an external input/output signal driver .
- SIC semiconductor integrated circuit
- the preferred embodiments provide a composite circuit wiring structure wherein the dielectric member also contains an embedded thermal distribution network. Even further the preferred embodiments provide a composite circuit wiring structure having one or more electrodes on one major surface of a dielectric member, and wherein at least one SIC is placed on a mounting area and electrically contacted to at least one electrode through a conducting wire means. Still further the preferred embodiments reduce thermally generated compressive or shear stresses between the circuit wiring board's dielectric member and the embedded electrical interconnection network or the embedded thermal distribution network through the use of networks with curved joints.
- this invention reduces thermally generated compressive or shear stresses between the circuit wiring board's dielectric member and the embedded electrical interconnection network or the embedded thermal distribution network through the application of organic resins with high thermal decomposition temperatures to the networks prior to embedding the networks in the ceramic member.
- the present invention permits the inclusion of blocking capacitors with the dielectric member of the composite wiring structure. Even further still the present invention provides the above-mentioned embodiments to be constructed with a ceramic or an organo-ceramic material as the dielectric member of the composite wiring structure.
- a preferred embodiment of this invention relates to a dielectric (ceramic or organo-ceramic) composite circuit wiring board having one or more electrodes on one major surface of a ceramic member and wherein a semiconductor integrated circuit ("SIC") is placed in direct electrical contact with the electrodes.
- the SIC is electrically contacted, through an electrical interconnection network, made up of a conductive wire, preferably of copper wire, to other SICs electrically contacted to other electrodes on the circuit wiring board's major surface, and/or to an external input/output signal driver that is electrically contacted to the ceramic circuit wiring board.
- the dielectric member also contains an embedded thermal distribution network of heat sinks, formed from elongated thermally conducting material such as metal, or hollow tubes in which a heat absorbing fluid is circulated.
- the embedded thermal distribution network is located in the vicinity of, but not in direct contact with, the electrodes making direct electrical contact with the SIC, and the terminal points of the embedded heat sinks protrude through a minor surface of the ceramic member to make thermal contact with a further heat sink or thermal reservoir that is external to the circuit wiring board.
- the dielectric member comprises aluminate or silicate ceramic phases.
- Silica ceramic phases are particularly preferred to reduce the level of signal attenuation through dielectric loss mechanisms at higher signal frequencies.
- Another metal member is bonded to the major surface of the circuit wiring board's ceramic member that opposes the major surface on which the SIC is contacted to the electrodes.
- the invention also encompasses methods to construct the circuit wiring board structure through low- temperature processing methods.
- solution precursors allows ceramic to be formed around the network assemblies by filling the area bordered by the mold materials, mounting supports, and the base metal member with liquid precursor and driving the chemical reaction that transforms the liquid precursor into the corresponding solid state ceramic.
- the invention preferably incorporates therein the use of metalorganic precursors , whereby metal precursors to the ceramic oxide are first reacted with a carboxylic acid, such as 2-ethylhexanoic acid, to form a solution of carboxylic acid salts in organic acid solution.
- a carboxylic acid such as 2-ethylhexanoic acid
- sol-gel techniques could also work as effectively and is considered to be within the spirit and scope of the invention.
- the area filled with liquid precursor is filled with ceramic after the transforming chemical reaction is completed.
- the transforming chemical reaction bonds the ceramic to the network assemblies, the metal member, and the walls of the bordering mold materials and/or mounting supports.
- the liquid properties of the solution allow precursor materials to uniformly envelop the network assemblies.
- metalorganic precursors When metalorganic precursors are used, pyrolytic action decomposes the carboxylic acid salts into their corresponding metal oxides. Unstable metal oxide radicals are formed as a result of pyrolysis, which rapidly bond to stable organic and inorganic surfaces that are part of the network assemblies, the base metal member, and the mold materials and/or mounting supports.
- the unstable metal oxide radicals also bond with other decomposing metal oxide radicals to form a contiguous ceramic network.
- the volume fraction of solid state ceramic is less than the volume solution precursor as the decomposition (or unwanted reaction) products are removed.
- a high solid content precursor solution which is often quite viscous; or to pyrolyze the precursor in situ as it is applied, as is the case when the precursors are spray pyrolyzed onto an already heated assembly.
- the action of spray pyrolysis allows undesirable reaction by-products, such as the precursor solvent and decomposition products to be physically removed at a much faster rate than the ceramic precursors are applied and simultaneously formed into ceramic.
- spray pyrolysis allows a higher volume fraction of solid state ceramic to occupy the region into which it is being applied.
- the present invention also permits the formation of an organo-ceramic dielectric, if such a dielectric member is desired, through the incomplete decomposition of the dissolved metalorganic ceramic precursors.
- the present invention forms metalorganic precursors by directly or indirectly reacting the metal precursor (s) with a carboxylic acid solvent to produce a solution of carboxylic acid salt(s) dissolved within the carboxylic acid.
- 2-Ethylhexanoic acid is a preferred solvent and has a flash point of 210 degrees C.
- 2 -Ethylhexanoate precursor salts will typically begin to decompose over temperatures in the range of 225-375 degrees C, depending upon the chemistry of salt's metal. Thermal decomposition is usually complete at temperatures above 400-475 degrees C.
- a composite organo-ceramic dielectric can be formed by spray- pyrolyzing the solution on to the circuit wiring board assembly heated to temperatures above the initial decomposition temperature (s) of the dissolved carboxylic acid salt(s), (225-375 degrees C) , yet below the temperatures at which the salt(s) 's organic ligands thoroughly decompose, (400-475 degrees C) .
- the carboxylic acid evaporates, depositing waxy carboxylic acid salts that decompose in si tu .
- the resultant dielectric material is a matrix of fully deflagrated oxide ceramic with incompletely decomposed organic material, thereby producing an organo-ceramic dielectric member.
- a dielectric for example, the dielectric being either a "pure" ceramic or organo-ceramic
- a dielectric for example, the dielectric being either a "pure" ceramic or organo-ceramic
- circuit wiring board that comprises a metal member including one or more electrodes, and one or more mounting areas, all on one major surface of a ceramic member.
- At least one SIC is placed on the mounting area and electrically contacted to at least one electrode through a conducting wire means .
- the SIC is in f rther electrical contact, through an electrical interconnection network to other SIC ' s in electrical contact with other electrodes on the dielectric circuit wiring board's major surface, or to an external input/output signal driver that is electrically contacted to the dielectric circuit wiring board either through yet another electrode on the circuit wiring board's major surface, or through a segment of conductive wire, preferably copper wire, connected to the electrical interconnection network, that protrudes through a minor surface of the circuit wiring board's dielectric member.
- the dielectric member also contains an embedded thermal distribution network which includes heat sinks formed from elongated thermally conducting material such as metal, or hollow tubes in which a heat absorbing fluid is circulated.
- the thermal distribution network may or may not be in thermal contact with the SIC through the mounting area, and the terminal points of the embedded heat sinks protrude through a minor surface of the dielectric member to make thermal contact with a thermal reservoir that is external to the circuit wiring board.
- the dielectric member may be composed of aluminate or silicate ceramic phases. Another metal member is bonded to the major surface of the circuit wiring board's dielectric member that opposes the major surface on which the SIC is contacted to the mounting area and the electrodes.
- the first deploys curves in the design of the embedded network structures to high stress points that result from sharp edged structures.
- the network structures are designed with curved, rather than sharp-cornered L-joints and T-joints the stress is more evenly distributed over the radial arcs, as opposed to building up intense compressive forces at the sharp critical points in the network.
- compressive stress is also reduced in the network by coating the (copper) metal wire forming the electrical interconnection network and the heat pipes forming the thermal dissipation network with an organic resin.
- FIG. 1A shows a top view of a preferred embodiment of the dielectric composite wiring structure of this invention
- FIG. IB shows a front view, partially in cross section, of the preferred embodiment of the invention shown in FIG. 1A;
- FIG. 2A shows a top view of another preferred embodiment of the dielectric composite wiring structure of this invention;
- FIG. 2B shows a front view, partially in cross section, of the preferred embodiment of the invention shown in FIG. 2A;
- FIGS. 3A (exploded fashion), 3B and 3C show the details of the assembly methods used to construct the dielectric composite wiring structure of this invention;
- FIGS. 3D (exploded fashion), 3e and 3F show further details of the assembly methods used to construct the dielectric composite wiring structure of this invention.
- FIG. 4A shows a top view of a further embodiment of the dielectric composite wiring structure of this invention
- FIG. 4B shows a cross sectional side view of the embodiment of the invention taken along line IV-IV of Fig. 4A with thermal distribution network omitted for clarity;
- FIGS. 5A and 5B show, in pictorial fashion, portions of curved network members, embedded within the dielectric, utilized with the dielectric composite wiring structure of this invention.
- FIGS. 1A, IB, 2A and 2B illustrate the preferred embodiments of the composite structure 10 and 10' of this invention, also referred to as a composite wiring structure
- FIGS. 3A-3F illustrate the sequential steps used to create the composite structure with an electrical network, interconnects and heat sinks internal to the composite's dielectric member.
- like reference numerals will be used throughout the following description to identify identical elements illustrated in all embodiments.
- the composite circuit wiring structure 10 although not limited thereto, is primarily used as a circuit wiring board, or, alternatively, as a multichip module.
- the composite structure 10 has a top conductive, preferably metal member 12 with an exterior major surface 14 upon which at least one SIC 16 eventually will be mounted. Any suitable series of conductive members 18 form an electrical contact between the top metal member 12 and the integrated circuits of the SIC 16. With the preferred embodiment of the invention shown in FIGS. 1A and IB, the top metal member 12 functions as an electrode contact.
- the composite structure 10 of this invention further includes a ceramic or an organo-ceramic dielectric member 20 bonded preferably by a covalent bond to the interior major surface 22 of the top metal member electrode 12, and an electrical interconnection network 24.
- the electrical interconnection network 24 is made up of at least one conductive wire, preferably metal such as copper, embedded within the ceramic or organo-ceramic member 20 (also referred as dielectric member 20) .
- the copper wire is bonded at one end to the interior major surface 22 of the top metal member electrode 12 in at least one location, that is, where the top metal member makes electrical contact to the SIC 16.
- the at least one wire forming the electrical interconnection network 24 may optionally also have a wire termination 24A that protrudes through an exterior minor surface of the dielectric member 20 to form an electrical contact, through the electrical interconnection network 24, between a top metal member electrode 12 and at least one input/output signal driver 25 that is external to the circuit wiring board.
- a further embodiment of the present invention illustrative of the use of a mounting support utilized with the interconnection network 24 is described in detail with respect to Figures 4A and 4B. Electrical contact between the SIC 16 and an external signal input/output driver may alternatively be made between two top metal member electrodes that are linked through the metal, preferably copper, wire of electrical interconnection network 24.
- the composite wiring structure 10 of this invention further includes a thermal distribution network 26 embedded within the dielectric member 20 and electrically insulated or isolated from the electrical interconnection network 24 .
- the thermal distribution network 26 includes at least one heat sink that is located in the vicinity of, but is not in contact with, the interior major surface 22 of the top metal member 12 at a location where the top metal member 12 makes electrical contact with the SIC.
- the heat sinks 28 forming the thermal distribution network 26 may be composed of elongated thermally conducting material, for instance, a high thermal conductivity metal such as copper, or the heat sinks may be alternatively composed of hollow tubes through which a thermally absorbing fluid is circulated.
- the heat sinks 28 forming the thermal distribution network 26 protrude through at least one exterior minor surface of the ceramic or organo-ceramic dielectric member 20 and are placed in thermal contact with a thermal reservoir (s) 30.
- the thermal reservoir 30 may be simultaneously used as or connected to a mechanical fixture that secures the circuit wiring board to an electrical ground, or both.
- Both preferred embodiments of composite wiring structure 10 and 10' of this invention also comprise a bottom metal member 32 bonded to the opposing major surface of the dielectric member 20.
- the dielectric member 20 may be composed of an aluminate (Al 2 0 3 ) or silicate (Si0 2 ) based ceramic or organo-ceramic composite.
- the composite wiring structure 10 of the invention may be configured to electrically connect a single SIC to one or multiple external signal input/output drivers, or configured to interconnect multiple SICs mounted on the top metal member to each other as well as to one or multiple external input/output signal drivers. Another preferred embodiment of the invention is shown in FIGS.
- the composite wiring structure 10' has the top metal member 12 segmented into electrode areas 34 and at least one mounting area 36.
- the electrical interconnection network 24 is embedded within the dielectric member 20 and connects, through at least one conductive wire, preferably metal such as copper, the electrode areas 34 of the top metal member 12 to an external signal input/output driver.
- the SIC 16 bonded to a mounting area 36 of the top metal member 12, is electrically connected to at least one electrode area 34 by means of a wire conductor 38.
- the electrical interconnection network 24 may electrically connect the SIC 16 to the external signal input/output driver through at least one metal wire that protrudes through a minor surface of the dielectric member 20, or through another free electrode area 34 that is part of the top metal member 12.
- At least one heat sink 28 of the thermal distribution network 26 may, optionally, directly connect a mounting area 36 of the top metal member 12 to a thermal reservoir 30 (as shown at 40) external to the circuit wiring board through a heat sink protruding through a minor surface of the dielectric member 20.
- a bottom metal member 32 is bonded to the exterior major surface of the dielectric member 20 that opposes the major surface that is bonded to the top metal member 12.
- FIGS. 3A-F for a detailed explanation of the methods to reduce the above referenced ceramic composite wiring structures 10 and 10' to practice.
- the top metal member 12 preferably a copper sheet 0.5 mm to 3 mm in thickness, is used initially as a substrate upon which the electrical interconnection network 24, thermal distribution network 26 and dielectric member 20 will be formed.
- Opposing areas are designated on both the exterior major surface 14 and the interior major surface 22 as electrode areas 34, and, if designs as depicted in the embodiment of FIGS. 2A and 2A are produced, as mounting areas 36.
- the remaining area(s) 42 that are not part of the designated areas 44 on the top metal member 12, may be selectively scribed, etched, or pressed to have lesser thickness than the designated areas on the major surface of the top metal member 12 that will become the exterior major surface 14 prior to using the copper sheet or metal member 12 as a substrate. It is preferred practice, during construction, to orient the exterior major surface 14 face down (that is, FIGS. 3A-F would actually be viewed upside down) and to place mounting supports 46 which may be removed over the interior major surface in those regions of the remaining area(s) 42 that will not functionally serve as a part of the circuit wiring board.
- the mounting supports 46 may be made of a solid material that has bore holes of appropriate diameter to secure terminal points of those segments of heat sink 28 used to form the thermal distribution network 26 or even, in some cases, the wires of the electrical network 24.
- a mounting support 54 as shown in Figs, 4A and 4B, optionally removable, may be utilized in conjunction with the metal wire used to form the electrical interconnection network 24 that protrude from the minor surface (s) of the dielectric member 20. The actual details of the mounting support 54 is described in detail with respect to Figures 4A and 4B.
- the removable mounting supports 46 may be a form of plastic material that solidifies or gels into a solid or semi-solid mold after the segments of heat sink 28 and/or metal wire (preferably made of copper or other theramlly conductive material) are embedded in it, or it may take the form of a combination of solid material and plastic material.
- plastic, glass, ceramic, or metallic materials may usefully serve as the removable mounting supports 46, provided the selected materials do not form a permanent bond with the copper substrate, retain their solid or semi-solid molded form at process temperatures ranging between 225-475 degrees C, and can be easily removed, preferably by soluble means that does not erode the dielectric member 20, metal members 12 and 32, and the network members 24 and 26.
- Suitable removable mold materials include a plastic composite comprising polyvinyl formal, or polyvinyl butyral, loaded with hollow silica and a high temperature organic adhesive.
- Suitable high temperature adhesives include, but may not be limited to, aromatic heterocyclic polymers, such as benzimidazole polymers, or ethynyl- terminated polyimides with small additions of hydroquinone to retard thermal reactions of the ethynyl groups, or arylene- ethers, commercially available as Polymer 360 or Astrel 360.
- the removable mold materials are typically formed at temperatures ranging between 350 degrees C and 470 degrees C under pressures of 50 psi to 2000 psi, and should be made to withstand the ceramic processing temperatures (225 degrees C to 475 degrees C) , be resistant to the etchants used to remove the remaining areas 42 of the metal members 12 and 32, and yet be sensitive to dispersal in a solvent that is inert to the dielectric member 20, metal members 12 and 32, and the materials that comprise the electrical interconnection network 24 and the thermal dissipation network 26.
- the electrical interconnection network 24 and thermal dissipation network 26 are electrically insulated or isolated from one another in the finished body. Therefore, all portions of the electrical interconnection network 24 must not physically contact any portion of the thermal dissipation network 26, and vice-versus, prior to and after the application of the dielectric member 20. It is also imperative that an intertwining electrical interconnection network 24 and thermal dissipation network 26 are physically organized such that the distances separating the two are sufficient to ensure electrical isolation over anticipated voltages after the dielectric member 20 is inserted between them. Ideally, the thermal dissipation network 26 should be connected to an electrical ground.
- the mounting supports 46 also comprise, in part, removable material 48 that will not form part of the final circuit board, and the thermal heat reservoirs 30 to which the thermal distribution network 26 will be connected via the heat sinks 28 embedded in the dielectric member 20 that protrude through a minor surface of the dielectric member 20.
- the heat sink/mounting supports can only be positioned in the remaining areas 42 that are adjacent to the minor surfaces of the dielectric member 20 through which only heat sinks 28 connected to the thermal distribution network will protrude.
- Those segments 50 of the copper wire used to form the electrical interconnection network 24 and those segments of heat sinks 28 used to form the thermal distribution network 26 that will protrude from the dielectric member 20 once the circuit wiring board is completed are embedded into the mounting supports 46.
- a thermal reservoir 30 is incorporated as part of the mounting support 46, those segments of heat sinks that will protrude from the minor surface (s) of the dielectric member 20 are attached through the material 48 of the mounting support to the thermal reservoir 30.
- the mounting supports 46 with embedded segments of copper wire and heat sinks are then positioned on those regions of remaining areas 42 on the interior surface 22 of the top metal member 12 that will not functionally serve as part of the composite wiring board as shown in FIG. 3B.
- terminal points of the metal wire that form the electrical interconnection network 24 are then bonded to the interior surface 22 of the metal sheet at those substrate areas designated as electrode areas 34 as described with reference to FIG. 2A.
- Bonding the metal wire to the metal sheet can be achieved using a variety of brazing materials well-known to practitioners skilled in the art, electro-welding, arc-welding, or ultrasonic bonding. It is recommended to select a bonding technique that is appropriate to the electrical properties expected from the finished circuit wiring board.
- a preferred method of the invention is to use a bonding technique such as arc-welding to form a metal bond between the electrical interconnection network 24 and the designated electrode areas 34 of the copper metal sheet, although other conventional techniques may also be utilized.
- the electrical interconnection network 24 is formed by bending a bonded metal wire and electrically contacting it to another metal wire, or a plurality of such metal wires, so constructed in a manner that is consistent with the circuit wiring pattern specified for the SIC(s) and the external input/output signal drivers.
- arc-welding is the recommended means by which to form electrical interconnections between metal, preferably copper, wires so constructed, other conventional techniques may be also utilized.
- the invention may be used to construct a blind via by electing not to bond a copper wire so constructed with any other copper wires and terminating the blind via metal wire at another electrode area, or by terminating the blind via metal wire in a removable mounting support.
- a pre-constructed wire lattice used to form the electrical interconnection network 24 that is press-fit at its terminal points into inserts 52 drilled into the electrode areas 34 of the copper sheet substrate may alternatively be constructed, for instance, from a vacuum cast.
- This method of preparing the electrical interconnection network is depicted in FIG. 3B for convenience.
- contact sections of heat sinks 28 comprising the thermal distribution network 26 may be bonded to the mounting areas 36 using the methods described above for contacting terminal points of the electrical interconnection network 24 to the electrode areas 34.
- mounting supports 46 may optionally be removed after the circuit wiring board "CWB" is fully assembled.
- the mounting support may, alternatively, remain as a permanent fixture in the finished CWB as a component.
- mounting support 54 electrically connects the conducting wire(s) 50 forming the electrical interconnection network 24 to input/output signal drivers (not shown) that are external to the CWB.
- An illustration of a completed form of this embodiment, inclusive of the electrically connecting permanent mounting support, is shown in Figures 4A and 4B.
- Ceramic precursors can be dissolved in solution using techniques such as sol-gel, and/or metalorganic decomposition ("MOD").
- MOD metalorganic decomposition
- sol-gel techniques utilize metal alkoxide precursors to polymerize an inorganic ceramic network through alcohol condensation reactions.
- a fairly viscous precursor solution may be applied to the metal substrate and network constructions by pouring, spraying, spray-pyrolyzing, or screen-printing the precursor preparation into wells defined by the removable mounting supports 46.
- the precursor solution is then reacted or decomposed in an oxidizing atmosphere to form the desired ceramic phase by heating the metalorganic precursors to temperatures above their decomposition points, (i.e., preferably 225-475 degrees C) , in the case of MOD-prepared ceramic, or by heating to accelerate polymerization and alcohol evaporation from sol-gel derived ceramic.
- Alumina with a relative dielectric permittivity of 10
- silica with a relative dielectric permittivity of 3.8
- Ceramic precursors may be reapplied and the reaction/decomposition process repeated, using increasingly lower viscosity solution preparations, to fill voids in the dielectric (ceramic) 20A that may exist after the ceramic member is initially formed.
- Such voids may alternatively be filled by infiltrating or impregnating the ceramic member with a low-dielectric or stress relieving organic preparation, such as, polyvinyl formal, to form an organo-ceramic composite dielectric.
- Polyvinyl formal has a dielectric constant of 3, a dissipation factor of 0.02 and a dielectric strength (1/8 thickness) equal to 300 Volts/mm.
- Poylvinyl butyral which has a dielectric constant of 2.6 and a dissipation factor of 0.027 is another suitable impregnant .
- carboxylic acid salt precursors and the MOD process is a preferred embodiment of this invention.
- Alumina 2-ethylhexanoate is a preferred metalorganic precursor for alumina ceramic members
- silicon 2-ethylhexanoate is the preferred metalorganic precursor for silica ceramic members.
- Organo-ceramic composite dielectric materials may alternatively be formed by spray-pyrolyzing the solution on to the circuit wiring board assembly heated to temperatures above the initial decomposition temperature (s) of the dissolved carboxylic acid salt(s), (225-375 degrees C) , yet below the temperatures at which the salt(s) 's organic ligands thoroughly decompose, (400-475 degrees C) .
- the carboxylic acid evaporates, depositing waxy carboxylic acid salts that decompose in si tu .
- the resultant dielectric material is a matrix of fully deflagrated oxide ceramic with incompletely decomposed organic material, thereby producing an organo-ceramic dielectric member.
- This organo-ceramic composite material can be maintained if the deposited dielectric and circuit wiring assembly is not exposed to temperatures above 400 degrees C, which would cause the organic fraction to rapidly decompose.
- the organic content in these spray-pyrolyzed organo-ceramic composite dielectrics can be increased by adding low- volatility resins, such as polyvinyl butyral, and/or high temperature adhesives that compatible with polyvinyl butyral to the carboxylic acid salt ("MOD") solution.
- Polyvinyl butyral typically decomposes at temperatures above 450 degrees C, and, thus, sticks to the matrix of partially decomposed carboxylic acid salts deposited via spray-pyrolysis at temperatures between 225-375 degrees C.
- the dielectric material 20A has been formed to completely envelop the electrical interconnection network 24 and the thermal distribution network 26 embedded within, its top surface is rough ground to prepare a microscopically coarse surface, i.e., with a median surface roughness that is greater than 35 microns.
- a microscopically coarse surface i.e., with a median surface roughness that is greater than 35 microns.
- the major surface of the ceramic face of a similarly prepared metal- ceramic composite comprising the bottom metal member 32 and a dielectric member 20B, that may not necessarily have any electrical interconnection and thermal distribution networks internal to its body, is bonded to dielectric member 20A.
- a low melting- temperature oxide glass 66 such as a silica-borate, silica- phosphate, or alumina-silica-phosphate or alumino-silica- borate phase
- the low-melting temperature bonding agent is applied to either or both major surfaces of dielectric members 20A and 2OB at a temperature above the softening point of the glass phase, pressing the two composites together, dielectric-face to dielectric-face, and cooling the pressed body below the softening point of the glass.
- the two dielectric members 20A and 20B may alternatively be adhered to one another using a suitable polymer instead of the low melting temperature glass.
- the remaining areas 42 that will not form part of the finished wiring board are removed by etching those thinned portions of the top metal member 12 and the bottom metal member 32.
- the partially completed composite needs to be designed and structured to expose the removable material 48 of the mounting support (s) 46 once remaining areas of the top metal member 12 and the bottom metal member 32, respectively, have been dispersed.
- the removable material portions 48 of the mounting support (s) 46 are then dispersed to produce the completed composite circuit wiring board with internal copper wire electrical interconnection and thermal distribution networks as shown in FIG. 3E.
- At least one internal blocking capacitor preferably a solid state or ceramic capacitor (designated individually as capacitors 60A and 60B) , connect at least one conducting wire 50 in the electrical interconnection network 24 to an electrical ground.
- the capacitance (s) of the internal blocking capacitor (s) 60A and B are selected so as to reduce any unwanted parasitic electrical signal (s) (noise) and improve the signal-to-noise ratio of an electrical signal traveling through the electrical interconnection network 24 between the SIC and any input/out signal drivers (not shown) external to the CWB.
- the incorporation of the internal blocking capacitor (s) is illustrated in Figure 4B, in which the metal member 32 that opposes the metal member 12 upon which the SIC is placed is configured to function as electrical ground.
- the internal blocking capacitor (s) 60A may be embedded within the dielectric member 20 by fixing the internal blocking capacitor 60A on the metal member 32 prior to applying that portion of the dielectric member 20 that will envelop the internal blocking capacitor 60A.
- the capacitor 60A may be electrically connected to at least one conducting wire 50 in the electrical interconnection network 24 by creating a hole or via 62 in the dielectric member 20 located above the internal blocking capacitor 60A and filling the hole or via 62 with an electrically conducting substance 64, such as a solder or a metal paste, that is also placed in electrical contact with the at least one conducting wire 50. It is possible with the present invention to house the internal blocking capacitor 60B within mounting support 54 that remains as a permanent fixture of the CWB.
- capacitor 60B As with capacitor 60A a hole or via 62 with an electrically conducting substance 64 is also placed in electrical contact with the at least one conducting wire 50.
- the capacitor 60B is used to electrically connect the SIC to input/output signal drivers external to CWB through the electrical interconnection network 24.
- This preferred embodiment of the invention is also depicted in Figure 4B.
- An example of the blocking capacitors that can be used with the present invention could be, but is not limited to, ceramic capacitors, preferably, multilayer ceramic capacitors.
- a fundamental problem with incorporating metal wire or pipe networks within a dielectric member relates to the large mismatch (es) in the coefficients of thermal expansion between the metal and ceramic dielectric compositions, and the internal stresses, fracturing, or deformation that are generated when the composite body is thermally cycled.
- This problem is particularly acute when copper, which has a coefficient of thermal expansion of 16.5 X 10 -6 degrees C "1 , is embedded in pure silica, with a coefficient of thermal expansion of 0.5 X 10 "6 degrees C "1 .
- the mismatch between alumina ceramic, which has a coefficient of thermal expansion equal to 8.8 X 10 "6 degrees C "1 , and copper is less severe, but less problematic.
- Heat generated by the SIC 16 is dissipated into the circuit wiring board. As the thermal distribution network 26 transfers this heat to the heat sinks exterior to the circuit wiring board it will heat, expand and compress the dielectric member.
- the first deploys curves in the design of the embedded network structures to high stress points that result from sharp edged structures.
- the network structures are designed with curved, rather than sharp-cornered L-joints and T-joints as shown in Figs. 5A and 5B, the stress is more evenly distributed over the radial arcs, as opposed to building up intense compressive forces at the sharp critical points in the network.
- Optimal radii of curvature for the network joints, and even the specific cross- sectional shapes of the copper wires or heat sinks used to form these networks is depended upon the thermal load imposed by the SIC and can be derived by any practitioner skilled in the art of computer simulation methods, such as the finite element method.
- compressive stress is also reduced in the network by coating the (copper) metal wire forming the electrical interconnection network 24 and the heat pipes 28 forming the thermal dissipation network 26 with an organic resin 56 as shown in FIG. 3A, such as a polyvinyl formal which decomposes at temperatures greater than 430 degrees C, comprising, in-part, a high-temperature adhesive.
- the resin can be applied by dip-coating a pre-constructed network into a resin bath prior to fixing it to the top metal member 12 and/or the mounting support 46. It is preferred within the present invention to have the organic resin applied using the "pultrusion" method, whereby the metal wire member is drawn through a coating die that applies the resin as it is assembled into the electrical interconnection network 24 on the surface of the metal sheet substrate.
- the high decomposition temperature of the resin allows the resin to occupy space in the immediate vicinity of the network member.
- the ceramic member is formed and hardened to the surface of the organic resin at temperatures below the resin's decomposition temperature.
- the "soft" organic resin may be left in tact to act as a buffer that accommodates unequal lateral displacements between the metal network member and the ceramic member.
- the applied resin compound needs to be resistant to the solvent (s) used to disperse the removable material 48 in the mounting support (s) 46 if it is to remain an integral part of the composite.
- the resin can be removed by heating the composite in an oxidizing atmosphere to temperatures in excess of its thermal decomposition temperature, or by dissolving it in a suitable dispersant. Once the resin is removed, a void space is created between the hardened ceramic member and the metal wire and/or heat sinks. This void space allows the network member to slip relative to the surrounding dielectric member when the metal network member expands or contracts to a larger degree than the surrounding dielectric member.
- the depth of the void space, and, hence, the thickness of the organic resin coating, is determined by the relative degree of play that would be required between the metal network member and the surrounding dielectric during maximal operational cycles for a given SIC.
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Abstract
Description
Claims
Priority Applications (7)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP53025098A JP2001507867A (en) | 1996-12-30 | 1997-12-29 | Ceramic composite wire structure for semiconductor device and manufacturing method |
CA002275972A CA2275972A1 (en) | 1996-12-30 | 1997-12-29 | Ceramic composite wiring structures for semiconductor devices and method of manufacture |
EP97954258A EP0948879A4 (en) | 1996-12-30 | 1997-12-29 | Ceramic composite wiring structures for semiconductor devices and method of manufacture |
US09/344,682 US6323549B1 (en) | 1996-08-29 | 1999-06-25 | Ceramic composite wiring structures for semiconductor devices and method of manufacture |
US09/990,615 US6742249B2 (en) | 1996-08-29 | 2001-11-21 | Method of manufacture of ceramic composite wiring structures for semiconductor devices |
US10/824,723 US7047637B2 (en) | 1996-08-29 | 2004-04-15 | Method of manufacture of ceramic composite wiring structures for semiconductor devices |
US11/430,152 US20060200958A1 (en) | 1996-08-29 | 2006-05-08 | Method of manufacture of ceramic composite wiring structures for semiconductor devices |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
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US3398396P | 1996-12-30 | 1996-12-30 | |
US60/033,983 | 1996-12-30 |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US09/004,928 Continuation-In-Part US6143432A (en) | 1996-08-29 | 1998-01-09 | Ceramic composites with improved interfacial properties and methods to make such composites |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US09/344,682 Continuation US6323549B1 (en) | 1996-08-29 | 1999-06-25 | Ceramic composite wiring structures for semiconductor devices and method of manufacture |
Publications (2)
Publication Number | Publication Date |
---|---|
WO1998030072A1 true WO1998030072A1 (en) | 1998-07-09 |
WO1998030072A9 WO1998030072A9 (en) | 1998-10-29 |
Family
ID=21873603
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/US1997/023976 WO1998030072A1 (en) | 1996-08-29 | 1997-12-29 | Ceramic composite wiring structures for semiconductor devices and method of manufacture |
Country Status (5)
Country | Link |
---|---|
EP (1) | EP0948879A4 (en) |
JP (1) | JP2001507867A (en) |
CN (1) | CN1112838C (en) |
CA (1) | CA2275972A1 (en) |
WO (1) | WO1998030072A1 (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2002003421A2 (en) * | 2000-06-30 | 2002-01-10 | Intel Corporation | Semiconductor chip package with embedded capacitors |
DE10232788B4 (en) * | 2001-07-18 | 2010-01-14 | Infineon Technologies Ag | Electronic component with a semiconductor chip on a system carrier, system carrier and method for producing an electronic component |
CN111328189A (en) * | 2020-03-17 | 2020-06-23 | 万安裕维电子有限公司 | Salt mist resistant PCB |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102008001414A1 (en) * | 2008-04-28 | 2009-10-29 | Robert Bosch Gmbh | Substrate circuit module with components in multiple contacting levels |
CN102210844B (en) * | 2010-04-07 | 2012-10-31 | 北京亚东生物制药有限公司 | Chinese medicinal composition for treating chronic hepatitis and preparation method thereof |
CN102314526B (en) * | 2010-07-02 | 2013-09-25 | 中国科学院微电子研究所 | Method for optimizing heat distribution of integrated circuit layout |
JP5488540B2 (en) * | 2011-07-04 | 2014-05-14 | トヨタ自動車株式会社 | Semiconductor module |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
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US4598167A (en) * | 1983-07-27 | 1986-07-01 | Hitachi, Ltd. | Multilayered ceramic circuit board |
US5113315A (en) * | 1990-08-07 | 1992-05-12 | Cirqon Technologies Corporation | Heat-conductive metal ceramic composite material panel system for improved heat dissipation |
US5396034A (en) * | 1992-03-10 | 1995-03-07 | Hitachi | Thin film ceramic multilayer wiring hybrid board |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3676292A (en) * | 1970-10-07 | 1972-07-11 | Olin Corp | Composites of glass-ceramic-to-metal,seals and method of making same |
WO1989008324A1 (en) * | 1988-02-29 | 1989-09-08 | Digital Equipment Corporation | Alignment of leads for ceramic integrated circuit packages |
US5336532A (en) * | 1989-02-21 | 1994-08-09 | Dow Corning Corporation | Low temperature process for the formation of ceramic coatings |
US5506755A (en) * | 1992-03-11 | 1996-04-09 | Kabushiki Kaisha Toshiba | Multi-layer substrate |
DE4222474A1 (en) * | 1992-07-09 | 1994-01-13 | Bosch Gmbh Robert | Assembly unit for multi-layer hybrid with power components |
US5444298A (en) * | 1993-02-04 | 1995-08-22 | Intel Corporation | Voltage converting integrated circuit package |
JPH06255019A (en) * | 1993-03-08 | 1994-09-13 | Hitachi Ltd | Ceramic composite laminated sheet and production of multilayer wiring board used therewith |
-
1997
- 1997-12-29 EP EP97954258A patent/EP0948879A4/en not_active Withdrawn
- 1997-12-29 WO PCT/US1997/023976 patent/WO1998030072A1/en active Application Filing
- 1997-12-29 CN CN97181620A patent/CN1112838C/en not_active Expired - Fee Related
- 1997-12-29 CA CA002275972A patent/CA2275972A1/en not_active Abandoned
- 1997-12-29 JP JP53025098A patent/JP2001507867A/en not_active Ceased
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4598167A (en) * | 1983-07-27 | 1986-07-01 | Hitachi, Ltd. | Multilayered ceramic circuit board |
US5113315A (en) * | 1990-08-07 | 1992-05-12 | Cirqon Technologies Corporation | Heat-conductive metal ceramic composite material panel system for improved heat dissipation |
US5396034A (en) * | 1992-03-10 | 1995-03-07 | Hitachi | Thin film ceramic multilayer wiring hybrid board |
Non-Patent Citations (1)
Title |
---|
See also references of EP0948879A4 * |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2002003421A2 (en) * | 2000-06-30 | 2002-01-10 | Intel Corporation | Semiconductor chip package with embedded capacitors |
WO2002003421A3 (en) * | 2000-06-30 | 2002-03-14 | Intel Corp | Semiconductor chip package with embedded capacitors |
DE10232788B4 (en) * | 2001-07-18 | 2010-01-14 | Infineon Technologies Ag | Electronic component with a semiconductor chip on a system carrier, system carrier and method for producing an electronic component |
CN111328189A (en) * | 2020-03-17 | 2020-06-23 | 万安裕维电子有限公司 | Salt mist resistant PCB |
Also Published As
Publication number | Publication date |
---|---|
CA2275972A1 (en) | 1998-07-09 |
EP0948879A4 (en) | 2003-08-27 |
EP0948879A1 (en) | 1999-10-13 |
CN1112838C (en) | 2003-06-25 |
CN1245629A (en) | 2000-02-23 |
JP2001507867A (en) | 2001-06-12 |
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