US6724295B2 - Chip resistor with upper electrode having nonuniform thickness and method of making the resistor - Google Patents
Chip resistor with upper electrode having nonuniform thickness and method of making the resistor Download PDFInfo
- Publication number
- US6724295B2 US6724295B2 US10/092,257 US9225702A US6724295B2 US 6724295 B2 US6724295 B2 US 6724295B2 US 9225702 A US9225702 A US 9225702A US 6724295 B2 US6724295 B2 US 6724295B2
- Authority
- US
- United States
- Prior art keywords
- walled portion
- resistor
- conductor pattern
- thinner
- conductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C17/00—Apparatus or processes specially adapted for manufacturing resistors
- H01C17/006—Apparatus or processes specially adapted for manufacturing resistors adapted for manufacturing resistor chips
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C1/00—Details
- H01C1/14—Terminals or tapping points or electrodes specially adapted for resistors; Arrangements of terminals or tapping points or electrodes on resistors
- H01C1/148—Terminals or tapping points or electrodes specially adapted for resistors; Arrangements of terminals or tapping points or electrodes on resistors the terminals embracing or surrounding the resistive element
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C17/00—Apparatus or processes specially adapted for manufacturing resistors
- H01C17/28—Apparatus or processes specially adapted for manufacturing resistors adapted for applying terminals
- H01C17/281—Apparatus or processes specially adapted for manufacturing resistors adapted for applying terminals by thick film techniques
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C7/00—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material
- H01C7/003—Thick film resistors
Definitions
- the present invention relates to a chip resistor for surface-mounting on a printed circuit board and to a method of making the same.
- the resistor 21 includes a rectangular substrate 22 formed of alumina ceramic material. As shown in FIG. 15, the substrate 22 has an upper surface 22 a , side surfaces 22 b and a lower surface 22 c .
- the resistor 21 includes a pair of first upper electrodes 23 formed on the upper surface 22 a , side electrodes 24 formed on the respective side surfaces 22 b , and lower electrodes 25 formed on the lower surface 22 c .
- the upper surface 22 a of the substrate 22 is formed with a resistor element 26 connecting the first upper electrodes 23 to each other.
- the resistor element 26 is covered with a protective coating layer 27 . Further, the protective coating layer 27 is covered with an overcoat layer 29 .
- Each first upper electrode 23 has an upper surface formed with a second upper electrode 28 .
- the resistor 21 may be formed utilizing an aggregate board 11 as shown in FIG. 16, which is made of alumina ceramic material.
- the aggregate board 11 has a size capable of simultaneously providing a plurality of identical resistors. Specifically, the aggregate board 11 is sectioned into a plurality of rectangular regions 12 . Each of the rectangular regions 12 corresponds to one resistor 21 .
- reference signs 13 , 14 indicate excess portions of the aggregate board 11 .
- the aggregate board 11 will be divided along the excess portions using a dicing cutter for example.
- the aggregate board 11 has an upper surface on which a plurality of conductor pieces 23 ′ are arranged in a matrix. Each of the conductor pieces 23 ′ extends across the corresponding cutting line 13 . Each rectangular region 12 is overlapped by two conductor pieces 23 ′ which are spaced from each other along a cutting line 14 . The overlapping regions finally become the upper electrodes 23 shown in FIG. 15 .
- side conductor layers (corresponding to the side electrodes 24 of FIG. 15) are formed on the cutting surface of the substrate 11 .
- the plural rectangular regions 12 are completely separated from each other.
- plating is applied to the electrodes 24 , 25 and 28 shown in FIG. 15, thereby providing the resistor 21 as a final product.
- the aggregate board 11 (and the conductor pieces 23 ′ and the like) are divided along the cutting lines 13 .
- the rotation of the dicing cutter may raise the conductor pieces 23 ′.
- the first upper electrode 23 of the resistor 21 includes a rising portion at the edge thereof.
- the second upper electrode 28 formed on the first upper electrode 23 also rises.
- Such a rising portion formed in the resistor 21 causes various problems.
- the side electrode 24 may not be suitably connected to the first upper electrode 23 or the second upper electrode 28 .
- solder-plating the second upper electrode 28 solder cannot be suitably applied to the rising portion.
- an object of the present invention is to provide a chip resistor which is free from the rising of an electrode on the supporting substrate.
- a method of making a chip resistor includes the following steps. First, an aggregate board is prepared which includes a first region and a second region which are spaced from each other via an excess portion. Then, a conductor pattern is formed which extends to bridge the first region and the second region. Subsequently, a resistor element is formed in each of the first region and the second region for connection to the conductor pattern. Then, the aggregate board is cut at the excess portion.
- the conductor pattern includes a thinner-walled portion extending across the excess portion and a thicker-walled portion connected to the thinner-walled portion and spaced from the excess portion.
- the conductor pattern is cut together with the substrate.
- the thinner-walled portion has a thickness of 0.1-3.0 ⁇ m
- the thicker-walled portion has a thickness of 5-25 ⁇ m.
- the conductor pattern forming step includes a sub-step of applying a conductor paste for the thicker-walled portion and a sub-step of applying a conductor paste for the thinner-walled portion.
- the conductor paste for the thicker-walled portion and the conductor paste for the thinner-walled portion are baked simultaneously.
- the conductor paste for the thicker-walled portion and the conductor paste for the thinner-walled portion are made of a same material.
- the method according to the present invention further comprises the step of forming a resistance adjusting groove in the resistor element.
- a chip resistor comprising an insulating substrate having an upper surface and a side surface, a first conductor pattern formed on the upper surface, a resistor element connected to the first conductor pattern.
- the first conductor pattern includes a thinner-walled portion contacting the upper surface, and a thicker-walled portion connected to the thinner-walled portion and contacting the upper surface.
- the thinner-walled portion is spaced from the resistor element and extends up to the side surface.
- the thicker-walled portion contacts the resistor element and is spaced from the side surface.
- the resistor further includes a second conductor pattern extending on the first conductor pattern.
- the second conductor pattern contacts both of the thinner-walled portion and the thicker-walled portion.
- the thinner-walled portion has a thickness of 0.1-3.0 ⁇ m, whereas the thicker-walled portion has a thickness of 5-25 ⁇ m.
- FIG. 1 is a sectional view illustrating the basic structure of a chip resistor according to the present invention
- FIG. 2 is a plan view showing an aggregate board used for making the resistor of FIG. 1;
- FIGS. 3A-3B, 4 A- 4 B, 5 , 6 A- 6 B and 7 - 13 illustrate the manufacturing process for the chip resistor of FIG. 1, wherein FIG. 3B is a sectional view taken along lines III—III of FIG. 3A, FIG. 4B is a sectional view taken along lines IV—IV of FIG. 4A, and FIG. 6B is a sectional view taken along lines VI—VI of FIG. 6A;
- FIG. 14 is a flow chart of the manufacturing process
- FIG. 15 is a sectional view illustrating the basic structure of a prior art chip resistor
- FIG. 16 is a plan view showing one process step in the manufacturing process of the chip resistor of FIG. 15.
- FIG. 17 illustrates a problem of the prior art chip resistor.
- FIG. 1 illustrates the basic structure of a chip resistor (designated by reference sign 1 as a whole) according to the present invention.
- the resistor 1 is in the form of a generally rectangular parallelepiped for surface-mounting on a printed circuit board (not shown).
- the resistor 1 includes a substrate 2 made of alumina ceramic material.
- the substrate 2 has an upper surface 2 a having opposite ends formed with first upper electrodes 3 .
- Each of the first upper electrodes 3 is formed of a metal such as gold or silver and includes a thicker-walled portion 31 and a thinner-walled portion 32 .
- the thicker-walled portion 31 is arranged as spaced from the upper edge of a respective side surface 2 b of the substrate 2 .
- the thinner-walled portion 32 adjoins the thicker-walled portion 31 and extends up to the side surface 2 b .
- the thicker-walled portion 31 may have a thickness of 5-25 ⁇ m for example, whereas the thinner-walled portion 32 may have a thickness of 0.1-3.0 ⁇ m for example.
- Each of the side surfaces 2 b of the substrate 2 is formed with a side electrode 4 formed of gold or silver.
- the substrate 2 has a lower surface 2 c formed with a pair of lower electrodes 5 .
- the lower electrodes 5 are located at opposite ends of the lower surface 2 c and spaced from each other.
- Each of the lower electrodes 5 is connected to the corresponding side electrode 4 .
- the upper surface 2 a of the substrate 2 is formed with a resistor element 6 connected to the thicker-walled portions 31 of the first upper electrodes 3 .
- the resistor element 6 is formed of a metal or a metal oxide having predetermined electric resistance characteristics.
- the resistor element 6 may be formed with a resistance adjusting groove (not shown) formed by trimming with a laser beam.
- the resistor element 6 has an upper surface formed with a first coating layer 7 made of glass.
- the first coating layer 7 is formed to prevent the surface of the resistor element 6 from breaking due to the laser trimming.
- the first coating layer 7 has an upper surface on which is formed a second coating layer 9 made of glass.
- the second coating layer 9 is provided for protecting the first coating layer 7 .
- Each first upper electrode 3 has an upper surface on which a second upper electrode 8 is formed for contact with a part of the second coating layer 9 .
- the second upper electrode 8 is formed of resinated silver comprising silver particles contained in hardened resin.
- the second upper electrode 8 is provided for maintaining the electric characteristics of the first upper electrode 3 .
- the second upper electrode 8 is made generally flush with the second coating layer 9 .
- the second upper electrode 8 is connected to the side electrode 4 .
- the second upper electrode 8 , the side electrode 4 , and the lower electrode 5 have outer surfaces covered with a nickel-plating layer or solder-plating layer (not shown).
- an aggregate board 11 of alumina ceramic material is prepared, as shown in FIG. 2 .
- the aggregate board 11 has a flat upper surface (shown in FIG. 12) and a flat reverse surface.
- the aggregate board 11 is obtained by cutting a green sheet into pieces of a predetermined size and then baking each cut piece.
- the aggregate board 11 includes rectangular regions 12 each of which corresponds to one resistor.
- Reference sign 13 designates excess portions which will be removed in cutting the aggregate board 11 vertically.
- Reference sign 14 designates excess portions which will be removed in cutting the aggregate board 11 horizontally.
- a lower conductor pattern (not shown) is formed (S 1 in FIG. 14 ).
- the conductor pattern corresponds to the lower electrodes 5 shown in FIG. 1 .
- the lower conductor pattern may be formed by screen printing. Specifically, use may be made of a conductor paste prepared by dispersing minute metal particles (of gold or silver for example) and glass particles in an organic solvent.
- the lower conductor pattern may be formed by printing the conductor paste at predetermined portions and drying and baking the applied paste.
- a first upper conductor pattern is formed on the upper surface of the aggregate board 11 (S 2 in FIG. 14 ).
- conductor layers 32 ′ of a smaller thickness are first formed.
- each of the conductor layers 32 ′ is rectangular and extends to traverse the excess portion 13 .
- the conductor layer 32 ′ is in a range of 0.1-3.0 ⁇ m and preferably 2 ⁇ m in thickness.
- the conductor layer 32 ′ may be formed by screen printing using a conductor paste containing gold (or silver) and glass.
- conductor layers 31 ′ which are thicker than the conductor layers 32 ′ are formed.
- the conductor layers 31 ′ have a thickness of 5-25 ⁇ m and electrically connected to the conductor layers 32 ′.
- the conductor layers 31 ′ may also be formed by screen printing using conductor paste containing gold (or silver) and glass. The formation of the conductor layers 31 ′ and 32 ′ from the same material is advantageous for providing reliable connection between these conductor layers. According to the present invention, however, the conductor layers 31 ′ and 32 ′ may be formed of different kinds of conductor paste.
- the conductor paste applied for forming the conductor layers 31 ′ and 32 ′ may be baked simultaneously. This is advantageous for shortening the manufacturing time.
- the baking may be performed at 870° C. for 30 minutes, for example.
- the thicker conductor layers 31 ′ are formed after the formation of the thinner conductor layers 32 ′. However, this order may be reversed. Further, as shown in FIG. 5, the conductor layers 31 ′ may be entirely formed on the conductor layers 32 ′.
- resistor layers 6 ′ are formed for the rectangular regions 12 , as shown in FIGS. 6A and 6B (S 3 in FIG. 14 ). As shown in FIG. 6A, each resistor layer 6 ′ extends to bridge two conductor layers 31 ′ spaced from each other in a respective rectangular region 12 .
- the resistor layer 6 ′ may be formed by screen-printing resistor paste (consisting of a conductor component and glass frit) and baking the applied paste.
- the conductor layers 31 ′ have a relatively large thickness (5-25 ⁇ m). This thickness is determined so that the conductor layers 31 ′ connected to the resistor layer 6 ′ do not influence the electric resistance characteristics of the resistor layer 6 ′.
- the thickness of the resistor layer 31 ′ may be about 10 ⁇ m.
- first coating layers 7 ′ (See FIG. 8) are formed to entirely cover the resistor layers 6 ′ (S 4 in FIG. 14 ).
- the first coating layers 7 ′ are formed by printing and baking an insulating paste containing a glass component.
- trimming is performed with respect to each of the resistor layers 6 ′ for setting the resistance thereof to a predetermined value (S 5 in FIG. 14 ).
- the trimming may be performed by laser beam application while monitoring the resistance of each resistance layer 6 ′ by bringing measurement probes (not shown) into contact with the conductor layers 31 ′ or 32 ′.
- a resistance adjusting groove 15 as shown in FIG. 7 is formed on each resistor layer 6 ′ (and the first coating layer 7 ′).
- second coating layers 9 ′ are formed (S 7 in FIG. 14 ).
- Each of the second coating layers 9 ′ extends vertically of the aggregate board 11 to entirely cover the first coating layers 7 ′ arranged in that direction.
- the second coating layers 9 ′ may be formed by baking an insulating paste applied by screen printing.
- second upper conductor pattern 8 ′ is formed (S 8 in FIG. 14 ).
- the conductor pattern 8 ′ comprises a plurality of rectangular conductor pieces, each of which extends to bridge two adjacent conductor layers 31 ′ while traversing the cutting line 13 .
- the second upper conductor pattern 8 ′ may be formed by screen-printing a resinated silver paste.
- the resinated silver paste may be prepared by dispersing minute silver particles and glass particles in a resin.
- the aggregate board 11 is cut vertically (S 9 in FIG. 14 ). Specifically, the aggregate board 11 is cut along lines L 1 shown in FIG. 10 . As a result, an intermediate product 16 is obtained, as shown in FIG. 11 . As shown in FIGS. 12 and 13, the cutting may be performed using a dicing cutter provided with a blade 17 in the form of a circular plate which is driven for rotation.
- the blade 17 may be about 0.1 mm in width and about 50 mm in diameter for example.
- the rotation of the blade 17 caused the upper electrode 23 to rise at the cutting portion (FIG. 17 ).
- the conductor layer 32 ′ according to the above embodiment is small in thickness, such rising does not occur.
- the second upper conductor pattern 8 ′ is formed of resinated silver which has a small malleability. Therefore, the rising of the second upper conductor pattern 8 ′ is also prevented.
- the inventor has experimentally found that the rising of the upper electrode 23 is prevented by adjusting the composition of the electrode-forming paste. Specifically, the rising of the upper electrode 23 is prevented by increasing the proportion of the glass component contained in the electrode-forming paste. However, attention should be paid because, when the proportion of the glass component is excessively increased, the conductance of the upper electrode 23 unduly decreases.
- side conductor patterns 4 ′ are formed on respective opposite cut surfaces of the intermediate product 16 (S 10 in FIG. 14 ).
- the side conductor pattern 4 ′ is so formed as to be electrically connected to the first upper conductor pattern ( 31 ′, 32 ′) through the second upper conductor pattern 8 ′. Therefore, the side conductor pattern 4 ′ extends up to the upper surface of the substrate 11 for reliable electrical connection to the second upper conductor pattern 8 ′ (See FIG. 1 ).
- the intermediate product 16 is cut horizontally along cutting lines L 2 shown in FIG. 11 (S 11 in FIG. 14 ). Subsequently, nickel-plating or solder-plating is applied to the exposed portions of the second upper conductor patterns 8 ′, the side conductor patterns 4 ′ and the lower conductor patterns (S 12 in FIG. 14 ). In this way, the resistor 1 as shown in FIG. 1 is obtained.
- the first upper electrode 3 and the second upper electrode 8 of the resistor 1 do not include any rising portion. Therefore, the resistor 1 according to the present invention does not suffer the problems described with respect to the prior art.
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Apparatuses And Processes For Manufacturing Resistors (AREA)
- Details Of Resistors (AREA)
- Non-Adjustable Resistors (AREA)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
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JP2001-066291 | 2001-03-09 | ||
JP2001-66291 | 2001-03-09 | ||
JP2001066291A JP3967553B2 (ja) | 2001-03-09 | 2001-03-09 | チップ型抵抗器の製造方法、およびチップ型抵抗器 |
Publications (2)
Publication Number | Publication Date |
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US20020130761A1 US20020130761A1 (en) | 2002-09-19 |
US6724295B2 true US6724295B2 (en) | 2004-04-20 |
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Application Number | Title | Priority Date | Filing Date |
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US10/092,257 Expired - Lifetime US6724295B2 (en) | 2001-03-09 | 2002-03-07 | Chip resistor with upper electrode having nonuniform thickness and method of making the resistor |
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US (1) | US6724295B2 (ja) |
JP (1) | JP3967553B2 (ja) |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20040113750A1 (en) * | 2002-01-15 | 2004-06-17 | Toshiki Matsukawa | Method for manufacturing chip resistor |
US20040164841A1 (en) * | 2003-02-25 | 2004-08-26 | Rohm Co., Ltd. | Chip resistor |
US20040164842A1 (en) * | 2003-02-25 | 2004-08-26 | Rohm Co., Ltd. | Chip resistor |
US20090231086A1 (en) * | 2005-09-27 | 2009-09-17 | Hokuriku Electric Industry Co., Ltd. | Terminal structure of chiplike electric component |
US20100117783A1 (en) * | 2004-03-24 | 2010-05-13 | Rohm Co., Ltd. | Chip resistor and manufacturing method thereof |
US20100245028A1 (en) * | 2007-11-08 | 2010-09-30 | Tomoyuki Washizaki | Circuit protective device and method for manufacturing the same |
US20130260048A1 (en) * | 2001-12-19 | 2013-10-03 | Watlow Electric Manufacturing Company | Method for the production of an electrically conductive resistive layer and heating and/or cooling device |
Families Citing this family (8)
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WO2004023498A1 (en) * | 2002-09-03 | 2004-03-18 | Vishay Intertechnology, Inc. | Flip chip resistor and its manufacturing method |
JP4867487B2 (ja) * | 2006-06-13 | 2012-02-01 | パナソニック株式会社 | チップ抵抗器の製造方法 |
KR102115114B1 (ko) | 2009-09-04 | 2020-05-25 | 비쉐이 데일 일렉트로닉스, 엘엘씨 | 저항 온도 계수 보상을 갖춘 저항기 |
KR101537169B1 (ko) * | 2013-11-26 | 2015-07-22 | 스마트전자 주식회사 | 전류측정소자 어셈블리 |
US10083781B2 (en) | 2015-10-30 | 2018-09-25 | Vishay Dale Electronics, Llc | Surface mount resistors and methods of manufacturing same |
US10438729B2 (en) | 2017-11-10 | 2019-10-08 | Vishay Dale Electronics, Llc | Resistor with upper surface heat dissipation |
DE102018115205A1 (de) * | 2018-06-25 | 2020-01-02 | Vishay Electronic Gmbh | Verfahren zur Herstellung einer Vielzahl von Widerstandsbaueinheiten |
CN118762894A (zh) | 2020-08-20 | 2024-10-11 | 韦沙戴尔电子有限公司 | 电阻器、电流感测电阻器、电池分流器、分流电阻器及制造方法 |
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US5379016A (en) * | 1993-06-03 | 1995-01-03 | E. I. Du Pont De Nemours And Company | Chip resistor |
US5966067A (en) * | 1997-12-26 | 1999-10-12 | E. I. Du Pont De Nemours And Company | Thick film resistor and the manufacturing method thereof |
US6153256A (en) | 1998-08-18 | 2000-11-28 | Rohm Co., Ltd. | Chip resistor and method of making the same |
US6242999B1 (en) * | 1998-01-20 | 2001-06-05 | Matsushita Electric Industrial Co., Ltd. | Resistor |
US6304167B1 (en) * | 1997-07-09 | 2001-10-16 | Matsushita Electric Industrial Co., Ltd. | Resistor and method for manufacturing the same |
-
2001
- 2001-03-09 JP JP2001066291A patent/JP3967553B2/ja not_active Expired - Fee Related
-
2002
- 2002-03-07 US US10/092,257 patent/US6724295B2/en not_active Expired - Lifetime
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5379016A (en) * | 1993-06-03 | 1995-01-03 | E. I. Du Pont De Nemours And Company | Chip resistor |
US6304167B1 (en) * | 1997-07-09 | 2001-10-16 | Matsushita Electric Industrial Co., Ltd. | Resistor and method for manufacturing the same |
US5966067A (en) * | 1997-12-26 | 1999-10-12 | E. I. Du Pont De Nemours And Company | Thick film resistor and the manufacturing method thereof |
US6242999B1 (en) * | 1998-01-20 | 2001-06-05 | Matsushita Electric Industrial Co., Ltd. | Resistor |
US6153256A (en) | 1998-08-18 | 2000-11-28 | Rohm Co., Ltd. | Chip resistor and method of making the same |
Cited By (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20130260048A1 (en) * | 2001-12-19 | 2013-10-03 | Watlow Electric Manufacturing Company | Method for the production of an electrically conductive resistive layer and heating and/or cooling device |
US9758854B2 (en) * | 2001-12-19 | 2017-09-12 | Watlow Electric Manufacturing Company | Method for the production of an electrically conductive resistive layer and heating and/or cooling device |
US20150267288A1 (en) * | 2001-12-19 | 2015-09-24 | Watlow Electric Manufacturing Company | Method for the production of an electrically conductive resistive layer and heating and/or cooling device |
US9029742B2 (en) * | 2001-12-19 | 2015-05-12 | Watlow Electric Manufacturing Company | Method for the production of an electrically conductive resistive layer and heating and/or cooling device |
US20040113750A1 (en) * | 2002-01-15 | 2004-06-17 | Toshiki Matsukawa | Method for manufacturing chip resistor |
US7237324B2 (en) * | 2002-01-15 | 2007-07-03 | Matsushita Electric Industrial Co., Ltd. | Method for manufacturing chip resistor |
US6982624B2 (en) * | 2003-02-25 | 2006-01-03 | Rohm Co., Ltd. | Chip resistor |
US6856234B2 (en) * | 2003-02-25 | 2005-02-15 | Rohm Co., Ltd. | Chip resistor |
US20040164842A1 (en) * | 2003-02-25 | 2004-08-26 | Rohm Co., Ltd. | Chip resistor |
US20040164841A1 (en) * | 2003-02-25 | 2004-08-26 | Rohm Co., Ltd. | Chip resistor |
US20100117783A1 (en) * | 2004-03-24 | 2010-05-13 | Rohm Co., Ltd. | Chip resistor and manufacturing method thereof |
US8081059B2 (en) * | 2004-03-24 | 2011-12-20 | Rohm Co., Ltd. | Chip resistor and manufacturing method thereof |
US7825769B2 (en) * | 2005-09-27 | 2010-11-02 | Hokuriku Electric Co., Ltd. | Terminal structure of chiplike electric component |
US20090231086A1 (en) * | 2005-09-27 | 2009-09-17 | Hokuriku Electric Industry Co., Ltd. | Terminal structure of chiplike electric component |
US20100245028A1 (en) * | 2007-11-08 | 2010-09-30 | Tomoyuki Washizaki | Circuit protective device and method for manufacturing the same |
US9035740B2 (en) * | 2007-11-08 | 2015-05-19 | Panasonic Intellectual Property Management Co., Ltd. | Circuit protective device and method for manufacturing the same |
Also Published As
Publication number | Publication date |
---|---|
JP2002270409A (ja) | 2002-09-20 |
JP3967553B2 (ja) | 2007-08-29 |
US20020130761A1 (en) | 2002-09-19 |
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