Nothing Special   »   [go: up one dir, main page]

US20180095362A1 - Method of manufacturing display device using bottom surface exposure - Google Patents

Method of manufacturing display device using bottom surface exposure Download PDF

Info

Publication number
US20180095362A1
US20180095362A1 US15/831,547 US201715831547A US2018095362A1 US 20180095362 A1 US20180095362 A1 US 20180095362A1 US 201715831547 A US201715831547 A US 201715831547A US 2018095362 A1 US2018095362 A1 US 2018095362A1
Authority
US
United States
Prior art keywords
photo
layer
black matrix
resist layer
display device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
US15/831,547
Inventor
Hoon Kang
Bum Soo KAM
Se Yoon Oh
Chong Sup CHANG
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Display Co Ltd
Original Assignee
Samsung Display Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Display Co Ltd filed Critical Samsung Display Co Ltd
Priority to US15/831,547 priority Critical patent/US20180095362A1/en
Publication of US20180095362A1 publication Critical patent/US20180095362A1/en
Abandoned legal-status Critical Current

Links

Images

Classifications

    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/0005—Production of optical devices or components in so far as characterised by the lithographic processes or materials used therefor
    • G03F7/0007—Filters, e.g. additive colour filters; Components for display devices
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23F—NON-MECHANICAL REMOVAL OF METALLIC MATERIAL FROM SURFACE; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL; MULTI-STEP PROCESSES FOR SURFACE TREATMENT OF METALLIC MATERIAL INVOLVING AT LEAST ONE PROCESS PROVIDED FOR IN CLASS C23 AND AT LEAST ONE PROCESS COVERED BY SUBCLASS C21D OR C22F OR CLASS C25
    • C23F1/00—Etching metallic material by chemical means
    • C23F1/02—Local etching
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/13338—Input devices, e.g. touch panels
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/13439—Electrodes characterised by their electrical, optical, physical properties; materials therefor; method of making
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/20—Exposure; Apparatus therefor
    • G03F7/2002—Exposure; Apparatus therefor with visible light or UV light, through an original having an opaque pattern on a transparent support, e.g. film printing, projection printing; by reflection of visible or UV light from an original such as a printed image
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/20—Exposure; Apparatus therefor
    • G03F7/2022—Multi-step exposure, e.g. hybrid; backside exposure; blanket exposure, e.g. for image reversal; edge exposure, e.g. for edge bead removal; corrective exposure
    • G03F7/203—Multi-step exposure, e.g. hybrid; backside exposure; blanket exposure, e.g. for image reversal; edge exposure, e.g. for edge bead removal; corrective exposure comprising an imagewise exposure to electromagnetic radiation or corpuscular radiation
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/26—Processing photosensitive materials; Apparatus therefor
    • G03F7/30—Imagewise removal using liquid means
    • G03F7/32—Liquid compositions therefor, e.g. developers
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/26—Processing photosensitive materials; Apparatus therefor
    • G03F7/38—Treatment before imagewise removal, e.g. prebaking
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32134—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by liquid etching only
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/413—Nanosized electrodes, e.g. nanowire electrodes comprising one or a plurality of nanowires
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/1884—Manufacture of transparent electrodes, e.g. TCO, ITO
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/1884—Manufacture of transparent electrodes, e.g. TCO, ITO
    • H01L31/1888—Manufacture of transparent electrodes, e.g. TCO, ITO methods for etching transparent electrodes
    • H01L51/442—
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K30/00—Organic devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation
    • H10K30/80—Constructional details
    • H10K30/81—Electrodes
    • H10K30/82—Transparent electrodes, e.g. indium tin oxide [ITO] electrodes
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G02F1/133509—Filters, e.g. light shielding masks
    • G02F1/133512—Light shielding layers, e.g. black matrix
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/34—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies not provided for in groups H01L21/0405, H01L21/0445, H01L21/06, H01L21/16 and H01L21/18 with or without impurities, e.g. doping materials
    • H01L21/46—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428
    • H01L21/461—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/465—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/467—Chemical or electrical treatment, e.g. electrolytic etching using masks
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/549—Organic PV cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Definitions

  • Exemplary embodiments of the present invention relate to a display device manufacturing method, and more particularly, to a display device manufacturing method using a bottom surface exposure process.
  • a display device manufacturing method using a photo patterning method may be used to form a metal or transparent electrode pattern on a substrate through exposure and development of a photo-resist layer.
  • the photo-resist layer may be disposed on the substrate and may be exposed to ultraviolet rays using an opaque pattern disposed on the substrate as a mask. In this case, it is difficult to form a metal or transparent electrode pattern that is different from the mask. Thus, an application range of the bottom surface exposure is limited to the case of forming a metal or transparent electrode pattern that corresponds to the mask.
  • a method for manufacturing a display device includes forming a plurality of light blocking patterns on a first surface of a transparent substrate, wherein a first light blocking pattern of the plurality of light blocking patterns has a different line width than a second light blocking pattern of the plurality of light blocking patterns.
  • An insulating layer is formed on the first surface of the transparent substrate and the light blocking patterns.
  • a conductive layer is formed on the insulating layer.
  • a photo-resist layer is formed on the conductive layer. The photo-resist layer is exposed with ultraviolet rays through a second surface of the transparent substrate, wherein the first and second surfaces of the transparent substrate are opposite to each other.
  • the photo-resist layer is developed.
  • the conductive layer is etched using the photo-resist layer as a mask. The photo-resist layer is removed.
  • portions of the photo-resist layer that correspond to the plurality of light blocking patterns remain on the transparent substrate after developing the photo-resist layer.
  • the plurality of light blocking patterns are formed by depositing material on the first surface of the transparent substrate, wherein the material that is deposited on the first surface of the transparent substrate to form the plurality of light blocking patterns passes through a pattern mask.
  • a light blocking pattern of the plurality of light blocking patterns includes a metal.
  • the conductive layer includes a metal or a transparent electrode.
  • the etching includes wet-etching.
  • the etching includes etching the conductive layer such that a width of a conductive layer pattern that overlaps a corresponding photo-resist pattern is smaller than a width of the corresponding photo-resist pattern.
  • conductive layer patterns having width equal to or less than a threshold amount are completely etched and conductive layer patterns having width greater than a threshold amount remain on the transparent substrate.
  • an ultraviolet lamp is used to expose the photo-resist layer with ultraviolet rays.
  • a method for manufacturing a display device includes forming a red pixel, a green pixel, and a blue pixel on a first surface of a transparent thin film encapsulation layer and forming a black matrix between adjacent pixels, from among the red, green, and the blue pixels.
  • a transparent electrode is formed on a second surface of the thin film encapsulation layer, wherein the first and second surfaces of the transparent thin film encapsulation layer are opposite to each other.
  • a photo-resist layer is formed on the transparent electrode layer. The photo-resist layer is exposed with ultraviolet rays through the first surface of the transparent thin film encapsulation layer. The photo-resist layer is developed. The transparent electrode layer is etched using the photo-resist layer as a mask. The photo-resist layer is removed.
  • a portion of the photo-resist layer that corresponds to the black matrix remains on the transparent thin film encapsulation layer after developing the photo-resist layer.
  • the black matrix is formed by depositing material on the first surface of the transparent thin film encapsulation layer, wherein the material that is deposited on the first surface of the transparent thin film encapsulation layer to form the black matrix passes through a pattern mask.
  • the black matrix includes a plurality of black matrix patterns, wherein a first black matrix pattern of the plurality of black matrix patterns has a width that is different from a width of a second black matrix pattern of the plurality of black matrix patterns.
  • the transparent electrode layer includes indium zinc oxide (IZO) or indium tin oxide (ITO).
  • the etching includes wet-etching.
  • the etching over-etches the transparent electrode layer such that the width of the transparent conductive layer is smaller than the width of the photo-resist layer in a portion corresponding to the black matrix.
  • the exposure is performed by irradiating ultraviolet rays using an ultraviolet ray lamp.
  • a method for manufacturing a display device includes forming first and second light blocking patterns on a transparent substrate.
  • An insulating layer is formed on the first and second light blocking patterns.
  • a conductive layer is formed on the insulating layer.
  • a photo-resist layer is formed on the conductive layer.
  • a region of the photo-resist layer that does not overlap the first and second light blocking patterns is exposed with ultraviolet rays by using the first and second light blocking patterns as a mask, wherein the ultraviolet rays enter the transparent substrate from a surface of the transparent substrate that is opposite to a surface of the transparent substrate on which the first and second light blocking patterns are formed.
  • the photo-resist layer is developed.
  • the conductive layer is wet-etched using the exposed photo-resist layer as a mask.
  • the photo-resist layer is removed.
  • the first light blocking pattern has a width greater than that of the second light blocking pattern.
  • a portion of the conductive layer that overlaps the first light blocking pattern remains on the transparent substrate and a portion of the conductive layer that overlaps the second light blocking pattern is completely etched.
  • FIG. 1 is a flowchart of a display device manufacturing method according to an exemplary embodiment of the present invention
  • FIG. 2 to FIG. 8 are cross-sectional views illustrating a display device manufacturing method according to an exemplary embodiment of the present invention
  • FIG. 9 is a flowchart of a display device manufacturing method according to an exemplary embodiment of the present invention.
  • FIG. 10 to FIG. 13 are cross-sectional views illustrating a display device manufacturing method according to an exemplary embodiment of the present invention.
  • FIG. 14 is a plan view that illustrates a metal mesh structure manufactured by a display device manufacturing method according to an exemplary embodiment of the present invention.
  • FIG. 15 and FIG. 16 are cross-sectional views illustrating a display device manufacturing method according to an exemplary embodiment of the present invention.
  • FIG. 1 to FIG. 8 a display device manufacturing method according to an exemplary embodiment of the present invention will be described with reference to FIG. 1 to FIG. 8 .
  • FIG. 1 is a flowchart of a display device manufacturing method according to an exemplary embodiment of the present invention.
  • FIG. 2 to FIG. 8 are cross-sectional views illustrating a display device manufacturing method according to an exemplary embodiment of the present invention.
  • light blocking patterns 12 respectively having different line widths are formed on the entire surface of a transparent substrate 10 .
  • the light blocking patterns 12 may be formed as opaque patterns, and may be made of metal.
  • the light blocking patterns 12 may be formed through a plasma enhanced chemical vapor deposition (PECVD) process using a pattern mask. For example, the material that is included in the light blocking patterns 12 may pass through the mask to be deposited on the transparent substrate 10 to form the light blocking patterns 12 .
  • PECVD plasma enhanced chemical vapor deposition
  • an insulating layer 14 is formed on the transparent substrate 10 and the light blocking patterns 12 . This corresponds to step S 102 of FIG. 1 .
  • the insulating layer 14 may be formed on the entire surface of the transparent substrate 10 to cover the light blocking patterns 12 .
  • the insulating layer 14 may be deposited on the transparent substrate 10 through the PECVD process, and may include a silicon nitride.
  • a conductive layer 16 is formed on the insulating layer 14 . This corresponds to step S 103 of FIG. 1 .
  • the conductive layer 16 may be formed as a metal or transparent electrode.
  • the conductive layer 16 may include a metal or a transparent electrode.
  • the conductive layer 16 may include a transparent conductive material, such as indium tin oxide (ITO) or indium zinc oxide (IZO), and may be deposited on the insulating layer 14 .
  • ITO indium tin oxide
  • IZO indium zinc oxide
  • a photo-resist layer 18 is formed on the conductive layer 16 . This corresponds to step S 104 of FIG. 1 .
  • the photo-resist layer 18 is a positive photo-resist layer 18 having an exposed portion that is developed and then removed.
  • the photo-resist layer 18 may be formed by coating a photo-resist composition on the conductive layer 16 and prebaking the photo-resist composition for 1 to 15 minutes at a temperature of 70° C. to 110° C.
  • the photo-resist layer 18 is exposed by having a rear surface of the transparent substrate 10 irradiated by ultraviolet rays. This corresponds to step S 105 of FIG. 1 .
  • the rear surface of the transparent substrate 10 is a surface of transparent substrate 10 that is opposite to the surface of the transparent substrate 10 on which the light blocking patterns 12 are disposed.
  • the ultraviolet rays are emitted by an ultraviolet lamp and enter the transparent substrate 10 through the rear surface of the transparent substrate 10 .
  • the light blocking patterns 12 act as a mask, blocking transmittance of the ultraviolet rays to a region of the photo-resist layer 18 that overlaps the light blocking patterns 12 . Accordingly, the region of the photo-resist layer 18 that overlaps the light blocking patterns 12 is not exposed to the ultraviolet rays and the region of the photo-resist layer 18 that does not overlap the light blocking patterns 12 is exposed to the ultraviolet rays.
  • the photo-resist layer 18 is developed. This corresponds to step S 106 of FIG. 1 .
  • the region of the photo-resist layer 18 that is exposed to the ultraviolet rays may be removed by a developer, and the region of the photo-resist layer 18 that is not exposed to the ultraviolet rays remains in place. Accordingly, since a portion of the photo-resist layer 18 which overlaps the light blocking patterns 12 is not exposed to the ultraviolet rays, the portion of the photo-resist layer 18 which overlaps the light blocking pattern 12 remains in place after developing the photo-resist layer 18 . The portion of the photo-resist layer 18 that is exposed to the ultraviolet rays is removed after developing the photo-resist layer 18 .
  • the conductive layer 16 is etched using the portion of the photo-resist layer 18 that remains in place after developing the photo-resist layer 18 as a mask. This corresponds to step S 107 of FIG. 1 .
  • the conductive layer 16 may be wet-etched by an etchant solution. Since the wet-etching has an anisotropic etching characteristic, the conductive layer 16 disposed below the photo-resist layer 18 may be over-etched, for example, under-cut. Accordingly, the conductive layer 16 disposed below the photo-resist layer 18 is etched to be more concave at an inner side of a light blocking pattern 12 than at an edge of the same light blocking pattern 12 .
  • the wet-etching etches the conductive layer 16 .
  • a conductive layer pattern 16 results from etching the conductive layer 16 . Due to the wet-etching, a width of a conductive layer pattern 16 that overlaps a corresponding photo-resist pattern 18 is smaller than a width of the corresponding photo-resist pattern 18 .
  • the degree of etching can be adjusted by controlling the temperature of the etchant or the etching time.
  • the portions of the photo-resist layer 18 and the portions of the conductive layer 16 corresponding to the light blocking patterns 12 or photo-resist layer patterns 18 of the photo-resist layer 18 may have irregular or different widths.
  • a portion of the conductive layer 16 having a wide width may remain in place after the wet-etching (e.g., with a smaller width) and a portion of the conductive layer 16 having a narrow width may be removed by the wet-etching. Accordingly, the wet-etching process reduces the width of the portions of the conductive layer 16 , for example, the conductive layer patterns 16 , corresponding to the photo-resist layer patterns 18 of the photo-resist layer 18 .
  • the wet-etching process completely etches the conductive layer patterns 16 corresponding to the photo-resist layer patterns 18 of the photo-resist layer 18 depending on the width of the respective photo-resist layer patterns 18 of the photo-resist layer 18 .
  • the wet-etching completely etches conductive layer patterns 16 having a width equal to or less than a threshold amount and reduces the width of conductive layer patterns 16 having a width greater than the threshold amount.
  • the photo-resist layer 18 is removed to expose patterns of the conductive layer 16 having different widths. This corresponds to step S 108 of FIG. 1 .
  • the patterns of the conductive layer 16 exposed by removal the portions of the photo-resist layer 18 are the same as the etched portions of the conductive layer 16 that correspond to the light blocking patterns 12 .
  • FIG. 9 is a flowchart of a display device manufacturing method according to an exemplary embodiment of the present invention.
  • FIG. 10 to FIG. 13 are cross-sectional views illustrating a display device manufacturing method according to an exemplary embodiment of the present invention.
  • FIG. 14 is a top plan view that illustrates a metal mesh structure manufactured by a display device manufacturing method according to an exemplary embodiment of the present invention.
  • red R, green G, and blue pixels B are formed on a transparent thin film encapsulation layer 20 .
  • a black matrix 22 is formed between adjacent pixels, front among the red R, green G, and blue pixels B. This corresponds to step S 201 of FIG. 9 .
  • the red R, green G and blue pixels B and the black matrix 22 may be formed through a PECVD process using a pattern mask. For example, the material that is included in the black matrix 22 may pass through the mask to be deposited on the thin film encapsulation layer 20 to form the black matrix 22 .
  • the black matrix 22 may include a plurality of black matrix patterns 22 , and the plurality of black matrix patterns 22 may have different widths.
  • a transparent electrode layer 26 is formed on the transparent thin film encapsulation layer 20 . This corresponds to step S 202 of FIG. 9 .
  • the transparent electrode 26 is formed on a surface of the film encapsulation layer 20 that is opposite to a surface of the encapsulation film 20 on which the red R, green G and blue pixels B and the black matrix 22 are disposed.
  • the transparent electrode layer 26 may be made of a transparent conductive material such as ITO or IZO.
  • the transparent electrode layer 26 may be formed on the entire surface of the thin film encapsulation layer 20 .
  • a photo-resist layer 28 is formed on the transparent electrode layer 26 . This corresponds to step S 203 of FIG. 9 .
  • the photo-resist layer 28 is a positive photo-resist layer 28 having an exposed portion that is developed and then removed.
  • the photo-resist layer 28 may be formed by coating a photo-resist component on the transparent electrode layer 26 and prebaking the photo-resist component for 1 to 15 minutes at a temperature of 70° C. to 110° C.
  • the photo-resist layer 28 is exposed by having the surface of the transparent thin film encapsulation layer 20 on which the red R, green G and blue pixels B and the black matrix 22 are disposed irradiated with ultraviolet rays.
  • the ultraviolet rays are emitted by an ultraviolet lamp and enter the transparent thin film encapsulation layer 20 through the surface of the transparent thin film encapsulation layer 20 on which the red R, green G and blue pixels B and the black matrix 22 are disposed.
  • the black matrix 22 acts as a mask, blocking transmittance of the ultraviolet rays to a region of the photo-resist layer 28 that overlaps the black matrix 22 . Accordingly, the region of the photo-resist layer 28 that overlaps the black matrix 22 is not exposed to the ultraviolet rays and the region of the photo-resist layer 28 that does not overlap the black matrix 22 is exposed to the ultraviolet rays.
  • the photo-resist layer 28 is developed. This corresponds to step S 205 of FIG. 9 .
  • the region of the photo-resist layer 28 that is exposed by ultraviolet rays may be removed by a developer, and the region of the photo-resist layer 28 that is not exposed to the ultraviolet rays remains in place. Accordingly, since a portion of the photo-resist layer 28 which overlaps the black matrix 22 is not exposed to the ultraviolet rays, the portion of the photo-resist layer 28 which overlaps the black matrix 22 remains in place after developing the photo-resist layer 28 . The portion of the photo-resist layer 28 that is exposed to the ultraviolet rays is removed after developing the photo-resist layer 28 .
  • the transparent electrode layer 26 is etched using the portion of the photo-resist layer 28 that remains in place after developing the photo-resist layer 28 as a mask. This corresponds to step S 206 of FIG. 9 .
  • the transparent electrode layer 26 may be wet-etched by an etchant solution.
  • the transparent electrode layer 26 disposed below the photo-resist layer 28 may be over-etched. Accordingly, that the transparent electrode layer 26 may be more concave at an inner side of a black matrix 22 pattern than at an edge of the same black matrix 22 pattern.
  • the photo-resist layer 28 is removed to expose a plurality of transparent electrode patterns 26 . This corresponds to step S 207 of FIG. 9 .
  • Patterns of the black matrixes 22 may be formed to be different from each other such that the widths of the transparent electrode patterns 26 may be formed to be different from each other. As shown in FIG. 14 , a metal mesh structure may be formed so that a part of the transparent electrode layer 26 does not remain on the transparent thin film encapsulation layer 20 .
  • FIG. 15 and FIG. 16 are cross-sectional views illustrating a display device manufacturing method according to an exemplary embodiment of the present invention.
  • a light blocking pattern 32 having a wide width and a light blocking pattern 32 formed of a slit pattern having a narrow width are formed on a front surface of a transparent substrate 30 .
  • a rear surface of the transparent substrate 30 is opposite to the front surface of the transparent substrate 30 .
  • a photo-resist layer 38 is exposed by ultraviolet rays from the rear surface of the transparent substrate 30 .
  • the photo-resist layer 38 is developed. Then, a conductive layer 36 disposed between an insulating layer 34 and the photo-resist layer 38 is wet-etched using the portion of the photo-resist layer 38 that remains after developing the photo-resist layer 38 as a mask. The portion of the photo-resist layer 38 that remains after developing the photo-resist layer 38 is removed so the portion of the conductive layer 36 corresponding to the light blocking pattern 32 having the wide width remains on the insulating layer 34 . The wet-etching completely etches the portion of the conductive layer 36 corresponding to the light blocking pattern 32 having the narrow width. The portion of the conductive layer 36 corresponding to the light blocking pattern 32 having the narrow width is completely etched due to the width of the individual light blocking patterns 32 that make up the light blocking pattern 32 having the narrow width.
  • a lower opaque light blocking pattern or a black matrix is formed to have predetermined and/or varying line width. Then, a bottom surface exposure method is used to adjust the line width of the metal or transparent electrode pattern at a specific location and selectively short-circuit a first metal or transparent electrode pattern with a second metal or transparent electrode pattern at the specific location. Accordingly, a degree of freedom in the forming of patterns in increased.

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Nonlinear Science (AREA)
  • Electromagnetism (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Mathematical Physics (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Optics & Photonics (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Nanotechnology (AREA)
  • Ceramic Engineering (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Electroluminescent Light Sources (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Plasma & Fusion (AREA)

Abstract

A method for manufacturing a display device includes forming a plurality of light blocking patterns on a first surface of a transparent substrate, wherein a first light blocking pattern of the plurality of light blocking patterns has a different line width than a second light blocking pattern of the plurality of light blocking patterns. An insulating layer is formed on the first surface of the transparent substrate and the light blocking patterns. A conductive layer is formed on the insulating layer. A photo-resist layer is formed on the conductive layer. The photo-resist layer is exposed with ultraviolet rays through a second surface of the transparent substrate, wherein the first and second surfaces of the transparent substrate are opposite to each other. The photo-resist layer is developed. The conductive layer is etched using the photo-resist layer as a mask. The photo-resist layer is removed.

Description

    CROSS REFERENCE TO RELATED APPLICATION(S)
  • This application is a Continuation of co-pending U.S. patent application Ser. No. 15/139,037, filed Apr. 26, 2016, which claims priority under 35 U.S.C. § 119 to Korean Patent Application No. 10-2015-0133055, filed in the Korean Intellectual Property Office on Sep. 21, 2015, the disclosures of which are incorporated by reference herein in their entirety.
    • TECHNICAL FIELD
  • Exemplary embodiments of the present invention relate to a display device manufacturing method, and more particularly, to a display device manufacturing method using a bottom surface exposure process.
    • DISCUSSION OF THE RELATED ART
  • A display device manufacturing method using a photo patterning method may be used to form a metal or transparent electrode pattern on a substrate through exposure and development of a photo-resist layer. The photo-resist layer may be disposed on the substrate and may be exposed to ultraviolet rays using an opaque pattern disposed on the substrate as a mask. In this case, it is difficult to form a metal or transparent electrode pattern that is different from the mask. Thus, an application range of the bottom surface exposure is limited to the case of forming a metal or transparent electrode pattern that corresponds to the mask.
    • SUMMARY
  • According to an exemplary embodiment of the present invention, a method for manufacturing a display device includes forming a plurality of light blocking patterns on a first surface of a transparent substrate, wherein a first light blocking pattern of the plurality of light blocking patterns has a different line width than a second light blocking pattern of the plurality of light blocking patterns. An insulating layer is formed on the first surface of the transparent substrate and the light blocking patterns. A conductive layer is formed on the insulating layer. A photo-resist layer is formed on the conductive layer. The photo-resist layer is exposed with ultraviolet rays through a second surface of the transparent substrate, wherein the first and second surfaces of the transparent substrate are opposite to each other. The photo-resist layer is developed. The conductive layer is etched using the photo-resist layer as a mask. The photo-resist layer is removed.
  • In an exemplary embodiment of the present invention, portions of the photo-resist layer that correspond to the plurality of light blocking patterns remain on the transparent substrate after developing the photo-resist layer.
  • In an exemplary embodiment of the present invention, the plurality of light blocking patterns are formed by depositing material on the first surface of the transparent substrate, wherein the material that is deposited on the first surface of the transparent substrate to form the plurality of light blocking patterns passes through a pattern mask.
  • In an exemplary embodiment of the present invention, a light blocking pattern of the plurality of light blocking patterns includes a metal.
  • In an exemplary embodiment of the present invention, the conductive layer includes a metal or a transparent electrode.
  • In an exemplary embodiment of the present invention, the etching includes wet-etching.
  • In an exemplary embodiment of the present invention, the etching includes etching the conductive layer such that a width of a conductive layer pattern that overlaps a corresponding photo-resist pattern is smaller than a width of the corresponding photo-resist pattern.
  • In an exemplary embodiment of the present invention, after the etching is performed, conductive layer patterns having width equal to or less than a threshold amount are completely etched and conductive layer patterns having width greater than a threshold amount remain on the transparent substrate.
  • In an exemplary embodiment of the present invention, an ultraviolet lamp is used to expose the photo-resist layer with ultraviolet rays.
  • According to an exemplary embodiment of the present invention, a method for manufacturing a display device includes forming a red pixel, a green pixel, and a blue pixel on a first surface of a transparent thin film encapsulation layer and forming a black matrix between adjacent pixels, from among the red, green, and the blue pixels. A transparent electrode is formed on a second surface of the thin film encapsulation layer, wherein the first and second surfaces of the transparent thin film encapsulation layer are opposite to each other. A photo-resist layer is formed on the transparent electrode layer. The photo-resist layer is exposed with ultraviolet rays through the first surface of the transparent thin film encapsulation layer. The photo-resist layer is developed. The transparent electrode layer is etched using the photo-resist layer as a mask. The photo-resist layer is removed.
  • In an exemplary embodiment of the present invention, a portion of the photo-resist layer that corresponds to the black matrix remains on the transparent thin film encapsulation layer after developing the photo-resist layer.
  • In an exemplary embodiment of the present invention, the black matrix is formed by depositing material on the first surface of the transparent thin film encapsulation layer, wherein the material that is deposited on the first surface of the transparent thin film encapsulation layer to form the black matrix passes through a pattern mask.
  • In an exemplary embodiment of the present invention, the black matrix includes a plurality of black matrix patterns, wherein a first black matrix pattern of the plurality of black matrix patterns has a width that is different from a width of a second black matrix pattern of the plurality of black matrix patterns.
  • In an exemplary embodiment of the present invention, the transparent electrode layer includes indium zinc oxide (IZO) or indium tin oxide (ITO).
  • In an exemplary embodiment of the present invention, the etching includes wet-etching.
  • In an exemplary embodiment of the present invention, the etching over-etches the transparent electrode layer such that the width of the transparent conductive layer is smaller than the width of the photo-resist layer in a portion corresponding to the black matrix.
  • In an exemplary embodiment of the present invention, the exposure is performed by irradiating ultraviolet rays using an ultraviolet ray lamp.
  • In an exemplary embodiment of the present invention, a method for manufacturing a display device includes forming first and second light blocking patterns on a transparent substrate. An insulating layer is formed on the first and second light blocking patterns. A conductive layer is formed on the insulating layer. A photo-resist layer is formed on the conductive layer. A region of the photo-resist layer that does not overlap the first and second light blocking patterns is exposed with ultraviolet rays by using the first and second light blocking patterns as a mask, wherein the ultraviolet rays enter the transparent substrate from a surface of the transparent substrate that is opposite to a surface of the transparent substrate on which the first and second light blocking patterns are formed. The photo-resist layer is developed. The conductive layer is wet-etched using the exposed photo-resist layer as a mask. The photo-resist layer is removed.
  • In an exemplary embodiment of the present invention, the first light blocking pattern has a width greater than that of the second light blocking pattern.
  • In an exemplary embodiment of the present invention, after the wet etching, a portion of the conductive layer that overlaps the first light blocking pattern remains on the transparent substrate and a portion of the conductive layer that overlaps the second light blocking pattern is completely etched.
    • BRIEF DESCRIPTION OF THE DRAWINGS
  • The above and other features and aspects of the present invention will become more apparent by describing in detail exemplary embodiments of the present invention with reference to the accompanying drawings, in which:
  • FIG. 1 is a flowchart of a display device manufacturing method according to an exemplary embodiment of the present invention;
  • FIG. 2 to FIG. 8 are cross-sectional views illustrating a display device manufacturing method according to an exemplary embodiment of the present invention;
  • FIG. 9 is a flowchart of a display device manufacturing method according to an exemplary embodiment of the present invention;
  • FIG. 10 to FIG. 13 are cross-sectional views illustrating a display device manufacturing method according to an exemplary embodiment of the present invention;
  • FIG. 14 is a plan view that illustrates a metal mesh structure manufactured by a display device manufacturing method according to an exemplary embodiment of the present invention; and
  • FIG. 15 and FIG. 16 are cross-sectional views illustrating a display device manufacturing method according to an exemplary embodiment of the present invention.
    •  DETAILED DESCRIPTION OF THE EMBODIMENTS
  • Exemplary embodiments of the present invention will be described more fully hereinafter with reference to the accompanying drawings. The disclosed exemplary embodiments of the present invention may be modified in various different ways without departing from the spirit and scope of the present invention.
  • Like reference numerals may designate like elements throughout the specification. Accordingly, a repetitive description of elements already described may be omitted for brevity.
  • In the drawings, the relative proportions and ratios of elements may be exaggerated or diminished in size for clarity and convenience of illustration. When a part or element is said to be “over” or “on”another part or element, the part or element may be disposed directly over or on the other part or element, or intervening parts or elements may be disposed therebetween.
  • Hereinafter, a display device manufacturing method according to an exemplary embodiment of the present invention will be described with reference to FIG. 1 to FIG. 8.
  • FIG. 1 is a flowchart of a display device manufacturing method according to an exemplary embodiment of the present invention. FIG. 2 to FIG. 8 are cross-sectional views illustrating a display device manufacturing method according to an exemplary embodiment of the present invention.
  • Referring to FIG. 2, light blocking patterns 12 respectively having different line widths are formed on the entire surface of a transparent substrate 10. This corresponds to step S101 of FIG. 1. The light blocking patterns 12 may be formed as opaque patterns, and may be made of metal. The light blocking patterns 12 may be formed through a plasma enhanced chemical vapor deposition (PECVD) process using a pattern mask. For example, the material that is included in the light blocking patterns 12 may pass through the mask to be deposited on the transparent substrate 10 to form the light blocking patterns 12.
  • Referring to FIG. 3, an insulating layer 14 is formed on the transparent substrate 10 and the light blocking patterns 12. This corresponds to step S102 of FIG. 1. The insulating layer 14 may be formed on the entire surface of the transparent substrate 10 to cover the light blocking patterns 12. The insulating layer 14 may be deposited on the transparent substrate 10 through the PECVD process, and may include a silicon nitride.
  • A conductive layer 16 is formed on the insulating layer 14. This corresponds to step S103 of FIG. 1. The conductive layer 16 may be formed as a metal or transparent electrode. For example, the conductive layer 16 may include a metal or a transparent electrode. The conductive layer 16 may include a transparent conductive material, such as indium tin oxide (ITO) or indium zinc oxide (IZO), and may be deposited on the insulating layer 14.
  • Referring to FIG. 4, a photo-resist layer 18 is formed on the conductive layer 16. This corresponds to step S104 of FIG. 1. In an exemplary embodiment of the present invention, the photo-resist layer 18 is a positive photo-resist layer 18 having an exposed portion that is developed and then removed. The photo-resist layer 18 may be formed by coating a photo-resist composition on the conductive layer 16 and prebaking the photo-resist composition for 1 to 15 minutes at a temperature of 70° C. to 110° C.
  • Referring to FIG. 5, the photo-resist layer 18 is exposed by having a rear surface of the transparent substrate 10 irradiated by ultraviolet rays. This corresponds to step S105 of FIG. 1. The rear surface of the transparent substrate 10 is a surface of transparent substrate 10 that is opposite to the surface of the transparent substrate 10 on which the light blocking patterns 12 are disposed. The ultraviolet rays are emitted by an ultraviolet lamp and enter the transparent substrate 10 through the rear surface of the transparent substrate 10. The light blocking patterns 12 act as a mask, blocking transmittance of the ultraviolet rays to a region of the photo-resist layer 18 that overlaps the light blocking patterns 12. Accordingly, the region of the photo-resist layer 18 that overlaps the light blocking patterns 12 is not exposed to the ultraviolet rays and the region of the photo-resist layer 18 that does not overlap the light blocking patterns 12 is exposed to the ultraviolet rays.
  • Referring to FIG. 6, the photo-resist layer 18 is developed. This corresponds to step S106 of FIG. 1. The region of the photo-resist layer 18 that is exposed to the ultraviolet rays may be removed by a developer, and the region of the photo-resist layer 18 that is not exposed to the ultraviolet rays remains in place. Accordingly, since a portion of the photo-resist layer 18 which overlaps the light blocking patterns 12 is not exposed to the ultraviolet rays, the portion of the photo-resist layer 18 which overlaps the light blocking pattern 12 remains in place after developing the photo-resist layer 18. The portion of the photo-resist layer 18 that is exposed to the ultraviolet rays is removed after developing the photo-resist layer 18.
  • Referring to FIG. 7, the conductive layer 16 is etched using the portion of the photo-resist layer 18 that remains in place after developing the photo-resist layer 18 as a mask. This corresponds to step S107 of FIG. 1. In this case, the conductive layer 16 may be wet-etched by an etchant solution. Since the wet-etching has an anisotropic etching characteristic, the conductive layer 16 disposed below the photo-resist layer 18 may be over-etched, for example, under-cut. Accordingly, the conductive layer 16 disposed below the photo-resist layer 18 is etched to be more concave at an inner side of a light blocking pattern 12 than at an edge of the same light blocking pattern 12. For example, the wet-etching etches the conductive layer 16. A conductive layer pattern 16 results from etching the conductive layer 16. Due to the wet-etching, a width of a conductive layer pattern 16 that overlaps a corresponding photo-resist pattern 18 is smaller than a width of the corresponding photo-resist pattern 18. In this case, the degree of etching can be adjusted by controlling the temperature of the etchant or the etching time.
  • Since the plurality of light blocking patterns 12 respectively have different line widths, the portions of the photo-resist layer 18 and the portions of the conductive layer 16 corresponding to the light blocking patterns 12 or photo-resist layer patterns 18 of the photo-resist layer 18 may have irregular or different widths. A portion of the conductive layer 16 having a wide width may remain in place after the wet-etching (e.g., with a smaller width) and a portion of the conductive layer 16 having a narrow width may be removed by the wet-etching. Accordingly, the wet-etching process reduces the width of the portions of the conductive layer 16, for example, the conductive layer patterns 16, corresponding to the photo-resist layer patterns 18 of the photo-resist layer 18. In addition, the wet-etching process completely etches the conductive layer patterns 16 corresponding to the photo-resist layer patterns 18 of the photo-resist layer 18 depending on the width of the respective photo-resist layer patterns 18 of the photo-resist layer 18. For example, the wet-etching completely etches conductive layer patterns 16 having a width equal to or less than a threshold amount and reduces the width of conductive layer patterns 16 having a width greater than the threshold amount.
  • Referring to FIG. 8, the photo-resist layer 18 is removed to expose patterns of the conductive layer 16 having different widths. This corresponds to step S108 of FIG. 1. The patterns of the conductive layer 16 exposed by removal the portions of the photo-resist layer 18 are the same as the etched portions of the conductive layer 16 that correspond to the light blocking patterns 12.
  • FIG. 9 is a flowchart of a display device manufacturing method according to an exemplary embodiment of the present invention. FIG. 10 to FIG. 13 are cross-sectional views illustrating a display device manufacturing method according to an exemplary embodiment of the present invention. FIG. 14 is a top plan view that illustrates a metal mesh structure manufactured by a display device manufacturing method according to an exemplary embodiment of the present invention.
  • Referring to FIG. 9 to FIG. 14, red R, green G, and blue pixels B are formed on a transparent thin film encapsulation layer 20. A black matrix 22 is formed between adjacent pixels, front among the red R, green G, and blue pixels B. This corresponds to step S201 of FIG. 9. The red R, green G and blue pixels B and the black matrix 22 may be formed through a PECVD process using a pattern mask. For example, the material that is included in the black matrix 22 may pass through the mask to be deposited on the thin film encapsulation layer 20 to form the black matrix 22. The black matrix 22 may include a plurality of black matrix patterns 22, and the plurality of black matrix patterns 22 may have different widths.
  • Referring to FIG. 10, a transparent electrode layer 26 is formed on the transparent thin film encapsulation layer 20. This corresponds to step S202 of FIG. 9. The transparent electrode 26 is formed on a surface of the film encapsulation layer 20 that is opposite to a surface of the encapsulation film 20 on which the red R, green G and blue pixels B and the black matrix 22 are disposed. The transparent electrode layer 26 may be made of a transparent conductive material such as ITO or IZO. The transparent electrode layer 26 may be formed on the entire surface of the thin film encapsulation layer 20.
  • Referring to FIG. 11, a photo-resist layer 28 is formed on the transparent electrode layer 26. This corresponds to step S203 of FIG. 9. In an exemplary embodiment of the present invention, the photo-resist layer 28 is a positive photo-resist layer 28 having an exposed portion that is developed and then removed. The photo-resist layer 28 may be formed by coating a photo-resist component on the transparent electrode layer 26 and prebaking the photo-resist component for 1 to 15 minutes at a temperature of 70° C. to 110° C.
  • Referring to FIG. 11, the photo-resist layer 28 is exposed by having the surface of the transparent thin film encapsulation layer 20 on which the red R, green G and blue pixels B and the black matrix 22 are disposed irradiated with ultraviolet rays. This corresponds to step S204 of FIG. 9. The ultraviolet rays are emitted by an ultraviolet lamp and enter the transparent thin film encapsulation layer 20 through the surface of the transparent thin film encapsulation layer 20 on which the red R, green G and blue pixels B and the black matrix 22 are disposed. The black matrix 22 acts as a mask, blocking transmittance of the ultraviolet rays to a region of the photo-resist layer 28 that overlaps the black matrix 22. Accordingly, the region of the photo-resist layer 28 that overlaps the black matrix 22 is not exposed to the ultraviolet rays and the region of the photo-resist layer 28 that does not overlap the black matrix 22 is exposed to the ultraviolet rays.
  • Referring to FIG. 12, the photo-resist layer 28 is developed. This corresponds to step S205 of FIG. 9. The region of the photo-resist layer 28 that is exposed by ultraviolet rays may be removed by a developer, and the region of the photo-resist layer 28 that is not exposed to the ultraviolet rays remains in place. Accordingly, since a portion of the photo-resist layer 28 which overlaps the black matrix 22 is not exposed to the ultraviolet rays, the portion of the photo-resist layer 28 which overlaps the black matrix 22 remains in place after developing the photo-resist layer 28. The portion of the photo-resist layer 28 that is exposed to the ultraviolet rays is removed after developing the photo-resist layer 28.
  • Referring to FIG. 12, the transparent electrode layer 26 is etched using the portion of the photo-resist layer 28 that remains in place after developing the photo-resist layer 28 as a mask. This corresponds to step S206 of FIG. 9. In this case, the transparent electrode layer 26 may be wet-etched by an etchant solution. The transparent electrode layer 26 disposed below the photo-resist layer 28 may be over-etched. Accordingly, that the transparent electrode layer 26 may be more concave at an inner side of a black matrix 22 pattern than at an edge of the same black matrix 22 pattern.
  • Referring to FIG. 13, the photo-resist layer 28 is removed to expose a plurality of transparent electrode patterns 26. This corresponds to step S207 of FIG. 9.
  • Patterns of the black matrixes 22 may be formed to be different from each other such that the widths of the transparent electrode patterns 26 may be formed to be different from each other. As shown in FIG. 14, a metal mesh structure may be formed so that a part of the transparent electrode layer 26 does not remain on the transparent thin film encapsulation layer 20.
  • FIG. 15 and FIG. 16 are cross-sectional views illustrating a display device manufacturing method according to an exemplary embodiment of the present invention.
  • Referring to FIG. 15, a light blocking pattern 32 having a wide width and a light blocking pattern 32 formed of a slit pattern having a narrow width are formed on a front surface of a transparent substrate 30. A rear surface of the transparent substrate 30 is opposite to the front surface of the transparent substrate 30. A photo-resist layer 38 is exposed by ultraviolet rays from the rear surface of the transparent substrate 30.
  • Referring to FIG. 16, the photo-resist layer 38 is developed. Then, a conductive layer 36 disposed between an insulating layer 34 and the photo-resist layer 38 is wet-etched using the portion of the photo-resist layer 38 that remains after developing the photo-resist layer 38 as a mask. The portion of the photo-resist layer 38 that remains after developing the photo-resist layer 38 is removed so the portion of the conductive layer 36 corresponding to the light blocking pattern 32 having the wide width remains on the insulating layer 34. The wet-etching completely etches the portion of the conductive layer 36 corresponding to the light blocking pattern 32 having the narrow width. The portion of the conductive layer 36 corresponding to the light blocking pattern 32 having the narrow width is completely etched due to the width of the individual light blocking patterns 32 that make up the light blocking pattern 32 having the narrow width.
  • As described, in a display device manufacturing method according to an exemplary embodiment of the present invention, when a metal or transparent electrode pattern is formed, a lower opaque light blocking pattern or a black matrix is formed to have predetermined and/or varying line width. Then, a bottom surface exposure method is used to adjust the line width of the metal or transparent electrode pattern at a specific location and selectively short-circuit a first metal or transparent electrode pattern with a second metal or transparent electrode pattern at the specific location. Accordingly, a degree of freedom in the forming of patterns in increased.
  • While the inventive concept has been particularly shown and described with reference to exemplary embodiments thereof, it will be apparent to those of ordinary skill in the art that various changes in form and detail may be made therein without departing from the spirit and scope of the inventive concept.

Claims (9)

What is claimed is:
1. A display device, comprising:
a transparent thin film encapsulation layer comprising a first surface and a second surface, wherein the first surface and the second surface are opposite to each other;
a red pixel, a green pixel, and a blue pixel disposed on the first surface;
a black matrix disposed on the first surface and disposed between adjacent pixels among the red, green, and blue pixels; and
a transparent electrode layer disposed on the second surface,
wherein a width of the transparent electrode layer is smaller than a width of the black matrix.
2. The display device of claim 1, wherein the transparent electrode layer completely overlaps the black matrix.
3. The display device of claim 1, wherein the transparent electrode layer directly contacts the second surface.
4. The display device of claim 1, wherein the black matrix directly contacts the first surface.
5. The display device of claim 1, wherein the black matrix includes a plurality of black matrix patterns, wherein a first black matrix pattern of the plurality of black matrix patterns has a width that is different from a width of a second black matrix pattern of the plurality of black matrix patterns.
6. The display device of claim 1, wherein the transparent electrode layer includes indium zinc oxide (IZO) or indium tin oxide (ITO).
7. The display device of claim 1, wherein the transparent electrode layer is formed by a photolithography process.
8. The display device of claim 7, wherein the photolithography process comprises exposing a photo-resist layer on the transparent electrode layer with ultraviolet rays through the first surface of the transparent thin film encapsulation layer and etching the transparent electrode layer using the photo-resist layer as a mask.
9. The display device of claim 8, wherein the etching over-etches the transparent electrode layer such that the width of the transparent electrode layer is smaller than a width of the photo-resist layer in a portion of the photo-resist layer overlapping with a corresponding portion of the black matrix.
US15/831,547 2015-09-21 2017-12-05 Method of manufacturing display device using bottom surface exposure Abandoned US20180095362A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US15/831,547 US20180095362A1 (en) 2015-09-21 2017-12-05 Method of manufacturing display device using bottom surface exposure

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
KR10-2015-0133055 2015-09-21
KR1020150133055A KR102423679B1 (en) 2015-09-21 2015-09-21 Method of manufacturing display device
US15/139,037 US9841676B2 (en) 2015-09-21 2016-04-26 Method of manufacturing display device using bottom surface exposure
US15/831,547 US20180095362A1 (en) 2015-09-21 2017-12-05 Method of manufacturing display device using bottom surface exposure

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
US15/139,037 Continuation US9841676B2 (en) 2015-09-21 2016-04-26 Method of manufacturing display device using bottom surface exposure

Publications (1)

Publication Number Publication Date
US20180095362A1 true US20180095362A1 (en) 2018-04-05

Family

ID=58282361

Family Applications (2)

Application Number Title Priority Date Filing Date
US15/139,037 Active US9841676B2 (en) 2015-09-21 2016-04-26 Method of manufacturing display device using bottom surface exposure
US15/831,547 Abandoned US20180095362A1 (en) 2015-09-21 2017-12-05 Method of manufacturing display device using bottom surface exposure

Family Applications Before (1)

Application Number Title Priority Date Filing Date
US15/139,037 Active US9841676B2 (en) 2015-09-21 2016-04-26 Method of manufacturing display device using bottom surface exposure

Country Status (2)

Country Link
US (2) US9841676B2 (en)
KR (1) KR102423679B1 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9972271B2 (en) * 2016-05-12 2018-05-15 Novatek Microelectronics Corp. Display panel
CN109960107B (en) * 2017-12-14 2021-01-22 京东方科技集团股份有限公司 Photosensitive composition for forming color resistance, method for preparing color film substrate and color film substrate
CN110096169B (en) * 2018-01-30 2021-01-22 京东方科技集团股份有限公司 Touch substrate, manufacturing method thereof and electronic device

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040150782A1 (en) * 2003-01-06 2004-08-05 Tomohisa Honda Substrate for monochrome liquid crystal display apparatus and production method therefor
US20140168540A1 (en) * 2012-12-14 2014-06-19 Shanghai Tianma Micro-electronics Co., Ltd. Touch control liquid crystal display device
US20150092133A1 (en) * 2013-09-30 2015-04-02 Panasonic Liquid Crystal Display Co., Ltd. Display device
US20160299614A1 (en) * 2014-04-14 2016-10-13 Boe Technology Group Co., Ltd. Display panel, driving method thereof and display device
US20160342259A1 (en) * 2014-12-23 2016-11-24 Shenzhen China Star Optoelectronics Technology Co., Ltd. In-cell capacitive touch screen and display device

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5731179A (en) * 1980-07-31 1982-02-19 Sharp Corp Formation of thin-film transistor
JPH0242761A (en) * 1988-04-20 1990-02-13 Matsushita Electric Ind Co Ltd Manufacture of active matrix substrate
JPH09127494A (en) * 1995-11-06 1997-05-16 Sharp Corp Liquid crystal display and preparation thereof
US7022556B1 (en) * 1998-11-11 2006-04-04 Semiconductor Energy Laboratory Co., Ltd. Exposure device, exposure method and method of manufacturing semiconductor device
TW428328B (en) 1999-07-30 2001-04-01 Hannstar Display Corp Fabricating method of thin film transistor
KR100685804B1 (en) 2004-12-14 2007-02-22 삼성에스디아이 주식회사 Organic Electroluminescence Device and Fabricating Method of the same
KR20070082090A (en) * 2006-02-15 2007-08-21 삼성전자주식회사 Display substrate and method for manufacturing the same
TWI280667B (en) 2006-04-11 2007-05-01 Au Optronics Corp A manufacturing method for a liquid crystal display
KR20080022829A (en) 2006-09-08 2008-03-12 삼성전자주식회사 Method of manufacturing thin film transistor substrate
KR20090108268A (en) 2008-04-11 2009-10-15 주식회사 하이닉스반도체 Method for correcting pattern CD of binary mask
KR20100122336A (en) 2009-05-12 2010-11-22 주식회사 하이닉스반도체 Method of forming a pattern on photomask using backside exposure
KR101604577B1 (en) * 2009-06-30 2016-03-17 가부시키가이샤 한도오따이 에네루기 켄큐쇼 Method for manufacturing semiconductor device
CN102707355A (en) * 2011-10-24 2012-10-03 京东方科技集团股份有限公司 Transreflective color filter and manufacturing method thereof
US8755010B2 (en) * 2011-11-17 2014-06-17 Apple Inc. Displays with multilayer masks and color filters

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040150782A1 (en) * 2003-01-06 2004-08-05 Tomohisa Honda Substrate for monochrome liquid crystal display apparatus and production method therefor
US20140168540A1 (en) * 2012-12-14 2014-06-19 Shanghai Tianma Micro-electronics Co., Ltd. Touch control liquid crystal display device
US20150092133A1 (en) * 2013-09-30 2015-04-02 Panasonic Liquid Crystal Display Co., Ltd. Display device
US20160299614A1 (en) * 2014-04-14 2016-10-13 Boe Technology Group Co., Ltd. Display panel, driving method thereof and display device
US20160342259A1 (en) * 2014-12-23 2016-11-24 Shenzhen China Star Optoelectronics Technology Co., Ltd. In-cell capacitive touch screen and display device

Also Published As

Publication number Publication date
KR20170034980A (en) 2017-03-30
KR102423679B1 (en) 2022-07-21
US9841676B2 (en) 2017-12-12
US20170082922A1 (en) 2017-03-23

Similar Documents

Publication Publication Date Title
CN109671726B (en) Array substrate, manufacturing method thereof, display panel and display device
US8048598B2 (en) Method of fabricating a halftone mask having a shielding pattern and plural overlapping halftone patterns of different widths
US10916568B2 (en) Manufacturing method of display substrate, array substrate and display device
WO2016065796A1 (en) Coa substrate and manufacturing method thereof, and display device
US9910356B2 (en) Method of patterning thin films
US20180095362A1 (en) Method of manufacturing display device using bottom surface exposure
KR100932995B1 (en) Gray scale mask
JP2007171951A (en) Photo mask and method of fabricating array substrate for liquid crystal display device using the same
WO2015085772A1 (en) Fabrication method of substrate
US20180188839A1 (en) Touch substrate and manufacturing method thereof, touch screen
WO2013143321A1 (en) Array substrate and manufacturing method thereof, and display device
WO2015021712A1 (en) Array substrate, manufacturing method thereof and display device
US20070003845A1 (en) Color filter substrate and fabricating method thereof
KR102278989B1 (en) Photomask Structure and Array Substrate Manufacturing Method
WO2018205596A1 (en) Thin film transistor and manufacturing method thereof, array substrate, display panel, and display device
US20160284591A1 (en) Self-aligned semiconductor fabrication with fosse features
WO2016082396A1 (en) Display substrate, display panel, method for making same, and display device
KR20160084949A (en) Photo mask, and method of manufacturing thin film transistor substrate using the same
KR101268388B1 (en) Fabrication method of liquid crystal display device
KR20080077870A (en) Method for fabricating photomask in semiconductor device
CN109188854B (en) Mask plate, display substrate, manufacturing method of display substrate and display device
TWI750418B (en) Display device and manufacturing method thereof
KR20150029997A (en) Halftone mask and method of manufacturing display device using the same
KR20150070839A (en) Method of manufacturing display apparatus
JP7487238B2 (en) Array substrate and manufacturing method thereof

Legal Events

Date Code Title Description
STPP Information on status: patent application and granting procedure in general

Free format text: RESPONSE AFTER FINAL ACTION FORWARDED TO EXAMINER

STPP Information on status: patent application and granting procedure in general

Free format text: ADVISORY ACTION MAILED

STPP Information on status: patent application and granting procedure in general

Free format text: DOCKETED NEW CASE - READY FOR EXAMINATION

STPP Information on status: patent application and granting procedure in general

Free format text: NON FINAL ACTION MAILED

STCB Information on status: application discontinuation

Free format text: ABANDONED -- FAILURE TO RESPOND TO AN OFFICE ACTION