TWI297923B - - Google Patents
Download PDFInfo
- Publication number
- TWI297923B TWI297923B TW95112872A TW95112872A TWI297923B TW I297923 B TWI297923 B TW I297923B TW 95112872 A TW95112872 A TW 95112872A TW 95112872 A TW95112872 A TW 95112872A TW I297923 B TWI297923 B TW I297923B
- Authority
- TW
- Taiwan
- Prior art keywords
- metal
- circuit board
- groove
- power chip
- packaging process
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
Landscapes
- Led Device Packages (AREA)
Description
1297923 【發明所屬之技術領域】 本發明係提供-種辨晶片之封裝製程，尤指綱金屬凹 杯狀之凹槽嵌人結合於電路板上，並將晶片置放於金屬之凹槽 内，而後打線封膠，然後將封膠完成之封裝树與散熱金屬基 ，結合，以絲具有導熱良好、快速散熱、電熱分離、結構簡 單L口之力率4封衣，右為發光功率晶片，更可獲得金屬凹 杯之光源反射增益絲，具備應胁轉體及光電產業之元件 封裝與模組結構設計之良好效用。 【先前技術】 私：，傳統晶片採直接封裝 Β 〇 a r d ;簡稱CQB)，是積體電路封t的—種方式，^ 將裸晶片直接_、封裝於印職路板翻、絲板上，並舞 口有二項基本製程：晶片黏著、導線連接、應用封膠技術等 可有效將I C製造過程中的封裝與戦步驟，趣轉移到電辟 板組裝階段，這種封裝技術其實是小型化的表面轉技術，至 於電氣傳導部㈣是_導線將晶片的接點打_電路㈣ 基板之接點上’形成電性導通，外部再應用封膠技術予以覆董 是以，此種晶ϋ直接封裝技術（c q B)廣泛運用在各類 12979231297923 [Technical Field] The present invention provides a packaging process for discriminating a wafer, in particular, a groove of a metal concave cup is embedded in a circuit board, and the wafer is placed in a groove of a metal. Then, the wire is sealed, and then the encapsulated tree and the heat-dissipating metal base are combined, and the wire has good heat conduction, rapid heat dissipation, electric heat separation, simple structure, and the power ratio of the L port is 4, and the right is a light-emitting power chip. The light source reflection gain wire of the metal concave cup can be obtained, and the utility model has the good effect of component packaging and module structure design of the yoke body and the photoelectric industry. [Prior technology] Private: The traditional wafer adopts direct packaging Β 〇ard; referred to as CQB), which is a kind of integrated circuit sealing method. ^ The bare wafer is directly _, packaged on the printing board, the silk plate, And the dance has two basic processes: wafer bonding, wire bonding, application of sealing technology, etc., which can effectively transfer the packaging and lamination steps in the IC manufacturing process to the assembly stage of the electroplating board. This packaging technology is actually miniaturized. The surface transfer technology, as for the electrical conduction part (four) is the wire to the junction of the wafer _ circuit (four) on the substrate contact 'to form electrical conduction, the external application of sealing technology to cover Dong is, this crystal directly Packaging technology (cq B) is widely used in various types 1297923
㈣性電子產品上，例如多功能事務機、手機、數位相機、電 腦上，也是使得她肖費性產品朝向小型化、多功能化的-項 重要製程’㈣輪晶片之直接封裝(C q B)結構，尤其以發光 功率晶片為例，如第九圖所示’係為習用之側視剖面圖，由圖 中可清楚務魏之難結構切發光“ b餘定位於基 板A上（如：板、板或魏金屬基板等），並於基板 A上鋪設有絕緣私！，如此，即可將導段a㈣設於基 板A之絕緣體A ljL，並·打線之方式將導線b i由發光晶 片B之接蹄至絕緣μ i之導電區段A 2上形成電性導 通，而後再封膠於上述發光神晶# B及導電區段A 2上，以 形成發光功率晶片之C Ο B封裝結構。 然而，此種結構仍具有熱阻高之缺點，在發光晶片B效能 的增加下，相對的它所產生出的熱量也不斷的增加，倘若沒有 良好的散熱方式來引導發散發光晶片B所產生及囤積之熱 里，因之過咼的溫度將導致發光晶片B產生電子游離與熱應力 等現象，進而造成整體的穩定性降低，以及縮短發光晶片6本 身的壽命，因此，如何引導排除這些熱量以避免發光晶片B過 熱，便有以下之結構設計，如第十圖所示，係為另一習用之側 視剖面圖，由圖中可清楚看出，另一習用是於發光晶片B的置 放位置處，設計將基板A之絕緣體a 1讓開，即絕緣體A工上 開設槽孔A 1 1，以供發光晶片B直接定位於金屬構成之基板 1297923 A上’這樣就可以將發光晶片B抵貼於金屬基板紅，如此， 發光晶片B於運作時’彳將產生的熱錢由基板A傳導散熱， 以降低其發光晶片B所囤積之熱，惟，上述二件習用高功率發 光晶片之封裝結構於使用時仍具有諸多缺失，例如以基板 (如：銅基板、鋁基板或其他金屬基板等）作為功率晶片之封 裝結構時，其基板A背面無法作為f性導通之導體，且基板八 的使用會使得整體重量較重，體積也無法微小化、元件化，故 無法將此封裝結構應用於表面組裝元件（S u r f a c e(4) On the sex electronic products, such as multi-function computers, mobile phones, digital cameras, and computers, it is also a direct process for miniaturizing and multi-functionalizing the products of the products (four) round wafers (C q B The structure, especially in the case of a light-emitting power chip, as shown in the ninth figure, is a side view of a conventional side view, and it can be clearly seen from the figure that the structure is illuminating "b is positioned on the substrate A (eg: a plate, a plate or a Wei metal substrate, etc., and an insulating layer is placed on the substrate A. Thus, the lead a (4) can be placed on the insulator A ljL of the substrate A, and the wire bi can be made from the light-emitting wafer B. The electrical connection is formed on the conductive segment A 2 of the insulation μ i , and then encapsulated on the above-mentioned illuminating crystal C B and the conductive segment A 2 to form a C Ο B package structure of the light-emitting power chip. However, such a structure still has the disadvantage of high thermal resistance. When the performance of the light-emitting chip B is increased, the relative heat generated by the light-emitting wafer B is also continuously increased, if there is no good heat dissipation method to guide the emission of the emitted light-emitting chip B. In the heat of hoarding, because of The temperature of the crucible will cause electron liberation and thermal stress to occur in the luminescent wafer B, thereby causing a decrease in overall stability and shortening the life of the luminescent wafer 6 itself. Therefore, how to guide the removal of the heat to avoid overheating of the luminescent wafer B is The following structural design, as shown in the tenth figure, is another side view of a conventional one. As can be clearly seen from the figure, another conventional application is to place the substrate A at the placement position of the light-emitting wafer B. The insulator a 1 is opened, that is, the insulator A is provided with a slot A 1 1 for the light-emitting wafer B to be directly positioned on the metal substrate 1297923 A. Thus, the light-emitting wafer B can be abutted against the metal substrate red. When the light-emitting chip B is in operation, the heat generated by the heat-emitting process is conducted by the substrate A to reduce the heat accumulated by the light-emitting chip B. However, the package structure of the two conventional high-power light-emitting chips still has many defects when used. For example, when a substrate (such as a copper substrate, an aluminum substrate, or another metal substrate) is used as the package structure of the power chip, the back surface of the substrate A cannot be used as a conductor for the f-conduction. Use of the substrate will make the overall heavier eight, the volume can not be miniaturized components, so they can not be applied to this surface mount package member (S u r f a c e
Mounted Devices;SMD)上。 疋以針對導熱良好、快速散熱、電熱分離以及將高功率 晶片之C Q B封裝結構細於s MD之組裝結構等考量，即為 從事此產業之相關廠商所亟欲研究改善之方向所在。 【發明内容】 故’根據上述麟技術之諸項缺失，發明人乃針對晶片封 裝之特性’作深入之分析與探討，並經由多方評估及考量，透 過苦心思慮與研發’進㈣鍥而不捨的簡與修改，研發出此 種功率^之封裝製程，_核之結觀計耐尋熱良 好、快速散熱、電熱分離以及可將高功率晶片之c 〇 B封= 構應用於S MD之組裝結構，若树柄率⑼，更可與得金 屬凹杯之光敝射增益效果，·_於轉败光電^ = 1297923 兀件封裝與模組結構 利0 設計之良好效用，適合產業量 產之發明專 本發明之主要目的乃在於功率晶片之封裝製程中，利用金 屬凹杯狀之凹槽肷入結合於電路板表面之對應孔内，並使金 屬凹槽之底部凸出電路板背面，而金屬凹槽所設之開孔則可供 魏板表面之接點露出，以此結構設計，將功率晶片置入凹槽 内j以打線方式使晶片與接點呈電性連接，而後封膠打線， 再將儿成之70件與金屬基板結合’進而將功率晶片運作時所產 生^高熱’透過金細槽而料至基域予以散熱，且晶片若 為向功率發光晶片時，更可透過金屬凹槽得到光源反射之增益 文果凡成此一導熱良好、快速散熱、電熱分離、結構簡單穩 固之功率^難，赌制於轉體及光鼓業之元件封裝 與模組結構設計之良好效用。 【實施方式】 為達成上述目的及製程，本發明所採用之技術手段及其功 效’兹緣®就本發明之實施例詳加制其製程魏如下，俾利 完全瞭解。 本發明所述功率晶片之封裝製程為完整敘述表達乃以高 功率發光晶片為敘述說明之例，但本發明於實際應用時，則並 不以高功率發光晶片為限，請參閱第一、二、三、四、 ^ 1297923 圖所示係為本發明之製造流程圖、較佳實施例之立體分解 圖、於組裝前之側視剖面圖、於組裝時之侧視剖面圖、於組裝 後之側視剖面圖及完成的SMD於基板之側視剖面圖，由圖中 可以清楚看出，本發明所述功率晶片之封裝結構與製程，其詳 細步驟流程如下： 鲁 （A)金屬凹槽製作，先將金屬材質所製成之片材丄加工，成 型為呈凹杯狀之凹槽丄i ’並於金屬凹槽i丄表面設有 一個或一個以上之· 1 2 ’且開孔i 2為對應於電路 板2之接點2 2處； (B)電路板製作，電路板2表面於對應金屬凹槽工丄處開設 有對應孔2 1，且對應孔2 1為符合金屬凹槽弧度而設 计成型，並於電路板2上設有複數可供導線連接之接點 ， 22 ; (c)金屬凹槽與電路板結合，電路板2表面所開設之對應孔 21為提供王凹杯狀之金屬凹槽^丄嵌入結合，並使金 屬凹槽1 1之底部凸出電路板2背面，而電路板2上之 接點2 2則位於金屬凹槽11所設之開孔i 2内； D)曰日片封裝’將功率晶片3置人黏貼於金屬凹槽1 1内， 並利用打線作業將導線3丄由功率晶片3拉至開孔1 2处之接點2 2上形成電性導通，而後封膠於功率晶片 9 1297923 3上，即完成本發明功率晶片之封裝製程。 是以，當金屬片材1於加工成型為呈凹杯狀之金屬凹样工 1後，即可將金屬凹槽i i嵌人結合於魏板2之對魏内 (如第三圖所示），其結合方式可為表面黏著（SMT)、膠片 勒合、液態谬黏合、雙面膠黏合或其他具同等功效之材料盘方 法，使金屬凹槽Η緊密的與電路板2結合，並使電路板2表 面之接點2 2位於金屬凹槽丨！所設之開孔i 2内，如此，便 可將晶片3黏貼於金屬凹槽丄！内（如第四圖所示），並以導 ^ !使神晶片3可與電路板2表面之接點2⑽成電性 連接，而後透過封膠作業即可將功率晶片3及導線3丄予以封 裝（如第五圖所示），進而形成模組化之結構設計。 再者’當底部呈凹杯狀之金屬凹槽丄丄嵌入結合於電路板 • 2表面所開設之對應孔21時，金屬凹槽11底部為凸出電路 板2背面，即可與-基板4結合，而基板4可為銅基板、紹基 板或其他金躲板，其主要於電路板2f面設有複數接點2 3 ’而基板4表面則設有絕緣體4工，以及與電路板2背面接 點2 3相對應之接點4 2，如此，即可將上述封膠完成之功率 晶片SMD與基板4結合’使魏板2 f面之接點2 3盘基板 4表面之接點4 2呈條連接，料如槽U底_抵貼於 基板4之絕緣體4 1讓開位置處（如第六圖所示），於晶片3 運作產生熱量時，便可透過金屬凹槽工工將晶片3所產生且围 1297923 積之高熱傳導至基板4上進行散熱，形成具備導熱良好、快速Mounted Devices; SMD).考 Taking into account the good thermal conductivity, rapid heat dissipation, electrothermal separation, and the C Q B package structure of high-power chips are finer than the assembly structure of s MD, which is the direction for the relevant manufacturers in this industry to research and improve. [Description of the Invention] Therefore, according to the lack of the above-mentioned lining technology, the inventors have conducted in-depth analysis and discussion on the characteristics of the chip package, and through multiple evaluations and considerations, through hard work and development, the research and development of the (four) perseverance Modification, research and development of such power ^ packaging process, _ nuclear junction meter resistance to good heat seeking, rapid heat dissipation, electrothermal separation and high power chip c 〇 B seal = structure applied to the S MD assembly structure, if The rate of the tree stalk (9) can be compared with the light gain effect of the metal concave cup. _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ The main purpose of the invention is that in the packaging process of the power chip, the groove of the metal concave cup is inserted into the corresponding hole of the surface of the circuit board, and the bottom of the metal groove protrudes from the back surface of the circuit board, and the metal groove The opening is provided for the contact of the surface of the Wei board to be exposed. According to the structural design, the power chip is placed in the groove, and the wafer is electrically connected to the contact by the wire bonding method, and the back sealing glue is connected. Combining 70 pieces of the silicon with the metal substrate, and then generating the high heat generated during the operation of the power chip, the material is radiated to the base field to dissipate heat, and if the wafer is a power-emitting wafer, the metal groove is more transparent. The gain of the light source reflection is good. The heat conduction is good, the heat dissipation is fast, the electric heat is separated, and the structure is simple and stable. The power is good, and the gambling is good in the component packaging and module structure design of the rotating body and the photo drum industry. [Embodiment] In order to achieve the above object and process, the technical means and the function of the present invention are described in detail in the embodiment of the present invention, and the process is fully understood. The packaging process of the power chip of the present invention is an example in which the high-power light-emitting chip is described in the full description. However, the present invention is not limited to the high-power light-emitting chip in practical applications, please refer to the first and second. 3, 4, ^ 1297923 The drawings show a manufacturing flow chart of the present invention, a perspective exploded view of a preferred embodiment, a side cross-sectional view before assembly, a side cross-sectional view during assembly, and after assembly. A side cross-sectional view and a side view of the completed SMD on the substrate. It can be clearly seen from the figure that the detailed steps of the package structure and process of the power chip of the present invention are as follows: Lu (A) metal groove fabrication First, the sheet made of metal material is processed into a concave cup-shaped groove 'i ' and one or more 1 2 ' and an opening i 2 are formed on the surface of the metal groove i 丄Corresponding to the contact point 2 2 of the circuit board 2; (B) circuit board fabrication, the surface of the circuit board 2 is provided with a corresponding hole 2 1 at the corresponding metal groove work, and the corresponding hole 2 1 is in conformity with the metal groove curvature Designed and formed on the circuit board 2 The number of contacts for the wire connection, 22; (c) the metal groove is combined with the circuit board, and the corresponding hole 21 formed on the surface of the circuit board 2 is a metal groove provided with a king cup shape, and the metal is embedded and bonded The bottom of the recess 1 1 protrudes from the back of the circuit board 2, and the contact 2 2 on the circuit board 2 is located in the opening i 2 of the metal recess 11; D) the chip package 'position of the power chip 3 The person is adhered to the metal recess 1 1 and is electrically connected to the contact 2 2 at the opening 12 by the power chip 3 by a wire bonding operation, and the post-sealing is applied to the power chip 9 1297923 3 That is, the packaging process of the power chip of the present invention is completed. Therefore, when the metal sheet 1 is formed into a concave cup-shaped metal concave mold 1 , the metal groove ii can be embedded in the Wei Wei 2 (as shown in the third figure). The bonding method may be surface adhesion (SMT), film bonding, liquid enthalpy bonding, double-sided adhesive bonding or other equivalent material disk method, so that the metal groove is tightly combined with the circuit board 2, and the circuit is The contact 2 2 on the surface of the board 2 is located in the metal groove 丨! In the opening i 2 provided, the wafer 3 can be adhered to the metal recess 丄! Inside (as shown in the fourth figure), and so that the god chip 3 can be electrically connected to the contact 2 (10) on the surface of the circuit board 2, and then the power chip 3 and the wire 3 can be given through the sealing operation. The package (as shown in Figure 5) forms a modular design. Furthermore, when the metal recessed groove having a concave cup shape at the bottom is embedded in the corresponding hole 21 formed on the surface of the circuit board 2, the bottom of the metal groove 11 is protruded from the back surface of the circuit board 2, that is, the substrate 4 In combination, the substrate 4 can be a copper substrate, a substrate or other gold slab, which is mainly provided with a plurality of contacts 2 3 ' on the surface of the circuit board 2f and an insulator 4 on the surface of the substrate 4, and the back of the circuit board 2 The contact point 2 3 corresponds to the contact 4 2, so that the sealed power chip SMD can be combined with the substrate 4 to make the contact of the surface of the board 2 2 the surface of the substrate 4 4 4 Connected in strips, such as the groove U bottom _ abutting against the insulator 4 1 of the substrate 4 at the release position (as shown in the sixth figure), when the wafer 3 operates to generate heat, the wafer can be processed through the metal groove The high heat generated by the 3 and the 1297923 product is transmitted to the substrate 4 for heat dissipation, and the heat conduction is good and fast.
S 散熱、電熱分離以及將高功率晶片之c 〇 B封裝結構應用於 MD之組裝結構等應用上之優越設計。 此外上述之孟屬片1可為銅、鎳、銘或其他金屬、金屬 合金等材料所製成’且金屬_孔1 2射利用機械S heat dissipation, electrothermal separation, and the superior design of the high power chip c 〇 B package structure for applications such as MD assembly structures. In addition, the above-mentioned Mengzi piece 1 can be made of copper, nickel, Ming or other metals, metal alloys, etc. and the metal_hole 1 2 shot using machinery
冲[細KNC加工等方法來成型為各種幾何形狀 之外型’並使開孔i 2之開斷面延伸至金屬凹槽工工上緣（如 第二圖所示），以利功率晶片3打線作業，此外，金屬片工於 加工成型後’另於表面以化學處理或電鱗理_成金屬光 澤’若功率晶片3為高功率發光晶片，即可透過金屬凹槽工工 將力率s 0 >ί 3所產生之統相反射，得到賴反射之增益效 果，進而獲得提升光源效率之效用。Roughing [fine KNC processing and other methods to form various geometric shapes] and extending the open section of the opening i 2 to the upper edge of the metal groove work (as shown in the second figure) to facilitate the power chip 3 Wire-laying operation, in addition, the metal sheet work after processing, and the surface is chemically treated or electrically squashed to a metallic luster. If the power chip 3 is a high-power light-emitting chip, the force can be transmitted through the metal groove. 0 > ί 3 produces a unified phase reflection, which obtains the gain effect of the ray reflection, thereby obtaining the effect of improving the efficiency of the light source.
請參閱第七_示，縣本發縣再—触實施例之側視 剖面圖，由圖中可清楚看出，本發明之金屬凹槽工工可進一步 於表面周緣向上延伸設計產生阻膠邊13，於晶片3灌膠時， 可透過阻膠邊1 3來防止溢膠，以翻晶；1封膠時之便利性。 請繼續參閱第所示，係為本㈣又—較佳實施例之側 視j面圖㈣中可清楚看出，本發明之封裝結構可視使用者 的需求或設計的不咖於金屬凹槽1 1㈣放有-個或-個 以上之功率晶片3 ’並依電路板2與晶片3對應之接點2 2， 而可於金屬凹槽1 1上開設有複數相對應之開孔12;另，金 11 1297923 2^11可依光學反射、熱傳導錢械强度 ::r:形狀之外型’即可使本發明之封裝結構依使用=: :成夕日日、多電極或不同_卜型之封裝，故可有效择加 ^之義侧，舉凡可達成前述效果之形❻應受本_ 修飾及等效結構變化，均應同理包含於本創 作之專利乾圍内，合予陳明。Please refer to the seventh section, a side view of the embodiment of the county, and the metal groove of the present invention can be further extended on the periphery of the surface to produce a rubber-resistant edge. 13, when the wafer 3 is filled with glue, it can be prevented from overflowing through the rubber edge 13 to turn the crystal; 1 is convenient for sealing. Continuing to refer to the above description, it can be clearly seen from the side view (4) of the preferred embodiment that the package structure of the present invention can be used in accordance with the needs of the user or the design of the metal groove 1 1 (4) having one or more power chips 3' and depending on the contacts 2 2 of the circuit board 2 and the wafer 3, and the plurality of corresponding openings 12 may be formed in the metal recesses 1 1; Gold 11 1297923 2^11 can be used according to the optical reflection, heat conduction, and mechanical strength::r: shape shape can make the package structure of the present invention use::: day, day, multi-electrode or different type of package Therefore, it is possible to effectively add the right side of the ^, and the shape that can achieve the above-mentioned effects should be subject to the modification of the _ and the equivalent structure, and should be included in the patent shack of the creation and be combined with Chen Ming.
w，可解決習用 本發明之結構設計⑩醉，其底輕凹她之金屬凹槽 y可依使用需求而設計成各種幾何外型，並將金屬凹槽U 甘欠入結合於電路板2表面之對應孔2工内，使金屬凹槽U底 部凸出電路板2背面，而金屬凹槽工工所設之開孔i 2則可供 • 電路板2表面之接點2 2露出，如此，即可將晶片3置入凹槽 ^内，並以打線作業使晶片3與接點2 2呈電性連接，而^ 封膠於曰曰片3上’以此結構設計，即可將上述封膠完成之功率 晶片SMD與基板4結合，進而將晶片3運作時所產生之高熱 透過金屬凹槽1 1而料至基板4處抑散熱，且晶片若為高 功率發光晶片時，更可透過金屬凹槽得到光源反射之增益效 果’元成此-導熱良好、快速散熱、電熱分離、結構簡單穩固 之功率晶片封震，具備應用於半_及光電產業之元件封裝與 模組結構設計之良好效用。 12 1297923 上述詳細綱為針對本創作-鎌佳之可行實施例說明 而已’惟該實補並_以限定本_之申請專利細，凡盆 它未脫離賴作_示之技藝精神下所完紅鱗變化與修 飾變更，均應包含於本創作所涵蓋之專纖圍巾。 / 綜上所述’本發明功率晶片之封裝製程於實際應用上，確 實能達到其功效及目的，故本發明誠為一實用性優異之發明， 為符合發明專利之巾請要件，纽法提Μ請嘴貴大審委 早曰賜准本案’以贿發明人之發·益，倘若肖局大審委 有任何稽疑’請不吝來函指正，發明人定當竭力配合，實感德 {更。 一“ 1297923 【圖式簡單說明】 第一圖係為本發明之製造流程圖。 第一圖係為本發明較佳實施例之立體分解圖。 第二圖係為本發明較佳實施例於組裝前之側視剖面圖。 第四圖係為本發明較佳實施例於組裝時之侧視剖面圖。w, can solve the conventional design of the present invention 10 drunk, the bottom of the concave metal groove y can be designed according to the needs of various geometric shapes, and the metal groove U is owed to the surface of the circuit board 2 Corresponding to the hole 2, the bottom of the metal groove U protrudes from the back of the circuit board 2, and the opening i 2 provided by the metal groove work is provided for the contact 2 2 of the surface of the circuit board 2 to be exposed. The wafer 3 can be placed in the recess ^, and the wafer 3 is electrically connected to the contact 2 2 by wire bonding, and the sealant is mounted on the cymbal 3'. The glued power chip SMD is combined with the substrate 4, so that the high heat generated during the operation of the wafer 3 is transmitted through the metal recess 11 to the substrate 4 to dissipate heat, and if the wafer is a high-power light-emitting chip, the metal is more permeable to metal. The groove obtains the gain effect of the light source reflection. The energy is good, the heat dissipation is fast, the electric heat is separated, and the structure is simple and stable. The power chip is sealed and has good utility for component packaging and module structure design in the semi- and optoelectronic industries. . 12 1297923 The above detailed outline is for the description of the feasible embodiment of this creation - 镰佳, but it is only the actual compensation and _ to limit the patent application of this _, the basin is not out of the technical spirit of the _ shows the red scale Changes and modifications should be included in the special fiber scarf covered by this creation. In summary, the packaging process of the power chip of the present invention can achieve its efficacy and purpose in practical applications. Therefore, the present invention is an invention with excellent practicability, and is a request for the invention patent towel, New Fati I would like to ask the big auditor to give the case as early as possible. In order to bribe the inventor's hair and benefits, if the Xiaohui Grand Auditor has any doubts, please do not hesitate to correct the letter, the inventor will try his best to cooperate, and the real sense is {more. BRIEF DESCRIPTION OF THE DRAWINGS The first drawing is a perspective view of a manufacturing process of the present invention. The first drawing is an exploded perspective view of a preferred embodiment of the present invention. The front side is a side cross-sectional view of the preferred embodiment of the present invention.
第五圖 第六圖 第七圖 第八圖 第九圖 第十圖 係為本發明較佳實補於組裝後之舰剖面圖。 係為本發曝佳實補S MD於基板之舰剖面圖。 係為本發明再—較佳實施例之側視剖面圖。 係為本發明又—較佳實施例之立體外觀圖。 係為習用之側視剖面圖。 係為另一習用之側視剖面圖。The fifth figure The sixth figure The seventh figure The eighth figure The ninth figure The tenth figure is a sectional view of the ship which is better complemented by the invention. This is a cross-sectional view of the ship with the SMD on the substrate. This is a side cross-sectional view of a preferred embodiment of the invention. It is a perspective view of the preferred embodiment of the present invention. It is a side view of the profile. It is a side view of another conventional use.
號說明】 13、阻膠邊 【主要元件符 1、片材 1 1、金屬凹槽 1 2、開孔 2 '電路板 對應孔 接點 、功率晶片 14 1297923 1、導線 4、基板 4 1、絕緣體 4 2、接點 A、基板 A 1、絕緣體 A 1 1、槽孔 A2、導電區段 B、發光晶片 B 1、導線 15No. Description] 13. Resistive edge [main component 1, sheet 1 1 , metal groove 1 2, opening 2 'circuit board corresponding hole contact, power chip 14 1297923 1 , wire 4, substrate 4 1 , insulator 4, contact A, substrate A 1, insulator A 1 1, slot A2, conductive section B, light-emitting chip B 1, wire 15
Claims (1)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW095112872A TW200739763A (en) | 2006-04-11 | 2006-04-11 | Packaging process of power chips |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW095112872A TW200739763A (en) | 2006-04-11 | 2006-04-11 | Packaging process of power chips |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TW200739763A TW200739763A (en) | 2007-10-16 |
| TWI297923B true TWI297923B (en) | 2008-06-11 |
Family
ID=45069239
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW095112872A TW200739763A (en) | 2006-04-11 | 2006-04-11 | Packaging process of power chips |
Country Status (1)
| Country | Link |
|---|---|
| TW (1) | TW200739763A (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI455376B (en) * | 2010-04-15 | 2014-10-01 | I Chiun Precision Ind Co Ltd | Method for producing electro-thermal separation type light emitting diode support structure |
| CN113130467B (en) * | 2021-04-12 | 2022-10-18 | 深圳市科彤科技有限公司 | COB display panel with automatically adjusted contrast |
| TW202407897A (en) * | 2022-08-04 | 2024-02-16 | 創世電股份有限公司 | Semiconductor power device |
-
2006
- 2006-04-11 TW TW095112872A patent/TW200739763A/en unknown
Also Published As
| Publication number | Publication date |
|---|---|
| TW200739763A (en) | 2007-10-16 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| TW201212297A (en) | Power surface mount light emitting die package | |
| TW200807774A (en) | Cooling device for light emitting diode (LED) module and method for fabricating the same | |
| TW201246636A (en) | Flexible LED device and method of making | |
| JP4910220B1 (en) | LED module device and manufacturing method thereof | |
| JP2012099540A (en) | Wiring board and method of manufacturing the same, and electronic device | |
| TW200814362A (en) | Light-emitting diode device with high heat dissipation property | |
| JP2007180227A (en) | Optical semiconductor device and its manufacturing method | |
| TW200805525A (en) | Flexible circuit substrate for flip-chip-on-flex applications | |
| JP2015518663A (en) | Element carrier, electronic device and method of manufacturing radiation device, and element carrier, electronic device and radiation device | |
| TW201238092A (en) | Low cost encapsulated light emitting device | |
| US7777246B2 (en) | Light emitting diode with inorganic bonding material formed within | |
| TW201017921A (en) | Compound semiconductor device package module structure and fabricating method thereof | |
| TW200820385A (en) | Semiconductor device and method for making the same | |
| CN101064260A (en) | Package manufacture process for power chip | |
| TWI297923B (en) | ||
| JP2012015225A (en) | Semiconductor device | |
| TW200529709A (en) | PCB mounted a radiator and LED package using the PCB and method manufacturing them | |
| TWI235511B (en) | Method of manufacturing light emitting diode package and structure of the same | |
| TWI761864B (en) | Chip scale package structure with heat-dissipating type | |
| JP2005191135A (en) | Semiconductor package | |
| JP5062583B2 (en) | Package for electronic components | |
| US20080290378A1 (en) | Transistor package with wafer level dielectric isolation | |
| TWM610405U (en) | Semiconductor device and semiconductor device packaging structure including the same | |
| JP2015038902A (en) | Led module device and manufacturing method of the same | |
| JP2011199066A (en) | Light emitting component, light emitting device, and method for manufacturing the light emitting component |