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KR970057703A - Memory device of PDP TV - Google Patents

Memory device of PDP TV Download PDF

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Publication number
KR970057703A
KR970057703A KR1019950060943A KR19950060943A KR970057703A KR 970057703 A KR970057703 A KR 970057703A KR 1019950060943 A KR1019950060943 A KR 1019950060943A KR 19950060943 A KR19950060943 A KR 19950060943A KR 970057703 A KR970057703 A KR 970057703A
Authority
KR
South Korea
Prior art keywords
field
image data
control signal
generating means
address
Prior art date
Application number
KR1019950060943A
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Korean (ko)
Other versions
KR100197362B1 (en
Inventor
박원정
Original Assignee
배순훈
대우전자 주식회사
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Priority to KR1019950060943A priority Critical patent/KR100197362B1/en
Publication of KR970057703A publication Critical patent/KR970057703A/en
Application granted granted Critical
Publication of KR100197362B1 publication Critical patent/KR100197362B1/en

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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/76Television signal recording
    • H04N5/907Television signal recording using static stores, e.g. storage tubes or semiconductor memories
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/28Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00Command of the display device
    • G09G2310/02Addressing, scanning or driving the display screen or processing steps related thereto

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Plasma & Fusion (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Controls And Circuits For Display Device (AREA)

Abstract

본 발명은 피디피 티브이(PDP TV)의 메모리 장치에 관한 것으로, 영상데이타의 연속성을 위해 네 개의 필드 메모리가 구비되어, 데이타 처리부로부터 제공되는 영상데이타 중에 기수필드의 영상데이타와 우수필드의 영상데이타가 기수필드 메모리와 우수필드 메모리에 서로 배타적으로 기록 및 판독되고, 제1 선택부와 제2 선택부를 통해 기수필드의 영상데이타와 우수필드의 영상데이타가 두 라인씩 동시에 PDP TV로 어드레싱되므로써, 영상데이타의 기록과 판독을 고속으로 수행할 수 있을 뿐만 아니라, 어드레싱시간을 단축할 수 있도록 한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a memory device of a PDP TV, wherein four field memories are provided for continuity of image data, and among the image data provided from the data processing unit, the image data of the radix field and the image field of the even field are provided. The data is recorded and read exclusively in the odd field memory and the even field memory, and image data of the odd field and the excellent field are simultaneously addressed to the PDP TV by two lines through the first and second selection units. Not only can the recording and reading be performed at high speed, but also the addressing time can be shortened.

Description

피디피 티브이(PDP TV)의 메모리 장치Memory device of PDP TV

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도는 본 발명의 바람직한 실시예에 따른 PDP TV의 메모리 장치에 대한 개략적인 블럭구성도.1 is a schematic block diagram of a memory device of a PDP TV according to a preferred embodiment of the present invention.

Claims (1)

방송국으로부터 전송되는 복합영상신호를 저장한 다음 PDP 구동회로로 제공하는 메모리 장치에 있어서, 상기 복합영상신호 중에 포함되어 있는 수평동기신호와 수직동기신호를 기준으로 영상데이타를 기록하기 위한 제어신호, 기록된 영상데이타를 판독하기 위한 제어신호, 기록모드 및 판독모드를 선택하기 위한 모드선택신호 및 영상데이타를 선택하기 위한 선택신호를 발생하는 제어신호 발생수단(110); 상기 제어신호 발생수단(110)으로부터의 기록 및 판독을 위한 제어신호에 의거하여 기수필드의 영상데이타를 기록 및 판독하기 위한 어드레스를 발생하는 기수필드 어드레스 발생수단(120); 상기 제어신호 발생수단(110)으로부터의 기록 및 판독을 위한 제어신호에 의거하여 우수필드의 영상데이타를 기록 및 판독하기 위한 어드레스를 발생하는 우수필드 어드레스 발생수단(130); 상기 영상데이타 중에서 기수필드의 영상데이타를 상기 기수필드 어드레스 발생수단(120)으로부터 제공되는 기록 어드레스에 의거하여 기록하고, 상기 기수필드 어드레스 발생수단(120)으로부터의 판독 어드레스에 상응하여 상기 기록된 기수필드의 영상데이타를 판독하는 제1 및 제2 기수필드 메모리(140, 145); 상기 영상데이타 중에 우수필드의 영상데이타를 상기 우수필드 어드레스 발생수단(130)으로부터 제공되는 기록 어드레스에 의거하여 기록하고, 상기 우수필드 어드레스 발생수단(130)으로부터의 판독 어드레스에 상응하여 상기 기록된 우수필드의 영상데이타를 판독하는 제1 및 제2 우수필드 메모리(150, 155); 상기 제어신호 발생수단(110)으로부터의 선택을 위한 제어신호에 의거하여 상기 제1 및 제2 기수필드 메모리(140, 145)로부터 제공되는 상기 기수필드의 영상데이타를 선택하기 위한 제1 선택수단(160); 상기 제어신호 발생수단(110)으로부터의 선택을 위한 제어신호에 의거하여 상기 제1 및 제2우수필드 메모리(150, 155)로부터 제공되는 상기 우수필드의 영상데이타를 선택하기 위한 제2 선택수단(165); 상기 제1 및 제2 선택수단(160, 165)을 통해 선택적으로 제공되는 상기 기수필드의 영상데이타와 상기 우수필드의 영상데이타를 상기 PDP TV로 동시에 두 라인씩 어드레싱하기 위한 어드레싱수단(170)으로 구성된 것을 특징으로 하는 피디피 티브이(PDP TV)의 메모리 장치.A memory device for storing a composite video signal transmitted from a broadcasting station and then providing the composite video signal to a PDP driving circuit, comprising: a control signal for recording image data based on a horizontal sync signal and a vertical sync signal included in the composite video signal; Control signal generating means (110) for generating a control signal for reading the image data, a mode selection signal for selecting the recording mode and the reading mode, and a selection signal for selecting the image data; Radix field address generating means (120) for generating an address for recording and reading image data of the radix field on the basis of a control signal for recording and reading from the control signal generating means (110); Storm field address generating means (130) for generating an address for recording and reading image data of storm field based on a control signal for recording and reading from said control signal generating means (110); The image data of the radix field among the image data is recorded on the basis of the recording address provided from the radix field address generating means 120, and the recorded radix corresponding to the read address from the radix field address generating means 120. First and second odd field memories 140 and 145 for reading image data of a field; The image data of the even field among the image data is recorded based on the write address provided from the even field address generating means 130, and the recorded even rain corresponding to the read address from the even field address generating means 130. First and second even field memories 150 and 155 for reading image data of a field; First selecting means for selecting image data of the radix field provided from the first and second radix field memories 140 and 145 based on a control signal for selecting from the control signal generating means 110 ( 160); Second selection means for selecting image data of the even field provided from the first and second superior field memories 150 and 155 based on a control signal for selection from the control signal generating means 110 ( 165); Addressing means 170 for addressing the video data of the radix field and the even field, optionally provided through the first and second selection means 160 and 165, simultaneously by two lines to the PDP TV. A memory device of a PDP TV, characterized in that configured. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950060943A 1995-12-28 1995-12-28 Memory in plasma display panel television KR100197362B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950060943A KR100197362B1 (en) 1995-12-28 1995-12-28 Memory in plasma display panel television

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950060943A KR100197362B1 (en) 1995-12-28 1995-12-28 Memory in plasma display panel television

Publications (2)

Publication Number Publication Date
KR970057703A true KR970057703A (en) 1997-07-31
KR100197362B1 KR100197362B1 (en) 1999-06-15

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KR1019950060943A KR100197362B1 (en) 1995-12-28 1995-12-28 Memory in plasma display panel television

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Publication number Publication date
KR100197362B1 (en) 1999-06-15

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