KR20060069999A - Overlay measurement method - Google Patents

Abstract

The method for measuring a semiconductor interlayer overlay includes forming a first mother and a second mother having different heights on the semiconductor substrate, forming a film on the first mother and the second mother, and then forming the first mother and the second mother. Form a sonus for interlayer overlay measurements on the film in the formed region. The first mother, the second mother and the son are obtained simultaneously using different focusing levels, and then the interlayer overlay is measured using the signal.

Description

Overlay measuring method {Method for measuring overlay}

1 is a plan view illustrating an overlay mark used in overlay measurement.

FIG. 2 is a cross-sectional view of the overlay mark of FIG. 1 taken along line II-II ′. FIG.

3 is a plan view illustrating another overlay mark used in overlay measurement.

4 to 7 are diagrams for explaining the overlay measurement method according to an embodiment of the present invention.

Explanation of symbols on the main parts of the drawings

100: overlay mark 105: semiconductor substrate

110: first mother 120: second mother

125: insulating film 130: son

200: overlay mark 210: first mother

220: the second mother 230: son

The present invention relates to an overlay measurement method, and more particularly, to an overlay measurement method for measuring the degree of alignment between each layer in a semiconductor substrate in which a plurality of layers are formed in sequence.

In general, a semiconductor device includes a Fab process for forming an electrical circuit including electrical devices on a silicon substrate used as a semiconductor substrate, and an EDS (electrical) for inspecting electrical characteristics of semiconductor devices formed in the fab process. die sorting) and a package assembly process for encapsulating and individualizing the semiconductor devices with an epoxy resin.

The fab process includes a deposition process for forming a film on a substrate, a chemical mechanical polishing process for planarizing the film, a photolithography process for forming a photoresist pattern on the film, and the photoresist pattern using the photoresist pattern. An etching process for forming the film into a pattern having electrical characteristics, an ion implantation process for implanting specific ions into a predetermined region of the substrate, a cleaning process for removing impurities on the substrate, and a substrate having the film or pattern formed thereon Inspection process for inspecting the surface;

The above processes are repeated to form a plurality of layers on the substrate. Therefore, the semiconductor device has a multilayer structure composed of a plurality of layers. As the degree of integration of a semiconductor device having such a multilayer structure increases, the minimum line width of the fine pattern required for the manufacturing process becomes smaller. As a result, when these fine patterns are connected to each other, the accuracy of the overlay, i.e., the accuracy of the alignment between a specific layer and another layer formed on or underneath, is greatly required.

In the manufacturing process of a semiconductor device consisting of a thin film of a multi-layer structure and various patterns, a photographic process for forming an upper layer in a subsequent process must satisfy an overlay specification with a previously formed lower layer. In particular, it may be necessary to simultaneously align two previously formed lower layers when forming a layer in a subsequent process. In a plurality of different underlayers, overlay marks of the respective layers exist to have a step height from each other.

Conventionally, dual focus grabs are used to align two lower layers simultaneously as described above. Since the dual focus grab has two focus levels, signals are detected by scanning with different focus levels of two mothers of the lower layer and one son of the upper layer. However, since the two mothers have steps, it is difficult to detect an accurate signal with one focus level. Therefore, a signal is detected using the position between the two mothers as the focus level or a signal is detected using one mother as the focus level and corrected. However, since the two mothers eventually detect a signal by scanning at one focus level, the overlay may be read incorrectly due to the defocus effect.

Meanwhile, using the dual focus grab, one of the two mothers of the lower layer and the son of the upper layer are scanned at different poker tm levels to obtain a signal, and the other mothers of the lower layer and the son of the upper layer are again focused differently. The signal can be obtained by scanning at the level. In this case, since the misalignment between the lower layers and the upper layer has to be measured separately, there is a problem that takes a lot of time.

That is, in the semiconductor device having an overlay mark according to the prior art, when measuring misalignment between thin films of a multilayer structure, the measurement point is changed, and thus the accuracy of the measurement is lowered. There is a disadvantage in that productivity is decreased due to a long time for measuring alignment.

An object of the present invention for solving the above problems is to provide an overlay measuring method that can be quickly and accurately check the alignment between the two mothers and the son of the upper layer formed on each of the two lower layers each having a step.

In order to achieve the object of the present invention, the present invention provides an overlay measuring method according to a preferred embodiment. The overlay measuring method first forms a first mother and a second mother for the interlayer overlay measurement with steps on each other on the semiconductor substrate. After forming a film on top of the first and second mothers, a sonus for interlayer overlay measurement is formed on the film in the region where the first and second mothers are formed. Thereafter, the first mother, the second mother and the son are simultaneously scanned to obtain a signal, and the interlayer overlay is measured using the signal.

In the overlay measurement method, a signal is obtained by scanning the first mother, the second mother and the son at different focus levels.

In the overlay measurement method according to the present invention configured as described above, the first mother and the second mother of the lower layer and the son of the upper layer simultaneously obtain signals at different focus levels and measure the overlay by using the signal to measure the overlay. The time required for the overlay measurement can be reduced accurately.

Hereinafter, an overfp measuring method according to a preferred embodiment of the present invention will be described in detail with reference to the accompanying drawings.

1 is a plan view illustrating an overlay mark used in overlay measurement according to an exemplary embodiment of the present invention, and FIG. 2 is a cross-sectional view of the overlay mark of FIG. 1 taken along line II-II '.

1 and 2, the overlay mark 100 includes a first mother 110 and a second mother 120 in the lower layer, and an insulator 130 in the upper layer.

Specifically, the first mother 110 is formed in the scribe lane region on the semiconductor substrate 105. The first mother 110 is a square stripe-shaped pattern.

The second mother 120 is formed in the scribe lane region on the semiconductor substrate 105 and is formed inside the first mother 110. The second mother 120 is a rectangular band-shaped pattern. The second mother 120 is formed inside the first mother 110 having a rectangular band shape.

The first mother 110 and the second mother 120 are formed to have a step with each other. In detail, the first mother 110 and the second mother 120 may be formed to have different heights on the same layer, respectively, and may have steps. In addition, the first mother 110 and the second mother 120 may be formed on different layers, respectively, and may have a step difference from each other.                     

Hereinafter, only the case where the first mother 110 and the second mother 120 are formed to have a step with each other on the same layer will be described.

In addition, in order to use the misalignment between layers in the manufacturing process of the semiconductor device, the son 130 is formed on the first mother 110 and the second mother 120. The son 130 is also a rectangular band-shaped pattern. The sonja 130 is formed to have a smaller size than the size of the first mother 110 and the second mother 120. Specifically, the sonja 130 is located in the upper portion of the inside of the second mother (120). In addition, the son 130 is a photoresist pattern.

3 is a plan view illustrating another overlay mark used in overlay measurement.

Referring to FIG. 3, the overlay mark 200 includes a first mother 210, a second mother 220 and a son 230 formed in a bar-shaped pattern. The first mother 210 and the second mother 220 are provided in the lower layer, the son 230 is provided in the upper layer.

The first mother 210 is a pattern in the form of at least two bars arranged in the X-axis or the Y-axis direction, and the second mother 220 is the X-axis in which the first mother 210 is not arranged. At least two bar-shaped patterns arranged in the Y-axis direction. That is, when the first mother 210 is arranged in the X-axis direction, the second mother 220 is arranged in the Y-axis direction, and the second mother when the first mother 210 is arranged in the Y-axis direction. 220 is arranged in the X-axis direction. The first mother 210 and the second mother 220 are gathered to form one roughly rectangular band.                     

The sonja 230 is a pattern of at least two bars arranged in the X-axis and Y-axis directions, respectively. The son 230 forms an approximately rectangular band shape. The sonja 230 is formed on the upper layer of the layer on which the first mother 210 and the second mother 210 are formed. The sonja 230 is positioned on the upper part of the inside of the first mother 210 and the second mother 210 forming an approximately square stripe to form a square stripe.

4 to 7 are diagrams for explaining the overlay measurement method according to an embodiment of the present invention.

In the overlay measurement method, the process of forming the overlay mark illustrated in FIGS. 1 and 2 and the process of forming the overlay mark illustrated in FIG. 3 are substantially the same except for the shape of the overlay mark. Therefore, the overlay measurement method will be described including the process of forming the overlay mark shown in FIG. 1 and FIG.

Referring to FIG. 4, one layer (not shown) made of a single layer or a multilayer thin film required for element formation is formed on the semiconductor substrate 105. Thereafter, the first mother layer 110 is formed in the scribe lane region of the semiconductor substrate 105 by patterning by a photolithography process. As shown in FIG. 2, the first mother 110 is formed in a square stripe pattern having a mesa shape in cross section.

Referring to FIG. 5, a second layer (not shown) including a single layer or a multi-layered thin film for forming an element is formed on a semiconductor substrate on which the first mother 110 is formed. Subsequently, this is patterned by a photolithography process to form the second mother 120 in the first mother 110. As shown in FIG. 3, the second mother part 120 has a mesa-shaped square stripe-shaped pattern.

In addition, the second mother 120 is formed to have a step between the first mother 110. That is, the distance A between the surface of the semiconductor substrate 105 and the upper surface of the first mother 110 and the distance between the surface of the semiconductor substrate 105 and the upper surface of the second mother 120 (B) is different. As the step between the first mother 110 and the second mother 120 becomes larger, it is difficult to accurately obtain the signals of the first mother 110 and the second mother 120 simultaneously using one focus level.

Referring to FIG. 6, a single layer 125 including a single layer or a multi-layered thin film for forming an element is formed on a semiconductor substrate 105 on which the first and second mother layers 110 and 120 are formed. The film 125 is preferably an insulating film. In addition, the upper surface of the film 125 is formed to be flat by a chemical mechanical polishing process or the like.

In addition, after the photoresist is applied on the film 125, the photoresist is patterned by the photolithography process to form the insulator 130 to be positioned inside the second mother 120. The son 130 is a photoresist pattern and has a mesa-shaped rectangular band shape as shown in FIG. 1.

As a result, a plurality of overlay marks 100 are formed at the same position so that misalignment between the thin films of the multi-layer structure can be measured and used for correction.

Referring to FIG. 7, a signal of the overlay mark 100 is scanned by scanning the overlay mark 100, that is, the first mother 110, the second mother 120, and the son 130 at different focus levels. Get In this case, a signal of the overlay mark 100 is obtained by using a triple focus grab having three focus levels.

Since the triple focus grab has three focus levels, a signal may be obtained by simultaneously scanning the first mother 110, the second mother 120, and the son 130. In addition, different focusing levels F1, F2, and F3 may be applied to the first mother 110, the second mother 120, and the son 130. Therefore, each of the first mother 110, the second mother 120, and the son 130 may obtain a signal of the overlay mark 100 that is accurate.

The interlayer overlay is measured using the signal of the overlay mark 100.

Specifically, the center marks of the X and Y axes of the first mother 110 are obtained using the overlay mark 100 signal. Next, the center values of the X and Y axes of the second mother 120 are obtained. In addition, the center values of the X and Y axes of the son 130 are obtained. Then, the degree of misalignment is measured by comparing the center values of the X-axis and the Y-axis of the son 130 and the centers of the X-axis and the Y-axis of the first and second mothers 110 and 120.

As described above, since the present invention obtains a signal by scanning the first mother 110, the second mother 120, and the son 130 constituting the overlay mark at different focusing levels F1, F2, and F3. Even if the first mother 110 and the second mother 120 have a large step, accurate signals can be obtained by different focuses.

As described above, in the overlay measuring method according to the preferred embodiment of the present invention, a signal is obtained by scanning the first mother and the second mother having a step with different focusing levels, and the son also has a focusing level different from the focusing level. Scan to get the signal. Therefore, the signal of the overlay mark composed of the first mother, the second mother and the son can be accurately obtained at once.

Therefore, since the present invention obtains the signal of the overlay mark by using the triple focus grab having different focus levels, it is possible to obtain an accurate signal at once even when the first and second mothers have a large step. This greatly improves the accuracy of overlay measurements.

While the foregoing has been described with reference to preferred embodiments of the present invention, those skilled in the art will be able to variously modify and change the present invention without departing from the spirit and scope of the invention as set forth in the claims below. It will be appreciated.

Claims (4)

Forming a first mother and a second mother having steps on each other on the semiconductor substrate for interlayer overlay measurements; Forming a film on top of the first and second mothers; Forming an insulator for interlayer overlay measurement on the film in the region where the first and second mothers are formed; Simultaneously scanning the first mother, the second mother and the son to obtain a signal; And Measuring an interlayer overlay using the signal. The overlay measurement method of claim 1, wherein in the obtaining of the signal, a signal is obtained by scanning the first mother, the second mother, and the son at different focus levels. The method of claim 1, wherein in the forming of the first and second mothers, the first and second mothers are formed on the same layer. The method of claim 1, wherein the forming of the first and second mothers comprises forming the first and second mothers in different layers.

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