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KR20040086133A - 반도체장치 - Google Patents

반도체장치 Download PDF

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Publication number
KR20040086133A
KR20040086133A KR1020030086761A KR20030086761A KR20040086133A KR 20040086133 A KR20040086133 A KR 20040086133A KR 1020030086761 A KR1020030086761 A KR 1020030086761A KR 20030086761 A KR20030086761 A KR 20030086761A KR 20040086133 A KR20040086133 A KR 20040086133A
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South Korea
Prior art keywords
semiconductor
semiconductor device
semiconductor elements
stacked
semiconductor element
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KR1020030086761A
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English (en)
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와키야마사토루
하라다코조
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가부시끼가이샤 르네사스 테크놀로지
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Publication of KR20040086133A publication Critical patent/KR20040086133A/ko

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Abstract

적층된 복수의 반도체소자를 갖는 반도체장치에 있어서, 반도체소자의 동작시의 발열에 대하여, 높은 방열성을 갖게 한다. 적층된 복수의 반도체소자(2)와, 각 반도체소자 사이에 설치된 고흡수성 수지막(3)을 갖는다. 여기서, 고흡수성 수지막(3)은, 물 또는 저비점의 유기용매를 포함하고 있는 것이 바람직하다. 혹은, 고흡수성 수지막은, 땜납의 리플로 온도 이상의 비점을 갖는 유기용매를 포함하고 있는, 또는, 실장 후에 포함하게 하는 것도 좋다.

Description

반도체장치{SEMICONDUCTOR DEVICE}
본 발명은, 적층된 복수의 반도체소자를 갖는 반도체장치에 관한 것이다.
실장면적의 감소를 목적으로서, 3차원 구조의 실장모듈 등, 복수의 반도체소자를 적층 또는 밀집시킨 반도체장치가 개발되고 있다. 특히, 복수의 반도체소자를 적층한 경우는, 반도체소자 집적화에 대하여 매우 유리하다.
그러나, 복수의 반도체소자를 적층한 경우, 각 반도체소자의 간격이 좁아지기 때문에, 반도체소자의 동작시의 발열에 대하여, 방열효율이 나쁘다는 문제가 있다. 특히, 적층된 복수의 반도체소자 중, 표면과 이면이 외기와 접촉하고 있지 않은 중앙부분의 반도체소자의 방열효율이 나쁘다.
본 발명은, 전술한 바와 같은 과제를 해결하기 위해 주어진 것으로, 그 목적은, 적층된 복수의 반도체소자를 갖는 반도체장치에 있어서, 높은 방열성을 갖게 한다는 것이다.
도 1은 본 발명의 실시예 1에서의 반도체장치를 나타내는 설명도이다.
도 2는 본 발명의 실시예 2에서의 반도체장치를 나타내는 설명도이다.
도 3은 본 발명의 실시예 3에서의 반도체장치를 나타내는 설명도이다.
도 4는 본 발명의 실시예 4에서의 반도체장치를 나타내는 설명도이다.
도 5는 본 발명의 실시예 5에서의 반도체장치를 나타내는 설명도이다.
*도면의 주요부분에 대한 부호의 설명*
2 : 반도체소자 3 : 고흡수성 수지막
6 : 인너범프 11 : 히트싱크
12 : 도전성 수지막 15 : 금속판
16 : 개구부
본 발명에 관한 반도체장치는, 적층된 복수의 반도체소자와, 각 반도체소자 사이에 설치된 고흡수성 수지막을 갖는다. 본 발명의 그 밖의 특징은 이하에 밝힌다.
[발명의 실시예]
(실시예 1)
도 1은 본 발명의 실시예 1에서의 반도체장치를 나타내는 단면도이다. 이 반도체장치는, 도 1에 나타내는 바와 같이, 기판(1) 상에 복수의 반도체소자(2)가 적층되어 있다. 그리고, 각 반도체소자(2) 사이에는, 고흡수성 수지막(3)이 설치되어 있다. 이 고흡수성 수지막(3)은, 그 접착력에 의해, 각 반도체소자(2)끼리를 접착하고 있다.
또한, 반도체소자(2)는, 그 상면으로부터 하면까지를 관통하는 관통전극(4)을 갖는다. 그리고, 반도체소자(2)는, 능동소자면을 아래로 하고, 그 면에 도금에 의한 재배선(5)이 설치되어 있다. 다음에, 이 반도체소자(2)의 재배선(5)과, 단일 하측의 반도체소자(2)의 관통전극(4)을 도통시키기 위해, 인너범프(6)가 설치되어 있다. 그리고, 기판(1)의 하측에, 땜납볼로 이루어지는 외부전극(7)이 설치되어 있다.
고흡수성 수지막(3)은, (메틸)아크릴산 등의 모노머의 가교반응에 의해 얻어진 고흡수성 수지에, 물 또는 저비점의 유기용매를 흡수시켜 겔형으로 한 것이다. 이 고흡수성 수지막(3)에 의해, 각 반도체소자(2)의 동작시에 발생한 열을 냉각할 수 있다. 더욱이, 고흡수성 수지막(3)에 의해, 각 반도체소자(2)의 휘어짐에 의한 응력을 완화할 수 있고, 열 스트레스에 의한 인너범프(6)의 접속파단 등을 억제할 수 있다.
또한, 유기용매는, 외부전극(7)에서 사용하고 있는 땜납의 리플로우 융점온도 이상인 비점을 갖는 것이어도 된다. 이에 따라, 리플로우 공정에서, 유기용매가 비등하는 것을 방지할 수 있다.
(실시예 2)
도 2a는 본 발명의 실시예 2에서의 반도체장치를 나타내는 단면도이고, 도 2b는 평면도이다. 이 반도체장치는, 복수의 반도체소자(2)를 고흡수성 수지막(3)을 통해 적층한 실시예 1과 동일한 반도체장치(10)의 모든 측면에 방열성의 히트싱크(11)가, 접착제 또는 방열성 접착제로 부착되어 있다. 이에 따라, 더욱 방열성이 향상된다.
(실시예 3)
도 3은 본 발명의 실시예 3에서의 반도체장치를 나타내는 단면도이다. 이하, 도 1과 동일한 구성요소에는 동일번호를 부착하고, 설명을 생략한다. 이 반도체장치는, 각 반도체소자(2) 사이의 전체면에, 도전성 수지막(12)이 설치되어 있다.
이 도전성 수지막(12)은, 통상의 언더필(under-fill) 수지의 막보다도, 열전도성이 좋고, 반도체소자(2)의 열을 대기중에 효율적으로 방열하는 것이 가능하다. 또한, 도전성 수지막(12)에 의해, 각 반도체소자(2) 사이의 도통을 확보하는 것이 가능하다.
(실시예 4)
도 4a는 본 발명의 실시예 4에서의 반도체장치를 나타내는 단면도이다. 이하, 도 1과 동일한 구성요소에는 동일번호를 부착하고, 설명을 생략한다. 이 반도체장치에서는, 각 반도체소자(2) 사이에, 금속판(15)이 설치되어 있다. 이금속판(15)은, 반도체소자(2) 사이보다도 외측에 돌출되어 있고, 이 돌출부분으로부터, 반도체소자(2)의 열을 대기중에 효율적으로 방열하는 것이 가능하다. 이때, 금속판(15)과 반도체소자(2)는, 접착제 또는 방열성 접착제로 접착되어 있다. 또한, 금속판(15)은 금속박막이어도 된다.
또한, 금속판(15)에는, 인접하는 반도체소자(2)끼리를 도통시키기 위한 인너범프(6)가 통과하는 부분에, 주위에 절연처리를 행한 개구부(16)가 설치되어 있다. 이에 따라, 반도체소자(2)끼리를 도통시킬 때에, 재배선(5)을 금속판(15)의 측면까지 연장할 필요가 없다. 이 때문에, 각 반도체소자(2)의 배선길이가 짧아져, 고속전달이 가능하다. 또한, 측면에 배선을 연장할 필요가 없기 때문, 반도체장치의 측면 전체면에 도 2와 같은 히트싱크(11)를 장착할 수 있어, 더욱 방열성의 향상을 도모하는 것도 할 수 있다.
(실시예 5)
도 5는 본 발명의 실시예 5에서의 반도체장치를 나타내는 단면도이다. 이하, 도 1과 동일한 구성요소에는 동일번호를 부착하고, 설명을 생략한다. 이 반도체장치에서는, 각 반도체소자(2) 사이에, 실시예 1의 고흡수성 수지막(3)과 실시예 4의 금속판(15)을 양쪽 설치하고 있다. 이에 따라, 반도체소자(2)의 열은, 고흡수성 수지막(3)을 통해 금속판(15)에 열이 전달되어, 더욱 효율적으로 방열된다.
본 발명은 이상 설명한 바와 같이, 적층된 복수의 반도체소자를 갖는 반도체장치에 있어서, 높은 방열성을 갖게 할 수 있다.

Claims (3)

  1. 적층된 복수의 반도체소자와, 이 각 반도체소자 사이에 설치된 고흡수성 수지막을 갖는 것을 특징으로 하는 반도체장치.
  2. 적층된 복수의 반도체소자와, 이 각 반도체소자 사이의 전체면에 설치된 도전성 수지막을 갖는 것을 특징으로 하는 반도체장치.
  3. 적층된 복수의 반도체소자와, 이 각 반도체소자 사이에 설치된 금속판과, 인접하는 반도체소자끼리를 도통시키기 위한 인너범프를 갖고, 상기 금속판은, 상기 인너범프가 통과하는 부분에, 주위에 절연처리를 행한 개구부를 갖는 것을 특징으로 하는 반도체장치.
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JP5069744B2 (ja) * 2007-05-14 2012-11-07 株式会社日本マイクロニクス 積層型パッケージ、及び、積層型パッケージの形成方法
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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR19980028087A (ko) * 1996-10-21 1998-07-15 문정환 3차원 반도체 패키지 및 그 제조방법
JP2000286380A (ja) * 1999-03-30 2000-10-13 Nec Corp 半導体の実装構造および製造方法
JP2002118194A (ja) * 2000-10-10 2002-04-19 Sumitomo Metal Electronics Devices Inc フリップチップ用セラミック多層基板の製造方法

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2152060B (en) * 1983-12-02 1987-05-13 Osaka Soda Co Ltd Electrically conductive adhesive composition
JPS61288455A (ja) 1985-06-17 1986-12-18 Fujitsu Ltd 多層半導体装置の製造方法
JP3241772B2 (ja) 1991-11-14 2001-12-25 株式会社日立製作所 半導体装置の製造方法
US6278181B1 (en) * 1999-06-28 2001-08-21 Advanced Micro Devices, Inc. Stacked multi-chip modules using C4 interconnect technology having improved thermal management
JP2002299378A (ja) * 2001-03-30 2002-10-11 Lintec Corp 導電体付接着シート、半導体装置製造方法および半導体装置
JP3952143B2 (ja) * 2001-12-25 2007-08-01 信越化学工業株式会社 液状エポキシ樹脂組成物及び半導体装置

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR19980028087A (ko) * 1996-10-21 1998-07-15 문정환 3차원 반도체 패키지 및 그 제조방법
JP2000286380A (ja) * 1999-03-30 2000-10-13 Nec Corp 半導体の実装構造および製造方法
JP2002118194A (ja) * 2000-10-10 2002-04-19 Sumitomo Metal Electronics Devices Inc フリップチップ用セラミック多層基板の製造方法

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