KR101027866B1 - Liquid Crystal Display Device - Google Patents

Abstract

According to an exemplary embodiment of the present invention, a liquid crystal display includes: a plurality of gate lines and data lines formed to cross each other on a lower substrate; A plurality of pixel electrodes formed on a region where the gate line and the data line cross each other; In a liquid crystal display device comprising a plurality of thin film transistors formed at the intersection of the gate line and the data line,

A rear pixel electrode formed at a rear end of a thin film transistor connected to the gate line and the gate line and electrically connected to the thin film transistor; A front end pixel electrode formed at a front end of the predetermined gate line and the thin film transistor and overlapping the gate line with a predetermined region;

The black matrix may be formed between the rear pixel electrode and the gate line and in an area on the upper substrate overlapping the area including the gate line, data line, and thin film transistor.

According to the present invention, the light leakage phenomenon can be minimized without increasing the mask, increasing the process, or changing the process. As a result, the contrast ratio can be secured while maintaining the same aperture ratio by minimizing the light leakage phenomenon.

Description

[0001] The present invention relates to a liquid crystal display device,

1 is an exploded perspective view showing a part of a general liquid crystal display device.

2 is an enlarged plan view schematically showing some pixels of a conventional array substrate for a liquid crystal display device;

3 is a cross-sectional view of a specific portion II ′ of FIG. 2;

4 is an enlarged plan view schematically showing some pixels of an array substrate for a liquid crystal display according to the present invention;

FIG. 5 is a sectional view of a specific portion II-II ′ of FIG. 4. FIG.

<Description of the symbols for the main parts of the drawings>

40: black matrix formed area 43: gate line

45: data line 47: front end pixel electrode

49: rear pixel electrode

The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display device having a pixel structure that overcomes light leakage in rubbing defect regions.                         

In general, the driving principle of the liquid crystal display device uses the optical anisotropy and polarization of the liquid crystal. Since the liquid crystal is thin and long in structure, the liquid crystal has directivity in the arrangement of molecules, and the direction of the molecular arrangement can be controlled by artificially applying an electric field to the liquid crystal.

Accordingly, if the molecular arrangement direction of the liquid crystal is arbitrarily adjusted, the molecular arrangement of the liquid crystal is changed, and light polarized by optical anisotropy may be arbitrarily modulated to express image information.

The liquid crystal may be classified into a positive liquid crystal having a positive dielectric anisotropy and a negative liquid crystal having a negative dielectric anisotropy according to an electrical property classification. The long axes are arranged in parallel, and the liquid crystal molecules having negative dielectric anisotropy are arranged in the direction in which the electric field is applied and the long axes of the liquid crystal molecules are perpendicular to each other.

Nowadays, thin film transistors and active matrix LCDs in which pixel electrodes connected to the thin film transistors are arranged in a matrix manner have been commonly used because of their excellent resolution and video performance.

The structure of the liquid crystal panel, which is a basic component of the liquid crystal display, is as follows.

1 is an exploded perspective view showing a part of a general liquid crystal display device.

Referring to FIG. 1, a general liquid crystal display device 11 includes a color filter 7 including a black matrix 6 and a sub-color filter (red, green, blue) 8, and a common electrode transparent on the color filter. An upper substrate 5 having an 18 formed thereon, and a lower substrate 22 having an array wiring including a pixel region P, a pixel electrode 17 formed on the pixel region, and a switching element T. The liquid crystal 14 described above is filled between the upper substrate 5 and the lower substrate 22.

The lower substrate 22 is also referred to as an array substrate, and the thin film transistor T, which is a switching element, is disposed in a matrix form, and a gate line 13 and a data line 15 passing through the plurality of thin film transistors are formed.

In addition, the pixel area P is a region where the gate line 13 and the data line 15 cross each other. The pixel electrode 17 formed on the pixel region P uses a transparent conductive metal having a relatively high transmittance of light, such as indium tin oxide (ITO).

In the liquid crystal display device 11 configured as described above, the liquid crystal layer 14 positioned on the pixel electrode 17 is oriented by a signal applied from the thin film transistor, and the liquid crystal layer depends on the degree of alignment of the liquid crystal layer. The image can be expressed by controlling the amount of light passing through the image.

2 is an enlarged plan view schematically illustrating some pixels of a conventional array substrate for a liquid crystal display device.

Referring to FIG. 2, the gate line 13 and the data line 15 cross each other to define the pixel region P. The gate electrode 13 is formed at the intersection of the gate line 13 and the data line 15. A thin film transistor T composed of 31, a source electrode 33 and a drain electrode 35 is formed.

The source electrode 33 and the drain electrode 35 are configured to be spaced apart from each other on the gate electrode 31 by a predetermined interval, and an active channel (not shown) is exposed between the source electrode 33 and the drain electrode 35.

When a predetermined scanning pulse is applied to the gate electrode 31 of the thin film transistor, the voltage of the gate electrode 31 is increased accordingly, and the thin film transistor is turned on. At this time, the liquid crystal driving voltage is applied to the liquid crystal from the data line 15 via the drain and the source of the thin film transistor T, and the pixel capacitance in which the liquid crystal capacitance and the storage capacitance are combined is charged.

The storage capacitor may include an on-gate including a part of the gate line 13 and a part of the rear pixel electrode 19 overlapping the gate line 13, and a part of the gate line 13 and the auxiliary electrode 18 overlapping the gate line 13. It is formed by an on-gate accumulation capacitor.

3 is a cross sectional view of a specific portion II ′ of FIG. 2, which is a cross sectional view of the accumulation capacitor region;

Referring to FIG. 3, a gate line 13 used as a first electrode of an accumulation capacitor is formed on a substrate 100, and a gate insulating layer 12 is formed on an exposed surface of the substrate including the gate line 13. ) Is formed.

An auxiliary electrode 18 used as the second electrode of the capacitor formed of the metal layer for forming the source / drain electrodes is formed on the gate insulating layer 12.

In addition, the passivation layer 14 covers the auxiliary electrode 18, and a contact hole for exposing a part of the auxiliary electrode 18 is formed in the passivation layer 14, and the pixel electrode 19 is formed through the contact hole. It is formed on the passivation layer 14 while being connected to the auxiliary electrode 18.

As described above, when an array substrate including a gate line, a data line, and a pixel, that is, a lower substrate, is formed, it is bonded to the upper substrate, and a liquid crystal layer is formed therebetween. area on the upper substrate (not shown) overlapping with the gate line 13, the data line 15, the thin film transistor T, and the like to prevent the light emitted through the back light from leaking in the region other than the pixel. A black matrix (BM) 20 is formed in this. The portion where the black matrix (BM) 20 is formed is shown in FIGS. 2 and 3.

In addition, upper and lower alignment layers (not shown) are formed on the upper and lower substrates to facilitate the alignment of the liquid crystal when voltage is applied to the contact surface with the liquid crystal layer, respectively.

In general, the alignment layer is subjected to a rubbing treatment in order to make the alignment of the liquid crystal constant and to give a pretilt angle for easily inducing the alignment of the liquid crystal. The rubbing treatment is to form a certain groove in the alignment layer by applying a pressure to the rotating roller wrapped with a rubbing cloth while maintaining a constant angle with the substrate, in the case of a substrate having a stepped portion, rubbing failure may occur with respect to the stepped portion.

In this case, since the lower substrate is manufactured by repeating a plurality of processes, that is, deposition, photolithography, and the like, many times, compared to the upper substrate, a plurality of array elements form a step, and a step frequency is higher than that of the upper substrate. Becomes high.

In particular, as shown in FIG. 3, the area in which the accumulation capacitor is formed has a large step, so that the lower substrate may be rubbed at an angle of 45 ° from the top to the bottom as shown in FIG. 2 to secure the main viewing angle of the alignment layer. At this time, rubbing is likely to occur unevenly due to the step of the array elements, particularly the accumulation capacitor region, and light leakage may occur due to the uneven rubbing.

In order to overcome this light leakage phenomenon, the black matrix 20 is formed on the defective rubbing area, but it is not possible to form the black matrix on all rubbing defective areas in terms of the aperture ratio, and at this time, the black matrix 20 is not formed. Light leakage caused by poor rubbing in the area becomes difficult to overcome. This will be described with reference to FIGS. 2 and 3.

2 and 3, the drain electrode 35 of the thin film transistor T is electrically connected to the front end pixel electrode 17 formed on the thin film transistor T so as to be connected from the data line 15. It serves to transfer the applied signal to the front end pixel electrode 17.

In addition, the front end pixel electrode 17 should be spaced apart from the gate line 13 to reduce parasitic capacitance with the gate line 13, and the front end pixel electrode 17 and the gate line 13 may be spaced apart from each other. In order to prevent light leakage between the liver, a black matrix 20 is formed in the region.

On the other hand, the rear pixel electrode 19 formed under the gate line 13 and the thin film transistor T overlaps a predetermined portion to form a storage capacitor, and the rear pixel electrode 19 and the gate line 13 Since the overlapping area A is not a light leaking area in theory, the black matrix was not formed as shown to secure the aperture ratio.

However, the area between the front end pixel electrode 17 and the gate line 13 at which the stepped portion by the accumulation capacitor starts based on the rubbing process direction is relatively easy to rub, so that the rubbing defect is less likely to occur. The black matrix is formed in the light leakage phenomenon to be overcome, but the region A where the rear pixel electrode 19 and the gate line 13 overlap with the end of the stepped portion by the accumulation capacitor is overlapped with the rubbing treatment direction. As the end of the stepped portion, rubbing is a very fragile region, and thus corresponds to a portion where light leakage occurs easily.

However, since the black matrix 20 is not formed as shown in FIGS. 2 and 3, the region cannot overcome the light leakage phenomenon.

As a result, according to the conventional pixel structures shown in FIGS. 2 and 3, the rubbing direction cannot be changed to maintain the main viewing angle, and thus the region where the rear pixel electrode 19 and the gate line 13 overlap each other. The light leakage phenomenon in (A) cannot be overcome.

According to an embodiment of the present invention, a rear pixel electrode formed at a rear end of a gate line and a thin film transistor is electrically connected to and driven by a drain electrode of the thin film transistor, and a front pixel electrode formed at an upper portion of the thin film transistor overlaps a predetermined region with the gate line. And forming a black matrix in a region including between the rear pixel electrode and the gate line, thereby preventing light leakage due to poor rubbing even when rubbing the lower substrate at a 45 ° angle from top to bottom. It is an object to provide a display device.

In order to achieve the above object, a liquid crystal display according to the present invention comprises: a plurality of gate lines and data lines formed to cross each other on a lower substrate; A plurality of pixel electrodes formed on a region where the gate line and the data line cross each other; In a liquid crystal display device comprising a plurality of thin film transistors formed at the intersection of the gate line and the data line,

A rear pixel electrode formed at a rear end of a thin film transistor connected to the gate line and the gate line and electrically connected to the thin film transistor; A front end pixel electrode formed at a front end of the predetermined gate line and the thin film transistor and overlapping the gate line with a predetermined region;

The black matrix may be formed between the rear pixel electrode and the gate line and in an area on the upper substrate overlapping the area including the gate line, data line, and thin film transistor.

Here, a liquid crystal layer is formed between the lower substrate and the upper substrate, and an alignment layer is formed on the upper substrate and the lower substrate at the contact surface with the liquid crystal layer, and the alignment layer of the lower substrate is formed at the front end to secure the main viewing angle. The lower end is characterized by a rubbing treatment at an angle of 45 °.

The thin film transistor includes a gate electrode, a source electrode, and a drain electrode, and the drain electrode of the thin film transistor is electrically connected to the rear pixel electrode.

An auxiliary electrode is interposed between the predetermined gate line and a front end pixel electrode overlapping the gate line with a predetermined region, and an accumulation capacitor is formed by the predetermined gate line and the auxiliary electrode.

In addition, the black matrix is characterized in that it is formed corresponding to the end portion of the step relative to the rubbing treatment direction.

According to the present invention, the light leakage phenomenon can be minimized without increasing the mask, increasing the process, or changing the process. As a result, the contrast ratio can be secured while maintaining the same aperture ratio by minimizing the light leakage phenomenon.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

4 is an enlarged plan view schematically illustrating some pixels of an array substrate for a liquid crystal display according to the present invention.

Referring to FIG. 4, a gate line 43 and a data line 45 cross each other to define a pixel region P on an array substrate for a liquid crystal display device, that is, a lower substrate according to the present invention. The thin film transistor T composed of the gate electrode 51, the source electrode 53, and the drain electrode 55 is formed at the intersection of the 43 and the data line 45.

In addition, pixel electrodes 47 and 49 are formed in an area where the gate line 43 and the data line 45 intersect, that is, the pixel area P. FIG.

In the present invention, unlike the thin film transistor T of the conventional liquid crystal display device illustrated in FIG. 2, the thin film transistor TFT is disposed at the intersection of the gate line 43 and the data line 45. The gate electrode 51 is formed to protrude to the rear end of the).

Accordingly, the source electrode 53 is formed to protrude a predetermined portion from the data line 45 on the region where the gate electrode 51 is formed, and the drain electrode 55 is formed to be spaced apart from the source electrode 53 by a predetermined interval. The active channel (semiconductor layer) (not shown) is exposed between the spaced portions.

As the thin film transistor TFT is formed toward the rear end side of the gate line 43, the thin film transistor TFT is formed of a pixel electrode formed at the rear end of the gate line 43, that is, the rear pixel electrode 49. Is electrically connected to the. In other words, the drain electrode 55 of the thin film transistor TFT is electrically connected to the rear pixel electrode 49 by a contact hole formed thereon.

On the other hand, the pixel electrode, which overlaps the gate line 43 with a predetermined region to form a storage capacitor, has a front pixel electrode 47 formed at the front end of the gate line 43 and the thin film transistor TFT. Done.

As shown in FIG. 4, the storage capacitor includes a portion of the front pixel electrode 47 overlapping a portion of the gate line 43 and an auxiliary electrode overlapping a portion of the gate line 43. 48 is formed by an on-gate accumulation capacitor.

FIG. 5 is a cross sectional view of a specific portion II-II ′ of FIG. 4, which is a cross sectional view of the accumulation capacitor region.

Referring to FIG. 5, a gate line 43 used as a first electrode of an accumulation capacitor is formed on a substrate 500, and a gate insulating layer 42 is formed on an exposed surface of the substrate including the gate line 43. ) Is formed.

An auxiliary electrode 48 used as the second electrode of the capacitor formed of the metal layer for source / drain electrode formation is formed on the gate insulating layer 42.

In addition, the passivation layer 44 covers the auxiliary electrode 48, and a contact hole for exposing a part of the auxiliary electrode 48 is formed in the passivation layer 44, and the front end pixel electrode 47 is formed through the contact hole. It is formed on the passivation layer 44 while being connected to the auxiliary electrode 48.

As described above, when the lower substrate including the gate line 43, the data line 45, and the pixel electrodes 47 and 49 is formed, it is bonded to the upper substrate and a liquid crystal layer is formed therebetween. Between the rear pixel electrode 49 and the gate line 43 and the gate line 43 to prevent light emitted from the lower substrate from the back light from leaking in a region other than the pixel. ), A black matrix 40 is formed in an area on the upper substrate that overlaps the area including the data line 45 and the thin film transistor TFT.

The regions where the black matrix 40 is formed are shown in FIGS. 4 and 5, which prevent light leakage between the rear pixel electrode 49 and the gate line 43 as compared with FIGS. 2 and 3. The black matrix 40 is formed in a region between the rear pixel electrode 49 and the gate line 43.

The region between the rear pixel electrode 49 and the gate line 43 corresponds to a portion where the step ends with respect to the rubbing treatment direction and is vulnerable to rubbing. This is an easy part, in the case of the present invention it is possible to overcome the light leakage phenomenon because the area is covered by the black matrix (40).

Upper and lower alignment layers (not shown) are formed on the upper and lower substrates to facilitate alignment of the liquid crystals when voltage is applied to the contact surfaces with the liquid crystal layer.

In general, the alignment layer is subjected to a rubbing treatment in order to make the alignment of the liquid crystal constant and to give a pretilt angle for easily inducing the alignment of the liquid crystal. The rubbing treatment is to form a certain groove in the alignment layer by applying a pressure to the rotating roller wrapped with a rubbing cloth while maintaining a constant angle with the substrate, in the case of a substrate having a stepped portion, rubbing failure may occur with respect to the stepped portion.

In this case, since the lower substrate is manufactured by repeating a plurality of processes, that is, deposition, photolithography, and the like, many times, compared to the upper substrate, a plurality of array elements form a step, and a step frequency is higher than that of the upper substrate. Becomes high.

In particular, as shown in FIG. 5, the area in which the accumulation capacitor is formed has a large step, and thus, in order to secure the main viewing angle of the alignment layer, as shown in FIGS. 4 and 5, the length of the gate line 43 is increased from above. When rubbing the lower substrate from the front pixel electrode 47 to the rear pixel electrode 49 at an angle of 45 ° downwards, ie, across the gate line 43, the array elements, in particular the accumulation capacitor, The rubbing tends to be made non-uniformly, and light leakage may occur due to the non-uniform rubbing.

In order to overcome this light leakage phenomenon, the black matrix 40 is formed on the rubbing defective area, but it is not possible to form the black matrix on all rubbing defective areas in terms of the aperture ratio, and the black matrix 40 is not formed at this time. Light leakage due to poor rubbing in the area is difficult to overcome. The present invention aims to overcome the above problems, which will be described below with reference to FIGS. 4 and 5.

4 and 5, the drain electrode 55 of the thin film transistor TFT is electrically connected to a rear pixel electrode 49 formed at a rear end of the gate line 43 to provide the data. The signal applied from the line 45 is transferred to the rear pixel electrode 49.

In addition, the rear pixel electrode 49 should be spaced apart from the gate line 43 to reduce parasitic capacitance with the gate line 43, and the rear pixel electrode 49 and the gate line 43 may be spaced apart from each other. In order to prevent light leakage between the liver, a black matrix 40 is formed in the region.

That is, the region between the rear pixel electrode 49 and the gate line 43 is a region where the stepped portion by the accumulation capacitor ends with respect to the rubbing process direction, and is a region where rubbing is very weak, and thus, a region where light leakage occurs easily. Corresponding.

In the related art, although the black matrix 20 was not formed in the region, the pixel structure was changed as shown in FIG. 4 to overcome the above problem, and thus the aperture ratio in the region was changed. It is possible to form the black matrix 40 without a reduction will eventually be able to overcome the light leakage phenomenon.

In other words, the region is a weak part to abnormal rubbing and corresponds to a part where the light leakage is easily generated by the thickness of the gate line and the taper. However, in the present invention, the light leakage phenomenon occurs because the region is covered by the black matrix 40. It will be able to overcome.

On the other hand, the front end pixel electrode 47 formed at the front end of the gate line 43 and the thin film transistor TFT overlaps a predetermined portion to form a storage capacitor, and the front end pixel electrode 47 and the gate line 43 are overlapped. This overlapping region B is not a region where light leaks theoretically, and since rubbing is relatively easy based on the rubbing treatment direction, the black matrix 40 is not formed as shown to secure the aperture ratio.

In the present invention, since the region B where the front end pixel electrode 47 and the gate line 43 overlap each other corresponds to the beginning of the step, the rubbing state is good, so that light leakage due to abnormal rubbing does not occur. As such, it is not necessary to form a black matrix.

As a result, when the structure of the present invention is taken, light leakage can be minimized while maintaining the same aperture ratio.

According to the liquid crystal display according to the present invention, the light leakage phenomenon can be minimized without increasing the mask, increasing the process, or changing the process. As a result, the contrast ratio can be secured while maintaining the same aperture ratio by minimizing the light leakage phenomenon. There is an advantage.

Claims (6)

A plurality of gate lines and data lines formed to cross each other on the lower substrate; A plurality of pixel electrodes formed on the pixel region defined by the intersection of the gate line and the data line; In a liquid crystal display device comprising a plurality of thin film transistors formed at the intersection of the gate line and the data line, A rear pixel electrode formed at a rear end of the thin film transistor connected to the gate line and electrically connected to the thin film transistor; A front end pixel electrode formed at a front end of the gate line and overlapping the gate line; An alignment layer which is rubbed from the front pixel electrode to the rear pixel electrode along the rubbing direction having a 45 ° angle to the length of the gate line to secure a main viewing angle, The black matrix is disposed in an area between the rear pixel electrode and the gate line and in an area on the upper substrate overlapping with the area including the gate line, the data line and the thin film transistor. And the black matrix is disposed on the upper substrate on the alignment layer corresponding to the stepped region between the rear pixel electrode and the gate line. The method of claim 1, A liquid crystal layer is formed between the lower substrate and the upper substrate, and another alignment layer is formed on the lower substrate in contact with the liquid crystal layer. delete The method of claim 1, The thin film transistor includes a gate electrode, a source electrode, and a drain electrode, and the drain electrode of the thin film transistor is electrically connected to the rear pixel electrode. The method of claim 1, An auxiliary electrode is interposed between the gate line and a front end pixel electrode overlapping the gate line, and an accumulation capacitor is formed by the gate line and the auxiliary electrode. The method of claim 1, And the black matrix is formed corresponding to a portion where the step ends on the basis of the rubbing process direction.

Images