KR100633450B1 - Socket interface for application test of semiconductor device - Google Patents

Abstract

The present invention provides a socket interface for mounting test of a semiconductor device, the socket including a plurality of pins each contacting a plurality of pins of the semiconductor device to be tested, and a plurality of socket contact ends and a plurality of connection block contact ends. The plurality of socket contact ends contact the plurality of pins of the socket, respectively, and the plurality of connection block contact ends are respectively connected to the plurality of socket contact ends through internal wiring, and the plurality of connection blocks. And a plurality of pogo pins in contact with the contact end, wherein the plurality of pogo pins each comprise a connection block which is in contact with the contact means of the reference electronic device on which the mounting test is to be performed.

According to the present invention, in the mounting test of the semiconductor device, the mounting test can be performed by replacing only the socket interface regardless of the arrangement of the semiconductor device inside the reference electronic device to be tested. Durability can be improved by reducing the stress during discharge.

Sockets, Mount Tests, Pogo Pins, Receptacles, Test Interface Boards, Connection Blocks

Description

Socket interface for mounting test of semiconductor device {SOCKET INTERFACE FOR APPLICATION TEST OF SEMICONDUCTOR DEVICE}

1 is a block diagram of a socket interface according to the prior art.

2 is a configuration diagram of a socket interface for mounting test of a semiconductor device according to the present invention.

3 illustrates an environment in which a mounting test is to be performed.

<Description of the symbols for the main parts of the drawings>

100: test interface board 110: socket

120: device guide 130: micro pogo pin

140: semiconductor element 145: pin

200: socket interface 210: socket

215: pin 230: test interface board

233: socket contact end 237: connection block contact end

250: connection block 255: pogo pin
270: socket support 300: reference electronic device
320: arrangement of contact means

delete

The present invention relates to a socket interface for mounting test of a semiconductor device, and more particularly to mounting test by replacing only the socket interface regardless of the arrangement of the semiconductor device inside the reference electronic device to be tested in the mounting test of the semiconductor device. The present invention relates to a socket interface for mounting test of a semiconductor device, which can improve the durability by reducing stress during insertion and discharge of the semiconductor device for mounting test.

In order to test a conventional semiconductor device, it is determined whether a semiconductor device is good or bad by analyzing a signal output from the semiconductor device after applying a specific signal pattern to the semiconductor device using an automatic test equipment (ATE).

However, such a test device such as ATE is expensive, which increases the cost of testing each semiconductor device, and thus reduces the price competitiveness. Also, the test is performed in a separate experimental environment, not in the environment in which the semiconductor device is actually installed and used. As a result, the accuracy of the test is reduced due to failure to implement characteristics of various noises in an actual use environment, which makes it difficult to accurately determine whether it is good or bad.

In order to improve such a problem, mounting tests for actually attaching a semiconductor device to an electronic device and performing a test in an actual use environment of the semiconductor device, that is, a mounting environment, are increasingly adopted. For example, in the case of performing a test of a DRAM device used in a PC, the DRAM module is actually inserted into a PC motherboard and a test program according to the actual environment is driven to determine that the drive is normally performed. This is judged as bad.

In addition, a method of applying such a mounting test not only for testing DRAM memory devices but also for testing other semiconductor devices has been developed. For example, in an electronic device such as a buffer memory used in a hard disk, as in the patent application entitled "Test fixture for mounting test and semiconductor device mounting tester including the same" filed by the present applicant and filed as the same as the present application. In the case of testing the mounted memory device, the buffer memory may be actually mounted on the hard disk and the operation of the hard disk may be performed to test the operation of the buffer memory.

Such a mounting test is implemented by removing a buffer memory of a reference electronic device, for example, the hard disk, attaching a socket interface to a corresponding pad, performing a test, performing a test, and then ejecting the device to be tested.

Conventional socket interfaces are simply connected to existing sockets, such as burn-in sockets, by soldering to the removed semiconductor elements from the motherboard or hard disk drive. However, in this case, a lot of stress occurs in the process of inserting and ejecting the semiconductor device through the handler to perform the test. After a certain number of tests, the contact state becomes bad, so the socket must be removed and a new socket must be inserted. There is a disadvantage.

In addition, Korean Patent No. 10-0367307, entitled "Testing Socket Module for Memory Component Mount Contact," filed November 15, 2001 by Test ENG Co., Ltd., provides impedance mismatching in a structure of simply inserting a socket. A socket interface for removing is disclosed.

1 is a block diagram of a socket interface disclosed in the registered Patent No. 10-0367307. As illustrated, the socket interface, that is, the test interface board 100 has two device guides 120 disposed at predetermined intervals on the plate-shaped socket 110, and both sides of the device guide 120. A plurality of micro pogo pins 130 in contact with the pins 145 of the semiconductor element 140 are disposed in a row at a negatively fixed jaw in a vertical direction.

This socket interface structure is a structure in which the pins of the semiconductor device directly contact the pogo pins. The pogo pin may also be connected to a contact pad of a device, such as a motherboard or a hard disk drive, to perform a mounting test.

However, in this case, a picker for inserting or ejecting a semiconductor device into or into the socket interface to test a case in which the semiconductor device pin is in direct contact with the pogo pin so that the semiconductor device is changed from a horizontal arrangement to a vertical arrangement. There is a disadvantage in that the contents of the work control program of NB are changed, and when the stress accumulates in the process of inserting and ejecting the semiconductor device, the contact state worsens, so that the entire socket interface needs to be replaced.

An object of the present invention is to replace the socket interface only to perform the mounting test, regardless of the arrangement of the semiconductor device inside the reference electronic device to be tested in the mounting test of the semiconductor device and also to insert the semiconductor device for the mounting test And it provides a socket interface for mounting test of semiconductor devices that can improve the durability by reducing the stress during the discharge.

In order to achieve the above technical problem, the present invention provides a socket interface for a mounting test of a semiconductor device, a socket comprising a plurality of pins each contacting a plurality of pins of the semiconductor device to be tested, a plurality of socket contact ends and a plurality of sockets And a plurality of connection block contacts, wherein the plurality of socket contacts are in contact with the plurality of pins of the socket, respectively, and the plurality of connection block contacts are respectively connected to the plurality of socket contacts and via internal wiring. A board and a plurality of pogo pins in contact with the plurality of connection block contacts, the plurality of pogo pins each including a connection block in contact with the contact means of the reference electronic device on which the mounting test is to be performed. Characterized in that.

In the socket interface for mounting test of the semiconductor device according to the present invention, further comprising a socket support for reducing the stress applied to the socket interface when the semiconductor device is inserted or discharged, the socket support is the connection block or the reference It is desirable to be fixed to the electronic device.

In addition, in the socket interface for mounting test of the semiconductor device according to the present invention, the socket contact end is preferably a receptacle.

In the socket interface for mounting test of a semiconductor device according to the present invention, it is preferable that the connection block contact end is a pad.

In addition, in the socket interface for mounting test of the semiconductor device according to the present invention, it is preferable that the connection block includes an alignment hole which becomes a reference for alignment during insertion or discharge of the semiconductor device.

In addition, in the socket interface for mounting test of the semiconductor device according to the present invention, it is preferable that the test interface board is a PCB verified for impedance matching.

In the socket interface for the mounting test of the semiconductor device according to the present invention, the plurality of connection block contact ends are preferably arranged in the same direction as the arrangement direction of the plurality of socket contact ends.

In addition, in the socket interface for mounting test of the semiconductor device according to the present invention, the plurality of connection block contact ends are preferably arranged in a direction perpendicular to the arrangement direction of the plurality of socket contact ends.

The present invention also provides a test device for mounting a semiconductor device, wherein the test device for mounting a semiconductor device performs a connection between a semiconductor device to be tested using a socket interface according to the present invention and a reference electronic device to be tested.

Hereinafter, the socket interface for the mounting test of the semiconductor device of the present invention will be described in more detail with reference to the drawings.

2 is a block diagram of a socket interface for mounting test of a semiconductor device according to the present invention.

As shown, the socket interface 200 according to the present invention includes a socket 210, a test interface board 230, and a connection block 250.

The socket 200 includes a plurality of pins 215 that are in contact with a plurality of pins of the semiconductor device to be inserted to transmit signals in both directions. The socket 200 may use a conventional socket and may, for example, use a burn-in socket.

The test interface board 230 includes a plurality of socket contact ends 233 and a plurality of connection block contact ends 237, and the plurality of socket contact ends 233 may include a plurality of pins 215 of the socket 200. And a signal may be transmitted in contact with each other, and the plurality of connection block contact terminals 237 are respectively connected to the plurality of socket contact terminals 233 through internal wires.

The socket contact end 233 may be implemented in the form of a receptacle, for example, and the connection block contact end 237 may be implemented in the form of a pad.

In addition, the test interface board 230 may be a PCB verified for impedance matching.

The plurality of connection block contact ends 237 may be arranged in the same direction as the arrangement direction of the plurality of socket contact ends 233 or in an orthogonal direction.

This arrangement depends on the arrangement of the contact means inside the reference electronics on which the mounting test is to be carried out, so that the semiconductor element to be tested can be inserted and discharged by a picker operated by a constant control program, regardless of the arrangement of the contact means within the reference electronics. To be configured.

For example, FIG. 3 illustrates the environment in which the mounting test will be performed.

3A illustrates a case in which the contact means is arranged 320 in the horizontal direction in the reference electronic device 300, and FIG. 3B illustrates the contact means arranged in the vertical direction in the reference electronic device 300. (320 ').

The reference electronic device 300 may be, for example, a hard disk drive connected to a main board and operated in a PC, and may be a device that removes a case and removes a device corresponding to a semiconductor device to be tested from internal circuits. It may be a buffer memory mounted in the hard disk drive. In addition, the reference electronic device 300 may be various devices such as a CD drive, a DVD drive, a graphics board, a memory module, and the like, connected to a main board and operated in a PC.

For example, the reference electronic device 300 is a hard disk drive, and in order to test a buffer memory, the buffer memory in the hard disk drive is removed, and a semiconductor device, that is, a buffer memory is inserted through a socket interface to test the case.

 In the prior art, since the buffer memory of the hard disk drive 300 is removed and a socket is directly attached to the corresponding contact means arrangement, the contact means are arranged in the vertical direction while the contact means are arranged in the horizontal direction. If the test is to be carried out, the control program of the picker device which reattaches the socket to correspond to the vertical direction and also inserts and ejects the buffer memory to be tested into the socket must be changed to correspond to the change of the socket direction. The configuration should also have a configuration that can be inserted by rotating the buffer memory 90 ° in response to this change in direction.

However, as shown, in the case of using the socket interface for mounting test of the semiconductor device according to the present invention, the mounting test by simply inserting only the connection module 250 and the test interface board 230 without changing the control program of the picker device. Can be done.

That is, since the direction in which the plurality of connection block contacting ends 237 and the plurality of socket contacting ends 233 of the test interface board 230 are arranged in parallel or perpendicular to each other, for example, (a) of FIG. In the case where the contact means is arranged 320 in the horizontal direction and the pins of the socket 210 are arranged in the vertical direction, the plurality of connection block contact end 237 and the plurality of socket contact end 233 The test interface board 230 is arranged such that the direction of the orthogonal to each other may be performed without changing the picker's control program.

Of course, if the contact means are arranged 320 'in the vertical direction and the pins of the socket 210 are arranged in the vertical direction as in the case of FIG. 3 (b), the plurality of connection block contact ends 237 and the The test interface board 230 is arranged such that the arrangement directions of the plurality of socket contact terminals 233 may be parallel to each other, and thus the test may be performed without changing the picker's control program.

The connection block 250 includes a plurality of pogo pins 255 in contact with the connection block contact end 235 of the test interface board 230, and each of the plurality of pogo pins 255 may be subjected to a mounting test. Contact means of the reference electronic device. The connection block 250 may be implemented, for example, in the form of a pogo socket.

The contact means of the reference electronic device may be, for example, a contact pad of a portion from which the buffer memory of the hard disk drive is removed when the buffer memory of the hard disk drive is tested.

The connection block 250 is fixed to the reference electronic device by screwing or bonding.

In addition, although not shown, the connection block 250 may include an alignment hole that serves as a reference for alignment when the semiconductor device is inserted or discharged. That is, when the semiconductor device is inserted into or discharged from the socket 210 by a picker or the like, an alignment hole may be included in the connection block 250 to provide a reference for alignment.

In addition, the socket interface for mounting test of the semiconductor device according to the present invention may further include a socket support 270 for reducing the stress applied to the socket interface 200, in particular the socket 210 when the semiconductor device is inserted or discharged. Can be.

The socket support part 270 is fixed to the connection block 250 by screwing or bonding, or the like, and distributes the stress applied to the entire socket interface 200 when the semiconductor device is inserted into the socket by a picker or the like. do.

In another exemplary embodiment, the socket support part 270 may be fixed to the reference electronic device 300 by a screw fastening method or an adhesive method.

Although the present invention has been described by way of example only, it is for the purpose of illustrating the invention only, and the protection scope of the present invention is not limited by these examples, the protection scope of the present invention is defined through the description of the claims .

As described above, according to the present invention, the mounting test may be performed by replacing only the socket interface regardless of the arrangement of the semiconductor devices inside the reference electronic device to be tested in the mounting test of the semiconductor device. Durability can be improved by reducing stress during insertion and ejection of the device.

Claims (9)

In the socket interface for mounting test of a semiconductor device, A socket comprising a plurality of pins each of which contacts a plurality of pins of the semiconductor device to be tested, And a plurality of socket contact ends and a plurality of connection block contact ends, the plurality of socket contact ends contacting the plurality of pins of the socket, respectively, and the plurality of connection block contact ends respectively through the plurality of socket contact ends and the internal wiring. A test interface board to be connected, A connection block comprising a plurality of pogo pins contacting the plurality of connection block contacts, wherein the plurality of pogo pins are respectively in contact with the contact means of the reference electronic device on which the mounting test is to be performed. Socket interface for mounting test of a semiconductor device comprising a. The method of claim 1, Further comprising a socket support for reducing the stress applied to the socket interface when inserting or ejecting a semiconductor device, And the socket support is fixed to the connection block or the reference electronic device. The method of claim 1, And the socket contact end is a receptacle. The method of claim 1, And the connection block contact terminal is a pad. The method of claim 1, And the connection block includes an alignment hole which is a reference for alignment upon insertion or discharge of the semiconductor device. The method of claim 1, And the test interface board is a PCB verified for impedance matching. The method of claim 1, wherein the plurality of connection block contact ends, The socket interface for mounting test of the semiconductor device is arranged in the same direction as the array direction of the plurality of socket contact end. The method of claim 1, wherein the plurality of connection block contact ends, The socket interface for mounting test of the semiconductor device is arranged in a direction orthogonal to the arrangement direction of the plurality of socket contact end. As a mounting test apparatus for a semiconductor device, A mounting test apparatus for a semiconductor device for performing a connection between a semiconductor device to be tested and a reference electronic device for performing a mounting test using the socket interface according to any one of claims 1 to 8.

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