JPS6383971A - Optical information recording and reproducing device - Google Patents

Abstract

PURPOSE:To stably reproduce a clock by providing an address reproducing means of a sector identifier part and a clock signal reproducing means, which controls the clock reproducing response characteristic, to surely switch the clock reproducing response characteristic of a data field part to the low speed. CONSTITUTION:The sector identifier part of a reproduced signal 100 is read out by an address reproducing circuit 1 to output an address reproduced signal 101. Error check is performed by an error detection code, and an address detec tion signal 102 is outputted to a delay circuit 2 if the address signal 101 is normally read out. A gate signal 103 switches outputs of the first low pass filter 5 and the second low pass filter 8 in a multiplexer 6. When the gate signal 103 is turned on, the phase difference output smoothed by the second low pass filter 8 controls the oscillation frequency of a voltage controlled oscilla tor 7. Since the position of the data part of the data field part is detected by the gate signal generated from the address detection signal of the sector identifier part, the response characteristic of PLL is easily switched and the clock of high reliability is reproduced.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to an optical information recording and reproducing apparatus for recording and reproducing information on an optical disc, and particularly relates to reproducing a clock signal of an optical disc.

2. Description of the Related Art Optical information recording and reproducing apparatuses for recording information on optical disks can achieve a high recording density ten times or more that of magnetic disks by taking advantage of the high convergence of laser light and the narrow pitch of tracks.

In particular, write-once optical discs and magneto-optical discs are attracting attention because, unlike read-only video discs and compact discs, information can be recorded, played back, and even rewritten.

FIG. 3 shows a block diagram of a clock reproducing circuit of a conventional optical information recording/reproducing apparatus, which is disclosed in Japanese Patent Application Laid-open No. 1, No. 58-57636. Reference numeral 9 denotes a multi-breather (MPX) which selects the modulation clock IQ7 and the reproduced signal 100 using the sector envelope signal 105, 1o a differentiation circuit, and 11 an extension circuit.

12 is a data clock generation circuit, 13 is a phase comparator, 1
゛4 is a low-pass filter (LPF), 16 is a voltage control extractor (VCO), 16 is a multiplexer (MPX), 1
7 is an inverter, 18 is a recorded sector detection circuit 119
2 is a synchronous part detection circuit, and 20 is an LPF switching circuit.

In the conventional optical information recording and reproducing apparatus configured as described above, when the sector envelope signal 105 is on and the data loop signal 106 is off, a simple PLL loop is established, and the PLL clock synchronization is quickly pulled in. It is. Multiplexer 9 receives the port B signal.
The multiplexer 16 selects the boat signal, and the phase comparator 13 draws the frequency and phase of the voltage controlled oscillator 15 into the signal of the synchronization part of the reproduced signal 1o○. The data loop signal 106 is turned on after the PLL loop is engaged and is held during the data portion. During the period when both the data loop signal 108 and the sector envelope signal 105 are on, the multiplexer 16 is turned on.
The output of the clock regenerates the missing clock in the data well. At this time, the data loop signal 106
The LPF switching circuit 20 limits the band of the low-pass filter 14 to reduce the response speed, and performs stable lock regeneration without following fast disturbances such as dropout 5 vibration or shock. Still sector envelope signal 10
6 is off, a modulation clock 107 is inserted to prevent PLL frequency deviation.

Problems to be Solved by the Invention However, in the above configuration, whether the data loop signal 106 detects that the PLL loop is engaged or not.
Alternatively, it is output when the synchronization part is detected, but it is difficult to detect the PLL pull-in state, and the accuracy of the detection of the synchronization part decreases due to disk defects.
The problem was that the LL loop could not be switched.

Means for Solving the Problems The present invention provides a data reproducing means for reproducing information from a data field section, an address reproducing means for reproducing address information of a sector identifier section, and a gate signal from an address detection signal of the address reproducing means. The present invention is an optical information recording/reproducing apparatus comprising a gate signal generating means for generating a gate signal, and a clock signal reproducing means for controlling a clock reproduction response characteristic using the gate signal.

According to the above-described structure, the clock regeneration means reliably switches the clock regeneration response characteristic of the data section of the data field section to a low speed using the gate signal generated by the address signal of the sector identifier section, thereby achieving stable lock regeneration. Do the following.

Embodiment FIG. 1 shows a block diagram of a clock recovery circuit of an optical information recording/reproducing apparatus in an embodiment of the present invention. In FIG. 1, 1 is an address reproducing circuit, 2 is a delay circuit,
3 is a mono multivibrator, 4 is a phase comparator, 6 is a first low-pass filter (LPFl), and 6 is a multiplexer (MPX).

7 is a voltage controlled oscillator, 8 is a second low-pass filter (I
, PF2). Blocks numbered 4 to 7 1dPLL
It constitutes a circuit. The first low-pass filter 6 is
The cutoff frequency is higher than that of the low-pass filter 8.

2 &, b and C are the reproduced signals 100. of the embodiment of FIG. 1, respectively. 3 is a waveform diagram of an address detection signal 102 and a gate signal 103. FIG.

The operation of the optical information recording/reproducing apparatus of this embodiment configured as described above will be described below.

The reproduced signal 100 from the optical disc has a sector identifier section (I
D), data field part (DF) and gap (
1) (41), Gap (2) CG2 'I shows the reproduced signal from the sector.

The sector identifier part of the reproduced signal 100 is read out by the address reproduction circuit 1 and outputs the track address of the sector and the address reproduction signal 101 of the sector address. The address reproducing circuit 1 performs an error check using an error detection code in the sector identifier section, and outputs an address detection signal 102 to the delay circuit 2 when the address signal 101 is read out normally without any error.

The delay circuit 2 delays the address detection signal 102 by a time T1 to turn the mono multivibrator 3 on. Mono multivibrator 3 outputs gate signal 103 at time T2. The time T1 is the sum of the gap (1) and the time during which the PLL is synchronously pulled in at the synchronization section of the data field section. The time T2 is the time that covers the part after the synchronization part and the data part consisting of data and error correction detection codes.

The gate signal 103 switches the output of the first low-pass filter 6 and the second low-pass filter 8 at the multiplexer 6 .

When the gate signal 103 is off, the reproduced signal 100 is a phase difference obtained by comparing the clock signal 104 of the voltage controlled oscillator 7 and the reproduced signal 100 in the phase comparator 4, and smoothing the phase difference in the first low-pass filter 5 by the multiplexer 6. The output controls the oscillation frequency of the voltage controlled oscillator 7. This first
The PLL loop performs clock synchronization at high speed because the first low-pass filter 6 has a wide band. next,
When the gate signal 103 is turned on, the phase difference output smoothed by the second low-pass filter 8 by the multiplexer 6 of the phase comparator 4 controls the oscillation frequency of the voltage controlled oscillator 7. Since the second low-pass filter 8 has a narrow band, this second PLL loop strongly locks the synchronized clock to prevent clock synchronization deviation due to dropout of one optical disk or the like.

If the address information in the sector identifier section is duplicated, the error rate will generally be on the order of 10<-6 >, so there will be at most several errors per optical dinuque, and the detection accuracy is sufficient.

As described above, according to this embodiment, the position of the data section of the data field section can be detected using the gate signal generated from the address detection signal of the sector identifier section ID, so that the response characteristics of the PLL can be easily switched and the reliability is improved. This allows for highly accurate clock recovery.

DETAILED DESCRIPTION OF THE INVENTION As described in detail, according to the present invention, the PLL response characteristics of the data field section can be well controlled, and the practical effects thereof are significant.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a clock regeneration circuit of an optical information recording/reproducing apparatus according to an embodiment of the present invention, FIG. 2 is a signal waveform diagram of each part of the same embodiment, and FIG. 3 is a diagram of a conventional optical information recording/reproducing apparatus. FIG. 1...address regeneration circuit, 2...delay circuit, 3...mono multivibrator, 4...
...Phase comparator, 5...Low pass filter 1 (LPFl)te...Multiplexer (
MPX), 7... Voltage controlled oscillator, 8...
...Low pass filter 2 (LPF2), 9...
Multiplexer (MPX), 10...differentiation circuit, 11...delay circuit, 12...data clock generation circuit, 13...phase comparator, 14
...Low pass filter (LPF), 16...
...voltage controlled oscillator (VCO), 16...=multiplexer (MPx), 17...inverter, 18...recorded sector detection circuit, 19...
... Synchronization section detection circuit, 20 ... LPF switching circuit, 100 ... Reproduction signal, 101 ...
. . . address reproduction signal, 102 . . . address detection signal. Name of agent: Patent attorney Toshio Nakao and 1 other person No. 1
figure! Figure 2 Figure 3

Claims (1)

[Claims] In an optical information recording and reproducing apparatus for recording and reproducing information on an optical disc having a plurality of sectors including a sector identifier section recorded in advance and a data field section for recording information, a data reproducing means for reproducing information from the data field section; It has an address reproducing means for reproducing address information of a sector identifier section, a gate signal generating means for generating a gate signal from an address detection signal of the address reproducing means, and a clock reproducing means for controlling a clock reproduction response characteristic with the gate signal. An optical information recording/reproducing apparatus characterized in that the clock reproduction response during at least the data field section of the data field section is switched to a low speed by the gate signal.