JPS6330794B2 - - Google Patents
Info
- Publication number
- JPS6330794B2 JPS6330794B2 JP1601182A JP1601182A JPS6330794B2 JP S6330794 B2 JPS6330794 B2 JP S6330794B2 JP 1601182 A JP1601182 A JP 1601182A JP 1601182 A JP1601182 A JP 1601182A JP S6330794 B2 JPS6330794 B2 JP S6330794B2
- Authority
- JP
- Japan
- Prior art keywords
- circuit board
- board
- double
- conductor pattern
- sided copper
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 229910052782 aluminium Inorganic materials 0.000 claims description 16
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 16
- 229910000679 solder Inorganic materials 0.000 claims description 12
- 239000004020 conductor Substances 0.000 claims description 7
- 238000005530 etching Methods 0.000 claims description 7
- 238000004519 manufacturing process Methods 0.000 claims description 7
- 238000005476 soldering Methods 0.000 claims description 6
- 238000004080 punching Methods 0.000 claims description 5
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 3
- 239000011889 copper foil Substances 0.000 claims description 3
- 238000000034 method Methods 0.000 description 17
- 239000000758 substrate Substances 0.000 description 6
- 229910052751 metal Inorganic materials 0.000 description 4
- 239000002184 metal Substances 0.000 description 4
- 239000000853 adhesive Substances 0.000 description 3
- 230000001070 adhesive effect Effects 0.000 description 3
- 238000007743 anodising Methods 0.000 description 3
- 239000004593 Epoxy Substances 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000004806 packaging method and process Methods 0.000 description 2
- 239000011347 resin Substances 0.000 description 2
- 229920005989 resin Polymers 0.000 description 2
- 229910021578 Iron(III) chloride Inorganic materials 0.000 description 1
- AZDRQVAHHNSJOQ-UHFFFAOYSA-N alumane Chemical group [AlH3] AZDRQVAHHNSJOQ-UHFFFAOYSA-N 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 238000007598 dipping method Methods 0.000 description 1
- 230000017525 heat dissipation Effects 0.000 description 1
- RBTARNINKXHZNM-UHFFFAOYSA-K iron trichloride Chemical compound Cl[Fe](Cl)Cl RBTARNINKXHZNM-UHFFFAOYSA-K 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
Landscapes
- Insulated Metal Substrates For Printed Circuits (AREA)
- Combinations Of Printed Boards (AREA)
Description
【発明の詳細な説明】
本発明は電子機器に使用されるチツプ部品搭載
の印刷配線回路板の製造法に関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a printed circuit board mounted with chip components used in electronic equipment.
従来のチツプ部品を搭載した印刷配線回路板と
しては第1図に示すように、片面銅張エポキシ樹
脂−紙基材積層板1をエツチングして導体パター
ン2を形成した後、チツプ部品3を装着し、リー
ド端子4を取付けたものが知られている。 As shown in FIG. 1, a conventional printed wiring circuit board with chip components mounted thereon is one in which a single-sided copper-clad epoxy resin-paper base laminate 1 is etched to form a conductive pattern 2, and then a chip component 3 is mounted. However, one with a lead terminal 4 attached is known.
この印刷配線回路板はエポキシ樹脂−紙基材を
使用しているために、他のマザーボードとなる印
刷配線板に組込むには機械的強度上の制約から金
属のリード端子4を使用しなければならず、仮に
金属のリード端子4を使用せずにマザーボードの
印刷配線板に取付けようとすると、端子部分を櫛
形にかつ幅広く加工し、さらにマザーボードの印
刷配線板にも、それに対応する大きな角孔を設け
なければならず、これは高密度実装の大きな障害
になつていた。 Since this printed circuit board uses an epoxy resin-paper base material, metal lead terminals 4 must be used due to mechanical strength constraints in order to incorporate it into a printed circuit board that will become another motherboard. First, if you try to attach it to the printed wiring board of the motherboard without using the metal lead terminals 4, you will have to process the terminal part into a comb shape and make it wide, and also make a corresponding large square hole in the printed wiring board of the motherboard. This was a major obstacle to high-density packaging.
また、上述のように金属のリード端子4を使用
する場合は、このリード端子4を取付ける工程が
あるため、印刷配線回路板を最終工程まで多数個
連結した状態でリード端子4を取付けることがで
きず、この工程前に個々の印刷配線回路板に分割
する必要があり、このため製造工程として工数増
加が伴うものとなつていた。 Furthermore, when using the metal lead terminals 4 as described above, there is a process for attaching the lead terminals 4, so the lead terminals 4 can be attached with a large number of printed circuit boards connected until the final process. First, it is necessary to divide the printed circuit board into individual printed circuit boards before this step, which increases the number of man-hours in the manufacturing process.
本発明は以上のような従来の欠点を除去するも
のであり、製造が容易で配線密度の高い印刷配線
回路板の製造法を提供することを目的とするもの
である。 The present invention eliminates the above-mentioned conventional drawbacks, and aims to provide a method for manufacturing a printed wiring circuit board that is easy to manufacture and has a high wiring density.
上記目的を達成するために本発明の印刷配線回
路板の製造法は、両面銅張アルミニウム基板を端
子部と外形の一部を残して打抜加工し、打抜部の
露出アルミニウム表面を陽極酸化した後エツチン
グにより両面に導体パターンを形成し、この導体
パターン上に半田属を設け、チツプ部品を実装し
た後、外形の一部を切断し個片とした後マザーボ
ードとなる印刷配線板に組込み半田付けにより接
続することを特徴とするものである。 In order to achieve the above object, the method for manufacturing a printed wiring circuit board of the present invention involves punching a double-sided copper-clad aluminum board leaving the terminal portion and part of the outer shape, and anodizing the exposed aluminum surface of the punched portion. After that, a conductive pattern is formed on both sides by etching, a solder metal is placed on this conductive pattern, and chip components are mounted. After cutting a part of the outline and making it into individual pieces, they are assembled into a printed wiring board that will become a motherboard and soldered. It is characterized in that it is connected by attaching it.
以下、本発明の実施例を図面第2図〜第12図
により説明する。 Embodiments of the present invention will be described below with reference to FIGS. 2 to 12.
まず、第2図に示すように両面銅張アルミニウ
ム基板5を用いる。この両面銅張アルミニウム基
板5はアルミニウムの表面に陽極酸化処理により
アルマイト層を形成して絶縁層とし、このアルマ
イト層上に銅箔を接着などで貼付けて構成されて
いる。 First, as shown in FIG. 2, a double-sided copper-clad aluminum substrate 5 is used. This double-sided copper-clad aluminum substrate 5 is constructed by forming an alumite layer on the surface of aluminum by anodizing to serve as an insulating layer, and pasting copper foil on the alumite layer by adhesive or the like.
この両面銅張アルミニウム基板5を第3図に示
すように端子部6となる部分と、外形の一部7を
残してプレス打抜き加工を施す。このプレス打抜
き加工により第4図に示すようにアルミニウム露
出部8が生じるので、陽極酸化法でこのアルミニ
ウム露出部8にアルマイト層9を施す。 As shown in FIG. 3, this double-sided copper-clad aluminum substrate 5 is subjected to a press punching process, leaving a portion that will become the terminal portion 6 and a portion 7 of the outer shape. As shown in FIG. 4, an aluminum exposed portion 8 is formed by this press punching process, and an alumite layer 9 is applied to this aluminum exposed portion 8 by an anodizing method.
次に機械研磨により両面銅張アルミニウム基板
5の両面の銅張表面10を研磨した後、第5図に
示すようにエツチングレジスト11を回路パター
ン状に印刷する。その後、塩化第2鉄液でエツチ
ングし、エツチングレジスト11を除去し導体パ
ターン12を形成する。 Next, after mechanically polishing the copper-clad surfaces 10 on both sides of the double-sided copper-clad aluminum substrate 5, an etching resist 11 is printed in a circuit pattern as shown in FIG. Thereafter, etching is performed using a ferric chloride solution to remove the etching resist 11 and form a conductive pattern 12.
次に第6図に示すように溶融半田中に垂直に浸
漬し導体パターン12の表面に半田層13を形成
する。このとき、必要に応じてソルダーレジスト
を前もつて印刷形成しておけば必要な導体パター
ン12上の表面にのみ半田層13が形成できる。 Next, as shown in FIG. 6, a solder layer 13 is formed on the surface of the conductor pattern 12 by vertically dipping it into molten solder. At this time, if a solder resist is printed in advance if necessary, the solder layer 13 can be formed only on the surface of the conductor pattern 12 where it is necessary.
このようなものに第7図に示すようにチツプ部
品14を接着剤15を用いて所定位置に装着し、
リフローソルダリング式で半田層13を再溶解す
るか、フローソルダリング式で半田付けしてチツ
プ部品14を導体パターン12に接続固着する。
なお、この場合リフローソルダリング式とフロー
ソルダリング式の両方を採用して両面にチツプ部
品14を実装することもできる。 As shown in FIG. 7, a chip part 14 is attached to such a thing in a predetermined position using an adhesive 15.
The chip component 14 is connected and fixed to the conductive pattern 12 by remelting the solder layer 13 using a reflow soldering method or by soldering using a flow soldering method.
In this case, it is also possible to use both the reflow soldering method and the flow soldering method to mount the chip components 14 on both sides.
次に第8図に示すように外形の一部7および端
子部6を両面銅張アルミニウム基板5から切断
し、チツプ部品搭載基板16を得る。このときの
端子部6の断面図を第9図に、上面図を第10図
に示す。 Next, as shown in FIG. 8, the outer portion 7 and the terminal portion 6 are cut from the double-sided copper-clad aluminum substrate 5 to obtain a chip component mounting substrate 16. A cross-sectional view of the terminal portion 6 at this time is shown in FIG. 9, and a top view is shown in FIG. 10.
その後、必要に応じて保護のため第11図に示
すように樹脂コート17を施し、このチツプ搭載
基板16の端子部6をマザーボードとなる印刷配
線板18の取付孔19に挿入し、一般的な方法で
半田20を施し、この半田20を施すことで第1
2図に示すようにチツプ部品搭載基板16のマザ
ーボードとなる印刷配線板18への接続固定と同
時に端子部6の表裏の導体パターン12を電気的
に接続し両面回路を構成する。 Thereafter, a resin coat 17 is applied as needed for protection as shown in FIG. By applying solder 20 according to the method and applying this solder 20, the first
As shown in FIG. 2, at the same time as the chip component mounting board 16 is connected and fixed to the printed wiring board 18 serving as the motherboard, the conductor patterns 12 on the front and back sides of the terminal section 6 are electrically connected to form a double-sided circuit.
以上のように本発明の印刷配線回路板の製造法
によれば、最終工程まで多数個のチツプ部品搭載
基板が連結されているため、工程が簡単で量産性
に富んだものとすることができ、端子部がその
まゝマザーボードとなる印刷配線板に直付けで
き、両面回路が構成できるため実装密度も高く、
アルミニウムを基材としているため耐熱性、放熱
性、耐燃性、寸法安定性に優れ、コスト面でも有
利とすることができるなどの効果をもち、工業的
価値の大なるものである。 As described above, according to the method for manufacturing a printed wiring circuit board of the present invention, a large number of chip component mounting boards are connected until the final process, so the process is simple and mass-producible. , the terminals can be directly attached to the printed wiring board that serves as the motherboard, and double-sided circuits can be configured, resulting in high packaging density.
Since it is made of aluminum as a base material, it has excellent heat resistance, heat dissipation, flame resistance, and dimensional stability, and is advantageous in terms of cost, making it of great industrial value.
第1図は従来の印刷配線回路板を示す斜視図、
第2図は本発明の印刷配線回路板の一実施例にお
ける両面銅張アルミニウム基板の斜視図、第3図
は同基板に打抜き加工を施した状態の斜視図、第
4図は同要部の拡大斜視図、第5図はエツチング
レジストを印刷した状態の要部斜視図、第6図は
半田層を形成した状態の断面図、第7図はチツプ
部品の装着状態を示す断面図、第8図は同斜視
図、第9図は同端子部の断面図、第10図は同上
面図、第11図はチツプ部品搭載基板をマザーボ
ードの印刷配線板に組込んだ状態の要部斜視図、
第12図は同要部の断面図である。
5……両面銅張アルミニウム基板、6……端子
部、7……外形の一部、8……アルミニウム露出
部、9……アルマイト層、10……銅箔表面、1
1……エツチングレジスト、12……導体パター
ン、13……半田層、14……チツプ部品、15
……接着剤、16……チツプ部品搭載基板、17
……樹脂コート、18……印刷配線板、19……
取付孔、20……半田。
FIG. 1 is a perspective view showing a conventional printed circuit board;
Fig. 2 is a perspective view of a double-sided copper-clad aluminum board in an embodiment of the printed wiring circuit board of the present invention, Fig. 3 is a perspective view of the same board after punching, and Fig. 4 shows the main parts of the same. 5 is an enlarged perspective view, FIG. 5 is a perspective view of the main part with the etching resist printed, FIG. 6 is a cross-sectional view of the solder layer formed, FIG. 7 is a cross-sectional view showing the state in which chip components are mounted, and FIG. 9 is a cross-sectional view of the terminal portion, FIG. 10 is a top view of the same, and FIG. 11 is a perspective view of the main parts of the chip component mounting board assembled into the printed wiring board of the motherboard.
FIG. 12 is a sectional view of the main part. 5... Double-sided copper-clad aluminum board, 6... Terminal part, 7... Part of external shape, 8... Exposed aluminum part, 9... Alumite layer, 10... Copper foil surface, 1
DESCRIPTION OF SYMBOLS 1... Etching resist, 12... Conductor pattern, 13... Solder layer, 14... Chip component, 15
...Adhesive, 16...Chip component mounting board, 17
... Resin coat, 18 ... Printed wiring board, 19 ...
Mounting hole, 20...Solder.
Claims (1)
形の一部を残して打抜き加工し、この打抜き加工
によるアルミニウム露出部を陽極酸化処理し、こ
の両面銅張アルミニウム基板の銅箔表面を研磨
し、これをエツチングして所定の導体パターンを
形成し、この導体パターンの必要とする部分に半
田層を施し、この導体パターンの所定位置にチツ
プ部品を実装した後、端子部および外形の一部を
切断してチツプ部品搭載基板とし、これをマザー
ボードとなる印刷配線板に組込み半田付けして接
続結合する印刷配線回路板の製造法。1. A double-sided copper-clad aluminum board is punched out leaving the terminal part and a part of the outer shape, the aluminum exposed part by this punching is anodized, the copper foil surface of this double-sided copper-clad aluminum board is polished, and After etching to form a predetermined conductor pattern, applying a solder layer to the required portions of this conductor pattern, and mounting chip components at predetermined positions on this conductor pattern, the terminals and part of the outer shape are cut. A method of manufacturing a printed circuit board, in which a circuit board is mounted with chip components, and this is assembled into a printed circuit board that becomes a motherboard and connected by soldering.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1601182A JPS58132990A (en) | 1982-02-03 | 1982-02-03 | Method of producing printed circuit board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1601182A JPS58132990A (en) | 1982-02-03 | 1982-02-03 | Method of producing printed circuit board |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS58132990A JPS58132990A (en) | 1983-08-08 |
JPS6330794B2 true JPS6330794B2 (en) | 1988-06-21 |
Family
ID=11904637
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1601182A Granted JPS58132990A (en) | 1982-02-03 | 1982-02-03 | Method of producing printed circuit board |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS58132990A (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP6008204B2 (en) | 2011-07-29 | 2016-10-19 | パナソニックIpマネジメント株式会社 | Device mounting substrate, semiconductor module and manufacturing method thereof |
-
1982
- 1982-02-03 JP JP1601182A patent/JPS58132990A/en active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS58132990A (en) | 1983-08-08 |
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