JPS63276276A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To obtain a semiconductor device having low source inductance and suitable for high-frequency applications, by utilizing a scribing region on a semiconductor substrate for forming a dividing region, and then forming grounding electrodes for connecting source electrodes to rear-face electrodes. CONSTITUTION:After source electrodes 2, drain electrodes and gate electrodes are formed on the surface of a GaAs substrate 1 with an insulating film 3 of SiO2 or the like interposed therebetween, the substrate 1 is bonded to a supporting substrate 5 of Si or quartz. The insulating film 3 and the GaAs in a scribing region of the GaAs substrate 1 is selectively etched off by using a photoresist film 6 as a mask, so that a groove 7 is provided, The groove is further excavated by means of a dicer to provide a pellet dividing region 8. The GaAs layer is removed completely and further the SiO2 film 3 on the groove 7 is removed. Then, the photoresist layer 6 is removed. Grounding electrodes 10 are formed for connecting the source electrodes 2 to rear-face electrodes 4. Finally, a region 8A for completely dividing the pellet is formed by means of a dicer.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method of manufacturing a semiconductor device, and particularly to a method of manufacturing a field effect transistor that can reduce source inductance and operate in a high frequency region.

[Conventional technology]

In recent years, field effect transistors (hereinafter referred to as GaAsFE) using conventional gallium arsenide have been used as devices for microwave amplification.
Instead of the aluminum gallium arsenide/gallium arsenide type heterojunction field effect transistor (hereinafter referred to as HE M
(denoted as T) is attracting attention. In particular, as a low-noise amplification element, Ga
Excellent performance surpassing that of AsFET has been achieved. It is also expected to operate in a higher frequency range.

In order to improve performance in this higher frequency region, gate length (L
g) Shorting the gate width (Wg) is effective, but source inductance (Ls) is another important factor.
There is a reduction in In the case of HEMTs, operation at higher frequencies (>20 GHz) is expected compared to GaAsFETs, and reduction of Ls is more important.

As a method for reducing Ls, the second
As shown in the figure, there is a via hole method in which the source electrode 2 is grounded from the back surface of the substrate 1, or a method in which the source electrode 2 is grounded from the side surface of the substrate 1 as shown in FIG.

[Problem that the invention seeks to solve]

The conventional method described above has the following problems.

First, there is a method of grounding from the back side as shown in FIG.
It is about μm. In this case, the substrate 1 (GaA
After etching s) to expose the source electrode 2, metallization (Au) is performed. At this time, wet etching has poor controllability when etching GaAs, so dry etching is usually used.
Problems remain with the shape, etching time, etc. Additionally, there is a problem with coverage during metallization.

Furthermore, in the method of metallizing the side surface of the substrate 1 as shown in FIG. 3, conventionally, after the wafer is separated into pellets, a metallized layer is formed on each pellet by Au plating or the like. For this reason, many man-hours are required and it is difficult to improve manufacturing yield.

An object of the present invention is to provide a method for manufacturing a semiconductor device in which connection between a source electrode and a back electrode is facilitated and manufacturing yield is improved.

[Means for solving problems]

The method for manufacturing a semiconductor device of the present invention includes the steps of bonding a semiconductor substrate having source, drain, and gate electrodes on the front surface through an insulating film and an electrode layer on the back surface to a support substrate, and a scribe area of the semiconductor substrate. selectively removing the insulating film on the semiconductor substrate and selectively etching the semiconductor substrate using the remaining insulating film as a mask to expose the electrode layer;
The method includes a step of providing a metal layer connecting the source electrode and an electrode layer on the back surface and then dividing the semiconductor substrate.

〔Example〕

Next, embodiments of the present invention will be described in detail with reference to the drawings.

FIG. 1 is a cross-sectional view of a semiconductor chip shown in the order of steps for explaining one embodiment of the present invention.

First, as shown in FIG. 1(a), a source electrode 2 is placed on the surface of a GaAs substrate 1 via an insulating film 3 made of SiO2 or the like.
．． After forming a drain electrode and a gate electrode (not shown), this GaAs substrate 1 is bonded to a support substrate 5 made of Si or quartz using electron wax or the like.

Next, as shown in FIG. 1(b), using the photoresist film 6 as a mask, the insulating film 3 and the GaAs substrate 1 in the scribe area of the GaAs substrate are selectively etched to form a pattern 7. In this etching of the GaAs substrate 1, for example, H2S04, H202, H20 is used as an etching solution.
If the mixed solution has a composition ratio of 3:1:1 and is used at 60°C, the etching rate is about 10 μm/min, and since the insulating film 3 is used as a mask, side etching is suppressed, and the etching speed is approximately 10 μm/min.
A groove 7 having a cross-sectional shape having a certain degree of inclination is obtained. In this case, if the thickness of the GaAs substrate 1 is 150, etching is performed to about 50, taking into account the lateral slope.

Next, as shown in FIG. 1C, a groove is formed using a dicer to form the separation region 8 of the pellet. in this case,
The GaAs substrate 1 is not completely separated.

Next, as shown in FIG. 1(d), the GaAs layer is completely removed by wet etching to expose the back electrode 4. This wet etching also has the effect of making the shape looser during dicing. Thereafter, the 5t02 film 3 on the layer 7 is removed by wet etching using buffered hydrofluoric acid, and then the photoresist layer 6 is removed. After that, a photoresist layer is formed again, and a mask is formed by patterning the photoresist layer 6A so that a part of the source electrode 2 is exposed.Next, as shown in FIG. 1(e), Au plating is applied. Thus, a grounding electrode 10 connecting the source electrode 2 and the back electrode 4 is formed. Next, as shown in FIG. 1(f), a groove is formed using a dicer to form a complete isolation region 8A of the pellet. In this case, the width is made narrower than the separation region 8 in the previous step.

Next, as shown in FIG. 1 (g), cleaning is performed to remove the photoresist 1-6A and separate the pellet from the support substrate 5.

As described above, in this embodiment, since the grounding electrode 10 is formed on the wafer, there are fewer man-hours and yield problems, which are required when metalizing individual pellets as in the conventional method. There is no difficulty in controllability as in the case of forming a grounding electrode on the source electrode of the source electrode.

In the above embodiment, the case where the grounding electrode 10 is formed by plating has been described, but it may be formed by sputtering method or the like.

〔Effect of the invention〕

As explained above, the present invention utilizes the scribe region of the semiconductor substrate -F, etches the semiconductor substrate using the insulating film as a mask, and then forms the isolation region with a dicer.
By using the step of forming a grounding electrode to connect the source electrode and the back electrode, the grounding electrode can be formed with high yield, and a semiconductor device with low source inductance suitable for high frequency applications can be obtained.

[Brief explanation of the drawing]

FIGS. 1(a) to <g> are cross-sectional views of a semiconductor chip shown in order of steps to explain an embodiment of the present invention, and FIGS. 2 and 3 illustrate a conventional method of manufacturing a semiconductor device. FIG. 1...GaAs substrate, 2...source electrode, 3...
Insulating film, 4... Back electrode, 5... Support substrate, 6, 6
A... Photoresist layer, 8,8A... Separation region,
1o...Grounding electrode. Agent Patent Attorney Uchihara Uchihara

Claims (1)

[Claims] A step of bonding a semiconductor substrate having source, drain, and gate electrodes on the front surface through an insulating film and an electrode layer on the back surface to a supporting substrate, and selectively removing the insulating film in the scribe area of the semiconductor substrate. A step of selectively etching the semiconductor substrate using the remaining insulating film as a mask to expose the electrode layer, and a step of dividing the semiconductor substrate after providing a metal layer connecting the source electrode and the electrode layer on the back surface. A method for manufacturing a semiconductor device, comprising: