JPS61174775A - Semiconductor device - Google Patents

Abstract

PURPOSE:To obtain a device characterized by a high speed and a large current, by providing semiconductor layers having large carrier affinity at the upper and lower sides of a quantum-well shaped potential structure, which supplies carriers, forming two-dimensional carrier gas in the vicinity of each heterojunction interface, and increasing surface concentration. CONSTITUTION:On semi-insulating GaAs, non-added GaAs 2, a quantum well structure 3, non-added GaAs 4 and N-type GaAs 5 are epitaxially grown. The quantum well structure 3 comprises non-added AlAs barriers 3a and 3c with a thickness of 1.5nm, a GaAs well 3b with a thickness of 1nm and 3d. The 3d is provided at the center of the well 3b. In the 3d, Si is added by about 3X10<12>/cm<2>. In this quantum well structure, the energy level of carriers in the layer 3 is enhanced. The surface concentration of the two-dimensional carrier gas in the vicinity of each heterojunction interface is largely increased. Since the two upper and lower layers are formed in the close proximity, the effect is multiplied. The increasing effect of the surface concentration is more effective for electrons than for holes. The effect is conspicuous when the thickness of the well 3 is 3nm or less.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a semiconductor device, particularly a semiconductor device in which carriers in a two-dimensional state with high mobility are formed at a high surface concentration, and a high speed and large current can be realized. Regarding.

Gallium arsenide (G
The practical application of compound semiconductors such as aAs) is progressing, and the impurity doping region and the carrier movement region are spatially separated, and high mobility semiconductors such as heterojunction field effect transistors, which use two-dimensional electrons as carriers, are being developed. Although various devices have been developed, conventional two-dimensional electron gas cannot obtain a high carrier concentration, and there is a desire to increase the carrier concentration.

[Conventional technology]

An example of the structure of the heterojunction field effect transistor is shown in FIG. 4 (al).

In this conventional example, on a semi-insulating GaAs substrate 21, a non-doped i-type GaAs layer 22, an aluminum gallium arsenide (AIXGa,-, As) layer 23 having a lower electron affinity than the non-doped i-type GaAs layer 22, and an impurity concentration of, for example, 2 x 1018 cm-''
An n-type GaAs layer 24 of about 100 mL is provided.

For example, the A'1 GaAs layer 23 has a non-doped region with a thickness of about 5 nm near the interface with the GaAs layer 22, and contains donor impurities at a concentration of about 2 x 10"cm-3 in the other regions, so that i-type GaAs can be formed from this layer. A two-dimensional electron gas 22e is formed near the Peter junction interface by the electrons transferred to the layer 22. For this reason, the AlGaAs1W23 is called an electron supply layer.

A source and drain layer 2 is formed on the n-type GaAs layer 24.
The n-type GaAs JW 24 between these two electrodes is selectively etched, and the gate electrode 26 provided in contact with the AlGaAs layer 23 allows the two-dimensional electron gas 22 to be etched.
Control the areal density of e.

In the conventional heterojunction field effect transistor as described above, there is a limit to the surface concentration Ns of the two-dimensional electron gas 22e. That is, the n-type^lGaAs electron supply layer 23
There is a limit to the donor impurity concentration of The surface concentration Ns of the gas 22e shows a saturation tendency that does not increase.

As a result, in the heterojunction field effect transistor, at a temperature of 77 K, the mobility of two-dimensional electron gas is, for example, 1!
= 8 x 10'cm"/Vsec, the surface concentration Ns is limited to about 6 x 10'cm" or less, and the current is restricted due to insufficient carrier concentration, and the ohmic contact resistance is , it is difficult to reduce the noise figure, increase the power, etc.

The present inventors previously proposed a structure for increasing the two-dimensional electron gas surface concentration of a heterojunction field effect transistor in Japanese Patent Application No. 58-2.
01481.

The semiconductor substrate according to the invention has, for example, the structure shown in FIG. 4(b). That is, an AlGaAs layer 33 which is a first electron supply layer, a non-doped i-type GaAs channel layer 34, and a second electron supply layer are formed on a semi-insulating GaAs substrate 31 via a non-doped i-type GaAs buffer I'1f32. AlGaAs layers 35 are sequentially provided.

The first electron supply 1'i33 is, for example, non-doped near the interface with the buffer layer 32, contains donor impurities at a concentration of about 1 to 5X10" am-3 in a region with a thickness of about 20 nm, and further has contact with the channel layer 34. A region with a thickness of approximately 20 nm near the interface is non-doped.

Further, the second electron supply layer 35 has a thickness of about 5 mm near the interface with the channel layer 34, for example, similar to the electron supply layer of the conventional example.
nm region is non-doped, and other regions are doped with 1 to 2 nm.
Contains donor impurities of the order of x10"am-'.

In this structure, the channel layer 34 supplies electrons with N35.33
and form a heterojunction, respectively, and two-dimensional electron gas is formed at the upper and lower interfaces. However, the channel layer 34
If the thickness is about 10 nm or less, the upper and lower two-dimensional electron gases will further fuse together. In this state, for example, when the mobility μ of the two-dimensional electron gas is 6×10′ cm 2 /Vsec, a surface concentration NS=1.2×10″c+n−″ is obtained.

[Problem that the invention seeks to solve]

Efforts have been made to increase the areal concentration of two-dimensional electron gas as in the example above, but in order to increase current and power, or reduce ohmic resistance and noise figure, efforts have been made to further increase the areal concentration of two-dimensional electron gas. There is a desire for this to increase.

Furthermore, when constructing a complementary circuit, it is necessary to increase the surface concentration of holes in a similar two-dimensional state.

Means for Solving Problem C] The problem is that the quantum well structure having one impurity-containing well layer and a 2N non-doped barrier layer has two non-doped layers having a higher carrier affinity than the barrier layer. This problem is solved by a semiconductor device according to the present invention, in which carriers in a two-dimensional state are provided between semiconductor layers and near the interface between the semiconductor layer and the quantum well structure.

[For production]

In the present invention, the semiconductor layer containing impurities and supplying carriers has a quantum well type potential structure, and semiconductor layers with high carrier affinity are provided above and below this quantum well structure, and the semiconductor layer near each heterojunction interface is A two-dimensional carrier gas is formed.

This quantum well structure increases the energy level of carriers in the carrier supply layer and increases the surface concentration of each two-dimensional carrier gas. Furthermore, since two layers of two-dimensional carrier gas are formed close to each other, the effect is doubled.

The effect of increasing the two-dimensional carrier gas surface concentration due to the quantum well structure of the present invention appears more strongly on electrons than on the front plate, and is obvious when the thickness of the well layer is about 3 nm or less.
This is particularly noticeable at a wavelength of about 5 nm or less.

〔Example〕

The present invention will be specifically explained below using examples.

FIG. 1(a) is a schematic side sectional view showing a semiconductor substrate according to the present invention, and FIG. 1(a) is an enlarged view of the main part thereof.

On a semi-insulating GaAs substrate 1, a non-doped GaAs layer 2 with a thickness of, for example, about 0.5 cm, a quantum well structure 3 as described below,
A non-doped GaAs layer 4 with a thickness of, for example, 15 cm, and a thickness of, for example, 50 cm with an impurity concentration of IXl018 cm-
About 3 layers of n-type GaAs layers 5 are sequentially epitaxially grown using a molecular beam epitaxial growth method at a growth temperature of 520° C., for example.

The quantum well structure 3 is constructed as follows. That is,
The barrier layers 3a and 3c are made of non-doped aluminum arsenide (AIAs) and have a thickness of, for example, 1.5 nm.

Further, the well layer 3b has a thickness of, for example, 1. Onm GaAs, with atomic plane doping of silicon (St) near the center.
ping) 3d to an areal density of approximately 3x10+zcm-2.

The energy level of the conduction band of each layer and the distribution of two-dimensional electron gas in this example are as shown in FIG.

However, in this figure, each semiconductor layer is indicated by the same reference numeral as in FIG. 1, and 6 indicates the probability distribution of the two-dimensional electron gas.

Although the two layers of two-dimensional electron gas are separated, they are very close to each other, and it is possible to treat these two layers as one conduction path.

In this example, measurement was performed using the Hall effect at a temperature of 77K, and the electron surface concentration Nsζ3X10''(2)-2,
The electron mobility μ# 2 XIO'cm''/Vsec is obtained. This electron surface concentration indicates that the atomically plane-doped St is completely ionized and a two-dimensional electron gas is generated.

FIG. 3 shows the values of the electron surface concentration Ns when the thickness of the GaAs well layer 3b is changed in a structure similar to that of the above embodiment. When the well layer is thick, for example, about 10 cm, the increase in the energy level of its electrons is small, and the electron surface concentration Ns
Although the increase in the well layer is small, the effect increases as the well layer becomes thinner, and is obvious when the well layer thickness is about 3 am or less, and becomes particularly noticeable when the well layer thickness is about 2.5 cm or less.

Note that the value of the electron surface concentration Ns obtained depending on the thickness of each well layer is controlled by the impurity doping of the well layer, and in this example, the value of the electron surface concentration Ns obtained by applying Si atomic plane doping is higher than that in the case of conventional uniform doping. Obtaining electronic surface concentration.

The structure of the semiconductor substrate of this example can be applied to various semiconductor devices such as heterojunction field effect transistors.
It becomes possible to significantly increase the current.

An equivalent structure in which holes are used as carriers is also possible, and the same effect of increasing the current can be obtained by applying it, for example, when configuring a complementary circuit or the like.

〔Effect of the invention〕

As explained above, according to the present invention, it is possible to significantly increase the surface concentration of carriers in a two-dimensional state by spatially separated doping and the heterojunction interface, and this makes it possible to significantly increase the surface concentration of carriers in a two-dimensional state, which is useful for various semiconductor devices such as heterojunction field effect transistors. It is possible to increase current and power, reduce ohmic contact resistance, and reduce noise figure.

[Brief explanation of the drawing]

Figures 1 (a) and (bl) are schematic side sectional views showing examples of the present invention; Figure 2 is a diagram showing an example of energy levels and two-dimensional electron gas distribution in this example; Figure 3 is a diagram showing examples of the distribution of two-dimensional electron gas; A diagram showing an example of the correlation between the thickness of the well layer and the electron surface concentration. A schematic side sectional view showing another conventional example of a semiconductor substrate of a transistor. In the figure, 1 is a semi-insulating GaAs substrate, 2 and 4 are non-doped GaAs layers, 3 is a quantum well structure, 3a and 3c are AlAs barrier layers, 3b is GaAs well layer, 3d is Si atomic plane doping, 5 is n-type G
aAs1°6 indicates a two-dimensional electron gas distribution. (Cb) Figure 2 ('b)

Claims (2)

[Claims] (1) A quantum well structure having one impurity-containing well layer and two non-doped barrier layers is provided between two non-doped semiconductor layers having a higher carrier affinity than the barrier layer, and the semiconductor layer and A semiconductor device characterized in that carriers in a two-dimensional state are formed near an interface with the quantum well structure. (2) The semiconductor device according to claim 1, wherein the well layer has a thickness of 3 nanometers or less.