JPS6436188A - Balance network setting system - Google Patents
Balance network setting systemInfo
- Publication number
- JPS6436188A JPS6436188A JP19118187A JP19118187A JPS6436188A JP S6436188 A JPS6436188 A JP S6436188A JP 19118187 A JP19118187 A JP 19118187A JP 19118187 A JP19118187 A JP 19118187A JP S6436188 A JPS6436188 A JP S6436188A
- Authority
- JP
- Japan
- Prior art keywords
- pseudo
- subscriber circuit
- balance network
- setting
- signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Interface Circuits In Exchanges (AREA)
Abstract
PURPOSE:To select and set a balance network automatically by providing a pseudo subscriber circuit, using a mixing signal having plural frequencies as the setting signal and measuring its reflection attenuation. CONSTITUTION:The setting signal having frequencies more than two kinds or over is inputted as a 4-wire side input to a hybrid circuit 11 in a pseudo subscriber circuit 15 provided separately via a test means 1 in the subscriber circuit, sent to a subscriber line and the reflection attenuation of the reflection signal is measured by switching pseudo balance networks 12-14 in the pseudo subscriber circuit 15. The pseudo balance network whose reflection attenuation is a prescribed value or over is selected and the balance network in the subscriber circuit 6 is set automatically based on the result. Thus, for example, a microprocessor is used to attain automation, the man-hour for setting is saved and the load of the software is releaved and accurate setting is attained.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19118187A JPS6436188A (en) | 1987-07-30 | 1987-07-30 | Balance network setting system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19118187A JPS6436188A (en) | 1987-07-30 | 1987-07-30 | Balance network setting system |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6436188A true JPS6436188A (en) | 1989-02-07 |
Family
ID=16270248
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP19118187A Pending JPS6436188A (en) | 1987-07-30 | 1987-07-30 | Balance network setting system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6436188A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0644708A (en) * | 1990-08-17 | 1994-02-18 | Quantum Corp | Method for determining position of head of data transducer head |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5580989A (en) * | 1978-12-15 | 1980-06-18 | Nec Corp | Automatic balancing system for exchange |
JPS5834667A (en) * | 1981-08-24 | 1983-03-01 | Hitachi Ltd | Balanced network selection control method |
JPS6143840A (en) * | 1984-08-08 | 1986-03-03 | Nec Corp | Adaptive type two-wire four-wire converting circuit |
-
1987
- 1987-07-30 JP JP19118187A patent/JPS6436188A/en active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5580989A (en) * | 1978-12-15 | 1980-06-18 | Nec Corp | Automatic balancing system for exchange |
JPS5834667A (en) * | 1981-08-24 | 1983-03-01 | Hitachi Ltd | Balanced network selection control method |
JPS6143840A (en) * | 1984-08-08 | 1986-03-03 | Nec Corp | Adaptive type two-wire four-wire converting circuit |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0644708A (en) * | 1990-08-17 | 1994-02-18 | Quantum Corp | Method for determining position of head of data transducer head |
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