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JPS6426899U - - Google Patents

Info

Publication number
JPS6426899U
JPS6426899U JP12173987U JP12173987U JPS6426899U JP S6426899 U JPS6426899 U JP S6426899U JP 12173987 U JP12173987 U JP 12173987U JP 12173987 U JP12173987 U JP 12173987U JP S6426899 U JPS6426899 U JP S6426899U
Authority
JP
Japan
Prior art keywords
electromagnetic wave
wave shielding
circuit element
curing
applying
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP12173987U
Other languages
Japanese (ja)
Other versions
JPH0537516Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1987121739U priority Critical patent/JPH0537516Y2/ja
Publication of JPS6426899U publication Critical patent/JPS6426899U/ja
Application granted granted Critical
Publication of JPH0537516Y2 publication Critical patent/JPH0537516Y2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
  • Conductive Materials (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、本考案の実施例に係る電磁波遮蔽処
理を施した回路素子を側面から見た第2図の―
断面図、第2図は、第1図の回路素子の一部を
欠截した底面図、第3図は、第1図の回路素子を
製造するためのマスキング工程を示す側面図、第
4図は、第1図の回路素子を製造するための導電
ペーストの塗布硬化工程を示す一部を欠截した側
面図である。 符号の説明、2……回路素子、6……接続電極
、8……パツケージ、10……絶縁部、12……
電磁波遮蔽層、14……マスキング層、16……
導電性層。
Figure 1 is a side view of a circuit element subjected to electromagnetic wave shielding according to an embodiment of the present invention, as shown in Figure 2.
2 is a partially cutaway bottom view of the circuit element shown in FIG. 1, FIG. 3 is a side view showing a masking process for manufacturing the circuit element shown in FIG. 1, and FIG. 4 is a cross-sectional view. 2 is a partially cutaway side view showing a process of applying and curing a conductive paste for manufacturing the circuit element of FIG. 1. FIG. Explanation of symbols, 2... Circuit element, 6... Connection electrode, 8... Package, 10... Insulating section, 12...
Electromagnetic wave shielding layer, 14... Masking layer, 16...
conductive layer.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 接続電極周辺以外のパツケージ表面に、導電ペ
ーストを塗布硬化して得られた電磁波遮蔽層を設
けたことを特徴とする電磁波遮蔽処理を施した回
路素子。
1. A circuit element subjected to electromagnetic wave shielding treatment, characterized in that an electromagnetic wave shielding layer obtained by applying and curing a conductive paste is provided on the package surface other than around the connection electrode.
JP1987121739U 1987-08-07 1987-08-07 Expired - Lifetime JPH0537516Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1987121739U JPH0537516Y2 (en) 1987-08-07 1987-08-07

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1987121739U JPH0537516Y2 (en) 1987-08-07 1987-08-07

Publications (2)

Publication Number Publication Date
JPS6426899U true JPS6426899U (en) 1989-02-15
JPH0537516Y2 JPH0537516Y2 (en) 1993-09-22

Family

ID=31369027

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1987121739U Expired - Lifetime JPH0537516Y2 (en) 1987-08-07 1987-08-07

Country Status (1)

Country Link
JP (1) JPH0537516Y2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4113371A1 (en) * 1990-04-24 1991-11-07 Fuji Heavy Ind Ltd DEVICE AND METHOD FOR PROCESSING A STEERING ANGLE SIGNAL

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5734354A (en) * 1980-08-08 1982-02-24 Mitsubishi Electric Corp Packaging method of electronic parts
JPS5858342U (en) * 1981-10-14 1983-04-20 株式会社リコー hybrid integrated circuit
JPS60163751U (en) * 1984-04-04 1985-10-30 スタンレー電気株式会社 semiconductor equipment

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5858342B2 (en) * 1976-01-19 1983-12-24 エーザイ株式会社 Dopamine derivatives and medicines containing dopamine derivatives

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5734354A (en) * 1980-08-08 1982-02-24 Mitsubishi Electric Corp Packaging method of electronic parts
JPS5858342U (en) * 1981-10-14 1983-04-20 株式会社リコー hybrid integrated circuit
JPS60163751U (en) * 1984-04-04 1985-10-30 スタンレー電気株式会社 semiconductor equipment

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4113371A1 (en) * 1990-04-24 1991-11-07 Fuji Heavy Ind Ltd DEVICE AND METHOD FOR PROCESSING A STEERING ANGLE SIGNAL

Also Published As

Publication number Publication date
JPH0537516Y2 (en) 1993-09-22

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