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JPS5249767A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS5249767A
JPS5249767A JP12531675A JP12531675A JPS5249767A JP S5249767 A JPS5249767 A JP S5249767A JP 12531675 A JP12531675 A JP 12531675A JP 12531675 A JP12531675 A JP 12531675A JP S5249767 A JPS5249767 A JP S5249767A
Authority
JP
Japan
Prior art keywords
electrodes
semiconductor device
flatterned
formaing
once
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12531675A
Other languages
Japanese (ja)
Inventor
Hideo Sunami
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP12531675A priority Critical patent/JPS5249767A/en
Publication of JPS5249767A publication Critical patent/JPS5249767A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/03—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/03—Manufacturing methods
    • H01L2224/0347—Manufacturing methods using a lift-off mask
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05556—Shape in side view

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Wire Bonding (AREA)

Abstract

PURPOSE: To form flatterned electrodes, by once formaing electrodes in electrode connecting part and extra hole alone then forming fresh electrodes later.
COPYRIGHT: (C)1977,JPO&Japio
JP12531675A 1975-10-20 1975-10-20 Semiconductor device Pending JPS5249767A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12531675A JPS5249767A (en) 1975-10-20 1975-10-20 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12531675A JPS5249767A (en) 1975-10-20 1975-10-20 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS5249767A true JPS5249767A (en) 1977-04-21

Family

ID=14907078

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12531675A Pending JPS5249767A (en) 1975-10-20 1975-10-20 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS5249767A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57145340A (en) * 1981-03-05 1982-09-08 Toshiba Corp Manufacture of semiconductor device
JPS57157545A (en) * 1981-03-25 1982-09-29 Toshiba Corp Manufacture of semiconductor device
JPS58159757U (en) * 1982-04-20 1983-10-25 三洋電機株式会社 semiconductor equipment
JPS62235758A (en) * 1986-03-21 1987-10-15 インタ−ナショナル・ビジネス・マシ−ンズ・コ−ポレ−ション Formation of conducting mutual connection
JPH02308539A (en) * 1989-05-23 1990-12-21 Hitachi Ltd Construction of electrode of semiconductor device
US5594280A (en) * 1987-10-08 1997-01-14 Anelva Corporation Method of forming a thin film and apparatus of forming a metal thin film utilizing temperature controlling means

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57145340A (en) * 1981-03-05 1982-09-08 Toshiba Corp Manufacture of semiconductor device
JPS57157545A (en) * 1981-03-25 1982-09-29 Toshiba Corp Manufacture of semiconductor device
JPS58159757U (en) * 1982-04-20 1983-10-25 三洋電機株式会社 semiconductor equipment
JPS62235758A (en) * 1986-03-21 1987-10-15 インタ−ナショナル・ビジネス・マシ−ンズ・コ−ポレ−ション Formation of conducting mutual connection
JPH0551175B2 (en) * 1986-03-21 1993-07-30 Ibm
US5594280A (en) * 1987-10-08 1997-01-14 Anelva Corporation Method of forming a thin film and apparatus of forming a metal thin film utilizing temperature controlling means
US5744377A (en) * 1987-10-08 1998-04-28 Anelva Corporation Method for forming a thin film and apparatus of forming a metal thin film utilizing temperature controlling means
JPH02308539A (en) * 1989-05-23 1990-12-21 Hitachi Ltd Construction of electrode of semiconductor device

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