JPS5992617A - Electronic tuning receiver - Google Patents

Abstract

PURPOSE:To attain tuning to a desired broadcast frequency by controlling a local oscillation frequency on the basis of the difference between an intermediate and a reference frequency. CONSTITUTION:The intermediate frequency of a two-step intermediate frequency circuit 6 is converted by a frequency counter 11 into a digital signal, which is compared by a digital comparator 13 with digital data corresponding to the reference frequency from a proper frequency storage circuit; when it is within a proper range, a high-level control output is supplied from the digital comparator 13 to a control circuit 10. The frequency division ratio of a programmable divider 91 is controlled by the signal from the control circuit 10 to divide the frequency of a local frequency oscillation circuit 3. This divided frequency is compared by a phase comparator 93 with the output of a crystal oscillator 92 and the oscillation frequency of a local oscillation circuit 3 is controlled by the comparison output to attain electronic tuning. Further, when an automatic search command signal is supplied to the control circuit 10, another frequency division ratio of the programmable divider 91 is selected.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an electronically tuned receiver that automatically performs a tuning operation.

The electronic tuning receiver is configured to detect a desired broadcast frequency, control the voltage variable capacitance element provided in the local frequency oscillation circuit, and perform the tuning operation. Prior to the present invention, the present inventor studied an auto-search receiver, provided a mechanical filter in the intermediate frequency circuit to pass the engineered F signal, and obtained the result when the amplitude of the output frequency was above a predetermined level layer. A method of using the signal as a full auto search stop signal was also considered.

However, according to studies by the inventor of the present invention, since the mechanical filter has a band width of 4 to 5 KHz, it is likely that a spurious action will occur when a spurious phenomenon occurs or due to harmonic components of the local oscillation frequency. Turns out it's a woman. That is, it has been revealed that the amplitude of the output frequency t of the mechanical filter becomes high due to signals other than the channel selection frequency signal, and malfunctions occur based on this.

SUMMARY OF THE INVENTION Accordingly, it is an object of the present invention to provide an electronically tuned receiver that can accurately tune to a desired broadcast frequency signal.

An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram of an AM receiver according to an embodiment of the present invention, in which a frequency f of broadcast frequencies received by an antenna 1 is transmitted by a tuning circuit (not shown) of a high frequency amplifier circuit 2. Assume that a channel has been selected. This frequency f8 has a variation Δf4 in the oscillation frequency of the broadcasting station, but its level is very small, and with 8 wave numbers, 8 has an accuracy of at least 6 digits or more.

When receiving the frequency Pf, the local frequency oscillation circuit 3:
Oscillates at frequency vIifLk. Note that the frequency f■, for example, is 45QK1(z~455KI(z(
(When receiving AM) There is a high frequency T. The frequency fl is
The oscillation frequency of a crystal oscillator (not shown) is used as a rather large standard, and its variation ΔfL is 90% smaller, and the frequency fL has an accuracy of at least 6 digits or more.

The frequencies f8 and fL are frequency-mixed in the mixing circuit 4, and the output frequency thereof is supplied to the first-stage intermediate frequency circuit 5. The output frequency of the frequency fo is further controlled by a two-stage intermediate frequency circuit 6.
supplied to The output signal of the two-stage intermediate frequency circuit 6, in other words, the IP flaw signal, is supplied to a detection circuit (not shown) and simultaneously supplied to the frequency comparator 8.

By the way, the F signal obtained from the two-stage intermediate frequency circuit 6 is a frequency signal with a center frequency fO and a variation of ±Δf.

However, the variation ±Δf is extremely small. The reason for this is
This is due to the fact that both frequencies fs and fL have an accuracy of six digits or more. The IF multiplied signal of f0±△f is supplied to the next stage frequency comparator 8, but this frequency comparator 8 has
For example, 450K from the branching device 95 that constitutes the PLL circuit 9.
) Tz frequency signal is supplied.

Note that the PLL circuit 9 compares the output signal of the programmable divider 91 and the oscillation frequency of the crystal oscillator 92 using a phase comparator 93, and uses the comparison amount to compare the output signal with the low-pass filter 9.
4 converts it into a direct current and supplies it to the local frequency oscillation circuit 3.

Further, the oscillation frequency 12 of the crystal oscillator 92 is divided into 17H by a frequency divider 95 and is supplied to the frequency comparator 8. Therefore, the frequency 450KH2 obtained from the frequency divider 95 of the PLL circuit 9 has extremely high accuracy.

The control circuit 10 is activated by the auto search command signal.
The frequency division ratio of the programmable divider 91 of the circuit 9 is selected to a certain value. At this time, the programmable divider 910 corresponds to the oscillation frequency of the local frequency oscillation circuit 3 depending on the frequency division ratio, and the appropriate broadcast signal is transmitted to the antenna 1 and the high frequency amplifier circuit 2.
If the power is being received by the intermediate frequency circuit 5.6
The output signal obtained from the output has an appropriate frequency of 450KH2
Either the key tone component has a frequency that is significantly different from the key tone component, or the output signal level is negligibly small. As a result, the control circuit 10 controlled by the output signal of the frequency comparator 8 via the low-pass filter 8' is controlled by the PLL circuit 9.
Setting the division ratio of the programmable divider 910 to the above value is abandoned, and the division ratio of the programmable divider 91 is selected to a still different value.

The oscillation frequency of the local frequency oscillation circuit 3 is set to a further different value depending on the frequency division ratio of the programmable divider 91 selected to be the different value. If an appropriate broadcast signal corresponding to the oscillation frequency of the local frequency oscillation circuit 3 is being received by the antenna 1 and the high frequency amplifier circuit 2 at this time, the amplitude level of the output signals of the intermediate frequency circuits 5 and 6 is sufficiently large. At the same time, the frequency of the output signal matches the appropriate frequency of 450KIIIz with extremely high precision.

The output signal of the intermediate frequency circuit 6 is 'Vo-out W. t, and an appropriate frequency signal ' vI '' Bbl W with a frequency division ratio of 95.
1 t , the frequency comparator 8 configured as an analog multiplier generates an output VoutV of the analog multiplication of the two input signals as follows.

Vout"Vodnw6t XvI"glnW1i-c
as (wn+w1) t) ・・−
...(1) Since w6=wI, the above equation (1) is transformed as follows.

2 (2) Since the second term in the above equation (2) is a high frequency component, it is attenuated by the low-pass filter 8' and is not transmitted to the control circuit 10.

Since the first term of the above equation (2) is a DC component, it is transmitted to the control circuit IO through the four-pass filter 8''lk, and as a result, the control circuit 10 uses the frequency division ratio of the programmable divider 91 of the PLL circuit 9. ii'' is held at a different value 1, and the auto search, that is, the automatic tuning operation to the broadcast signal is completed.

Furthermore, when the auto search command signal is completely supplied to the control circuit 10, the control circuit 10 divides the frequency of the programmable divider 91 of the PLL circuit! By selecting a different value for t-, an automatic search χ for a different broadcast signal is started.

In the AM radio receiver constructed as described above, there is no need to use a mechanical filter, which is advantageous when implementing an electronic tuning receiver into a semiconductor integrated circuit.

FIG. 2 is a block diagram of an AM receiver according to another embodiment of the present invention, in which the same parts as in FIG. 1 are given the same reference numerals and their explanation will be omitted, and particularly different parts will be explained.

A frequency counter 11 connected to the output terminal of the intermediate frequency circuit 6 sends out a multi-bit digital signal corresponding to the frequency of the output signal of the intermediate frequency circuit 6 to the lth data line. On the other hand, the appropriate frequency storage circuit 12 is RAM, ROM
etc., and sends a multi-bit digital signal corresponding to the appropriate frequency 450 Kl (z) of the AM radio receiver's signal to the data line.

The digital comparator 13 completely compares the digital signal on the data line tll with the digital signal on the data line tl, so that the frequency of the output signal of the intermediate frequency circuit 6 falls within a predetermined allowable frequency range with the appropriate frequency of 450 KHz Q center. If present, a high level control output signal is output from the digital comparator 13 to the control circuit 10.
supplied to

As a result, the control circuit 10 maintains the division ratio of the programmable divider 91 of the PLL circuit in this state, and the auto search is completed.

On the contrary, when the frequency of the output signal of the intermediate frequency circuit 6 is outside the above-mentioned permissible frequency range, a low-level control output signal is supplied from the digital comparator 13 to the control circuit 10, and the control circuit 10 outputs the PLL circuit. The ll ratio of the programmable divider 91 is selected to another value, and the automatic search for the broadcast signal is continued.

In addition, although the above-mentioned embodiment is applied to the present invention'lt AM radio receiver, the present invention is by no means limited to the above-mentioned telephone, but can also be applied to an FM radio receiver. .

For FM radio receivers, the appropriate frequency for the engineering signal is 10
．． It is 7MHz. Furthermore, the oscillation frequency of the crystal oscillator 92 is often set between 3MH2 and IQMH20. In this case, in the embodiment shown in FIG. 1, a counter or frequency divider (
(not shown) is provided between the frequency divider 95 and the frequency comparator 8, and another argument device or a frequency divider (not shown) 1 is provided between the frequency divider 95 and the frequency comparator 8. As a result, the frequency ratio *! 1 as a reference signal to 7 device 8
The frequency signal of the frequency divider 95 made into 7M is supplied, and l
/H so that the F signal is supplied. The ratio height of 1/M-1/N is selected depending on the oscillation frequency of the crystal oscillator 92.

Frequency comparator 8, low pass filter 8', control circuit 10
, PLL circuit 9, etc., are performed in the same manner as in the first embodiment described above. Therefore, even when the present invention is applied to an FM radio receiver, a control signal for performing all electronic tuning can be obtained with extremely high precision for the frequency fo1 of the F signal, for example, 10.7 MHz.

Furthermore, since it is possible to accurately tune to a desired broadcast frequency, and it is not necessary to provide a mechanical filter or the like, it can be easily integrated into a semiconductor integrated circuit and can be produced at low cost.

[Brief explanation of drawings]

FIG. 1 is a block diagram of an electronically tuned receiver showing one embodiment of the present invention. FIG. 2 is a block diagram of an electronically tuned receiver showing another embodiment of the invention. 2... High frequency amplifier circuit, 3... Local frequency oscillation circuit, 5.6... Intermediate frequency circuit, 8... Frequency comparator,
9...PLL circuit, 10...control circuit.

Claims (1)

[Claims] ■Detect the frequency of the intermediate frequency signal, and based on the detected output, select at least the local oscillation frequency when tuning the desired broadcast frequency? An electronically tuned receiver configured to maintain a predetermined frequency.