JPS59187272A - Electric constant measuring apparatus - Google Patents

Abstract

PURPOSE:To obtain results of the measurement at a high accuracy for a short time by measuring an electric constant of a circuit to be measured from a value in a specified phase of a reference voltage or current to be applied to the circuit being measured. CONSTITUTION:When a reference voltage is fed into a circuit 1 to be measured from a oscillator 4, a sine wave current advanced by phi in the phase flows through the circuit 1. This current is converted into a voltage advanced by phi with an I/V conversion circuit 5. At the points where the phase of the reference voltage is 0 deg. and 180 deg., this voltage shows a voltage ECM corresponding to the peak value of current flowing through a capacitor and a voltage ERM corresponding to the peak value of current flowing through a resistance at the points, 90 deg. and 270 deg.. Then, based on the sum of zero-crossing pulses of ZC detection circuits 12 and 13, a sampling pulse is generated to sample and hold these voltages which are converted into a digital data with an A/D conversion circuit 8. The digital data is processed to calculate the resistance value and the capacity value of the circuit 1.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to an electrical constant measuring device for measuring the resistance and reactance of a circuit in which a resistor and a coil or capacitor are connected.

Background technology and its problems An example of a conventional electrical constant measuring device is shown in FIG.

In this FIG. 1, (1) indicates a circuit under test, and this circuit under test (1) is a parallel circuit with an unknown resistance value R and an unknown capacitance value C, and a measurement terminal (2) and (3)
A known alternating current voltage (hereinafter referred to as reference voltage) Eme is supplied from the oscillator (4). When this reference voltage i is supplied, a current I=Imej(□1+1) flows through the circuit under test (1). φ is the phase difference between this current and the reference voltage. (5) indicates a current/voltage exchange circuit (hereinafter referred to as an I/V conversion circuit), and
The /v conversion circuit (5) converts the alternating current i flowing into the circuit under test (1) into an alternating current voltage proportional to it.

The output of the power/v conversion circuit (5) is the output of the AC/DC conversion circuit (6).
) is converted to DC voltage via Further, the output of the '/v conversion circuit (5) is compared in phase with the reference voltage output, which is the output of the oscillation circuit (4), in a phase comparison circuit (7). (
8) indicates an analog/digital conversion circuit (hereinafter referred to as A/D conversion circuit), and the A/N conversion circuit (8) converts the analog output of the AC/DC conversion circuit (6) and the phase comparison circuit (7) into digital. Convert it to data and supply it to the arithmetic unit (9).

The arithmetic unit (9) performs arithmetic processing on the supplied digital data and outputs resistance value data to one output terminal αQ and capacitance value data to the other output terminal α. Both outputs The data are displayed as numerical values on a display (not shown).

The admittance t of the circuit under test (1) becomes the above-mentioned reference voltage. Therefore, the conductance G and susceptance B of the circuit under test (1) are G=ycosφ=−B=Ysinφ−ωC, respectively. The absolute value Y of admittance is the AC-DC converter circuit (6
) and the phase φ is obtained as the output of the phase comparison circuit (7), so the circuit under test (1
) can be determined by calculation from the conductance G and susceptance B1, hence the resistance value R and the capacitance value C11-1, Y and φ.

The conventional measuring device requires a highly accurate phase comparator circuit (7), and the operation of the AC/DC converter circuit (6) requires a long time of several tens of cycles of the supplied reference voltage. It was also necessary to calculate the sine and cosine of the phase angle.

OBJECTS OF THE INVENTION In view of these points, an object of the present invention is to provide an electrical constant measuring device that improves the various drawbacks of conventional devices.

SUMMARY OF THE INVENTION The present invention applies a known alternating voltage or alternating current to a circuit under test in which a resistor and a coil or a capacitor, each of which has an unknown electric constant, is connected to the circuit under test. This device detects the alternating current flowing in the circuit or the alternating voltage generated, and measures the resistance value of the resistor and actance value of the coil or capacitor, making it possible to obtain highly accurate measurement results in a short time. be.

Embodiments Hereinafter, embodiments of the electrical constant measuring device of the present invention will be described with reference to FIGS. 2 to 8.

Prior to explaining the configuration of the embodiment, the basic concept of the present invention will be explained with reference to FIG.

Now, if we express the admittance of the circuit under test in which a resistor and a capacitor are connected in parallel in the form y=a+jn, then we can add a reference voltage E=E to this.
The current that flows when yl sin ωt is applied is i = (G
+jB) Emsinωt = GEmS stone ωt + BEmcosωt ・・・・・・・・・
...■. ■The first term on the right side of the equation is the current IR flowing through the resistor, and as shown by the solid line in Figure 2, ω1=
It becomes zero at 0° and ωt=180°. The second term is the current IC flowing through the capacitor, and becomes zero at ωt-90° and ωt=270°, as shown by the chain line in FIG.

Therefore, as is clear from Fig. 2, the IR peak values IBM appear at 90° and 270°, and at 0° and 180°.
The peak value M of the IC appears at the time ``.

The present invention achieves its objective by measuring these peak values.

A first embodiment of the invention is shown in FIG. In FIG. 3, parts corresponding to those in FIG. 1 are designated by the same reference numerals and redundant explanation will be omitted.

In Fig. 3, (6) and 2) indicate the first and second zero cross detection circuits (hereinafter referred to as ZC detection circuits), respectively, and the output of the oscillator (4) is directly connected to the first ZC detection circuit α■. 90 to the second ZC detection circuit (6).
The output of the oscillator (4) is supplied via the phase advance circuit α◆. The outputs of both ZC detection circuits (6) and (6) are then supplied to the OR circuit αe. α・denotes the first monostable multivibrator (hereinafter referred to as ■), and this first ■ff (1
0 is supplied with the output of the OR circuit (G). αη represents a sample and hold circuit (hereinafter referred to as SH circuit), and this SH
The analog output of the power/V conversion circuit (5) and the output pulse of the first MMVαe are supplied to the circuit α. The output of this SH circuit α is then supplied to an A/D conversion circuit (8). The α frame indicates a delay circuit, and this delay circuit (one frame delays the output of the first
supply to. These second ■α outputs are supplied to the /D conversion circuit (8). (A) and Qυ represent the first and second waveform shaping circuits, respectively, and directly supplies the output of the oscillator (4), and supplies the output of the 90° phase advance circuit α→ to the second waveform shaping circuit Qυ.

(2) shows an exclusive OR circuit, and this exclusive OR circuit (
The two are supplied with both waveform shaping circuits and the output of (21). (c) and (2) respectively indicate the first and second D flip flora, 7'' (hereinafter referred to as DFF);
The output of the first waveform shaping circuit is supplied to the DFF (2), and the exclusive OR circuit (2) is supplied to the second DFF (24).
Provides thirsty output. The output of the second MMVα is supplied as a clock to both DFFs (23) and (23). The outputs of both DF'F (23) and (24) are then supplied to the arithmetic unit (9).

The electrical constant measuring device of this example operates as follows.

When a reference voltage as shown in FIG. 4A is supplied from the oscillator (4) to the circuit under test (1), the circuit under test (1)
A sinusoidal current whose phase is advanced by φ as shown in FIG. C flows.

This current is converted into a voltage whose phase is advanced by φ by the "/D conversion circuit (5). This voltage whose phase is advanced by φ flows into the capacitor at the points where the phase of the reference voltage is 00° and 180° as described above. Voltage E corresponding to peak current value ICM
CM appears, and still at the 90° and 270° points a voltage ERM appears corresponding to the peak value IBM of the current flowing through the resistor.

On the other hand, the first ZC detection circuit (6) detects that the phase of the reference voltage supplied from the oscillator (4) passes the zero level at the 0° and 180° points, and detects the zero cross as shown in the fourth diagram. Generates a pulse. Similarly, the second zC detection circuit 0
'3 is the point at which the output of the 90° phase advance circuit α shown in FIG.
70° point) to generate the zero-cross pulse shown in FIG. 4E. When the zero-crossing pulses of both ZC detection circuits (6) and α■ are both supplied to the OR circuit (g), the output of the OR circuit ◇→ becomes the sum of both zero-crossing pulses. The output of this OR circuit α→ triggers the first ■■αQ, and
■α・ is the reference voltage 0', 90', 180' and 2
A sampling pulse as shown in FIG. 4F is generated, rising at an angle of 70°. Sampling hold circuit (
1 samples the analog output of the I/V conversion circuit (5) at points 00.90°, 180° and 2700 of the reference voltage by this sampling pulse pulse and holds the values for the duration of the sampling pulse.

The values sampled by this sample-and-hold circuit α are nothing but the ECM and ERM mentioned above. 1st ■■αQ
The sampling pulse, which is the output of (8) Convert the output of the sample and hold circuit α into digital data in response to the A/D conversion start pulse.

Since the delay time τ of the delay circuit Q is set longer than the hold completion time of the sample and hold circuit α, the voltage ERM and the peak value of the current flowing through the resistor and capacitor of the circuit under test (1) are ECM is reliably converted into digital data.

The computing unit (9) processes the digital data output from the A/D conversion circuit (8) to calculate the resistance and capacitance values of the circuit under test (1). A signal is required to determine which phase of the reference voltage it corresponds to.

First, in order to generate a signal for determining the positive or negative period of the reference voltage, an oscillator (4) is generated by the I-th waveform shaping circuit.
The output is formatted into a standard 9 lus as shown in FIG. 4H.

In addition, in order to create a signal that determines whether it corresponds to the 00 or 180° phase of the reference voltage, or the 90° or 270° phase, in other words, whether it is reactance or resistance, it is necessary to have a 90° phase advance. The output of the circuit α is shaped by the second waveform shaping circuit 0υ as shown in FIG. 4. Obtain a frequency-doubled pulse that inverts the reference voltage every 90 degrees as shown in Fig. Since it is possible to know whether the phase corresponds to Using the output pulse as a clock, the arithmetic unit (
9).

In this way, the conductance and capacitance of the circuit under test are obtained from the measured values Echt and ERM at the 00 and 90° phases of the reference voltage. Furthermore, 180° and 2
By averaging the absolute values of the measured values -ECM and -ERM at a phase of 70 degrees, ECM, ERM, and gold, respectively, it is possible to increase the accuracy of the measurement and remove the DC offset.

A specific example of the configuration of the I/'V conversion circuit (5) of the electrical constant measuring device of this example is shown in FIG. In this figure 5 (25)
indicates an operational amplifier, a feedback resistor (26) Rf is connected between the inverting input terminal and the output terminal of this operational amplifier (E), and the non-inverting input terminal is grounded. In such a configuration, when a current i is applied, the output voltage is e. --iRf is proportional to the multi-input current i.

This example electrical constant measuring device does not require the high-precision phase comparison circuit and AC/DC converter circuit used in the conventional example, and the measurement time only requires one period of the reference voltage (significantly shortened compared to the conventional example). I can do it.

Furthermore, since the calculation does not involve trigonometric functions, the configuration of the calculation unit is simplified.

A second embodiment of the invention is shown in FIG. In FIG. 6, parts corresponding to those in FIGS. 1 and 3 are designated by the same reference numerals, and redundant explanation will be omitted.

In FIG. 6, (5) shows a well-known seven point lock loop (hereinafter referred to as PLL), which includes a voltage controlled oscillator (hereinafter referred to as VCO) 12al, a phase comparator, and a low-pass filter (to). and amplifier 0]).

vco (gB output is supplied to the circuit under test (1) via a correction phase shift circuit 0.0) indicates a reference oscillator, and the output of this reference oscillator is divided into three frequency dividers ), (b) and the phase comparator (2) of PLL (27) via 0Q.
9) and also to the arithmetic unit (9). Further, the output of the first frequency divider (b) is supplied to the first MMVα, and the output of the second frequency divider (c) is supplied to the arithmetic circuit (9).

The PLL (27) is locked to the frequency and phase of the reference oscillator (to), which is stepped down to 1/8 by three frequency dividers (b) to (b), but the division shown in FIG. Since the phase difference between the rise point of the output of the VCO (2s) and the zero cross point of the sine wave output shown in FIG. Measurement circuit (
1) Phase O0 point of the reference voltage supplied to the frequency divider (G)
(rise of the output). The output of the frequency divider 0 is
As shown in Figure 7P, the frequency is four times that of the reference voltage supplied to the circuit under test (1), so the output of this frequency divider (b) is used to trigger the first , the sampling pulse shown in FIG. 7F is generated, and the sample hold circuit α
As in the previous embodiment, the force is applied when the phase of the reference voltage is 00.
At points 90', 180° and 270°, voltages ECM and ERM corresponding to -1 value of the current flowing through the capacitor and resistor to be measured are sampled and held. Also,
The output of the frequency divider (b) is used as a reference pulse to determine the positive or negative period of the reference voltage, and the frequency divider 0 shown in FIG.
It is also the same as in the above-mentioned embodiment that the output of → is multiplied by the frequency and the resistance or actance is determined.

The main part of the third embodiment of the present invention is shown in FIG.

In FIG. 8, (Is) indicates a circuit under test, and each circuit under test (IS) is a series circuit of an unknown resistance R and an inductance L, and an operational amplifier (two inverting input terminals and an output terminal The circuit under test is connected between the two, and the non-inverting input terminal of the operational amplifier (251) is grounded.

The circuit under test (IS) and the operational amplifier (2!51) constitute an impedance/voltage conversion circuit similar to the current/voltage conversion circuit shown in Fig. 5 above.The reference voltage of the oscillator (4) is When the constant current Ic5inωt is supplied to the impedance/voltage conversion circuit through the resistor Of), the voltage appearing at the output terminal of the operational amplifier (2ω) is M−−(R+iωL
)IcsIfIωt= (RI c sinω 10ω
LIC possible ωt)......■. Since this equation 0 has a dual relationship with the previous equation 0, in the above-mentioned embodiment, the current flowing through the circuit under test (1) is the voltage, and the parallel admittance of the circuit under test is connected in series. The principle of duality is that if the impedances are replaced with each other, the explanation of this embodiment will be the same.
of duality).

This example is particularly suitable for displaying constants of the circuit under test as series impedance.

It should be noted that it is easy to understand that the present invention is not limited to these embodiments, and that many modifications are possible.

Effects of the Invention As detailed above, according to the present invention, the electrical constants of the circuit under test are measured from the reference voltage or current value at a predetermined phase of the current applied to the circuit under test. High-precision measurement results can be obtained in a short time without requiring a high-precision phase comparison circuit, an AC/DC conversion circuit that requires a long operating time, and trigonometric function calculations.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing a configuration example of a conventional electrical constant measuring device, FIGS. 2, 4, and 7 are diagrams for explaining the present invention, and FIG. 3 is a diagram showing an example of the present invention. FIG. 5 is a wiring diagram showing the main parts of FIG. 3, FIG. 6 is a block diagram showing the configuration of another embodiment of the present invention, and FIG. 8 is a diagram showing still another embodiment of the present invention. FIG. 3 is a wiring diagram showing main parts of an example. (4) is an oscillator, (5) is a current/voltage conversion circuit, (8)
is an analog/digital conversion circuit, (9) is an arithmetic unit, (6
) and (1) is the zero cross detection circuit, CL and (to)
is a monostable multipipe lake, α power is a sample and hold circuit, (c) and (2I) are waveform shaping circuits, (27) is a PLL, (28) is a voltage controlled oscillator, 0 is a reference oscillator, (b) ~ OQ is a frequency divider.

Claims (1)

[Claims] A known alternating current voltage or alternating current is applied to a circuit under test to which a resistor and a coil or capacitor, each of which has an unknown electric constant, is connected, and the alternating current that flows through the circuit under test at a predetermined phase of the alternating current voltage or alternating current is measured. An electrical constant measuring device characterized in that the resistance value of the resistor and the actance value of the coil or capacitor are measured by detecting current or generated alternating voltage.