JP2589817Y2 - LCR tester - Google Patents

Description

[Detailed description of the invention]

[0001]

This invention relates to an LCR tester.
More specifically, the present invention relates to an LCR tester that applies an AC voltage for measurement to a sample from an external signal source and measures the characteristics of the sample without owning the signal source.

[0002]

2. Description of the Related Art When measuring the inductance of a coil, the capacitance of a capacitor, or the resistance of a resistance element, a circuit component measuring device generally called an LCR tester is used. This type of apparatus applies, for example, an AC voltage for measurement from a self-built signal source to a test part (hereinafter, referred to as a “sample”), and outputs 0 ° components of the AC voltage and an AC current flowing through the sample. Each of the 90 ° components is detected and used as phase-related basic data, and various characteristics of the sample are calculated by using these data.

FIG. 6 shows a general example of a conventional apparatus. For example, a signal source 11 includes a reference clock generator 12 and a sine wave generator 13, and sends out an AC voltage v for measurement at a frequency f. It is supposed to.

This AC voltage v is, for example,
Is applied to the sample 2 and the AC current i flowing through the sample 2 is detected by the current detector 3 after being converted into a voltage Vi indicating the current. The AC voltage Vv applied to the sample 2 is detected by the voltage detector 4, and these two detected voltages Vi and Vv are applied to the synchronous detection circuit 14.

[0005] The two-phase signal generator 15 receives, for example, the output voltage v of the signal source 11 and synchronizes with the frequency f of the signal source 11 so that the two square-wave signals V (0) and V (90) differ in phase by 90 °.
゜) is formed and applied to the synchronous detection circuit 14 to control the detection operation.

As a result, the synchronous detection circuit 14 outputs a voltage Vi (0 °) corresponding to a half cycle from one cycle of the input voltages Vi and Vv, for example, while one square wave signal V (0 °) is applied. And Vv (0 °), and while the other square wave signal V (90 °) is applied, the phase of the input voltage of the same one cycle is 9 with the above Vi (0 °) and Vv (0 °).
The voltages Vi (90 °) and Vv (90 °) for half cycles different by 0 °
Ii).

[0007] The four half-period voltages thus taken in are integrated, for example, into an integral A / D converter 1 having four conversion elements.
At 7 each is digitally converted. In this case, the clock generator 16 divides, for example, the clock frequency of the reference clock generator 12 to form a sampling clock having a frequency that is s times the output frequency f of the sine wave generator 13, and forms an A / D converter 17 To give to.

The CPU 18 outputs four voltage data Vi (0) digitally converted by the A / D converter 17.
゜), Vv (0 ゜), Vi (90 ゜), Vv (90 ゜)
Into, for example, the temporary memory 19, read it out, calculate the average value of each, and obtain the DC 0 ° component voltages Vic, Vvc,
And 90 ° component voltages Vis and Vvs are obtained, and these values are stored in the memory 19 as phase-related basic data.

The reference clock generator 12 of the signal source 11
Is provided with, for example, a quartz oscillator (not shown) and a PLL circuit including a frequency divider, and the repetition period of the reference clock can be changed by manual operation. The sine wave generator 13 includes, for example, an address counter (not shown), a memory holding level data at m points at equal time intervals from one cycle of the sine wave voltage, a D / A converter, and a low-pass filter. The output of the counter that counts the reference clock supplies the data of the memory to the D / A converter, and generates a sine wave voltage having a relatively smooth waveform through a low-pass filter.

Next, the outline of the operation of each unit will be described with reference to FIG. In FIG. 6, the same reference numerals are given to the portions where the signals shown in FIG. 7 appear. Signal source 11
For example, when the reference clock shown in FIG. 7A is generated from the reference clock generator 12 shown in FIG. 7A, the sine wave generator 13 sends out the measurement AC voltage v having the frequency f shown in FIG. It is applied to sample 2 via amplifier 1.
As a result, an alternating current i having a magnitude inversely proportional to the impedance of the sample 2 flows through the sample 2. The current detector 3 converts the current into a voltage Vi and detects the voltage.
Is detected.

The synchronous detection circuit 14 receives, for example, signals from the two-phase signal generator 15 of square waves having phases different from each other by 90 ° as shown in FIGS. 7 (C) and 7 (F). Here, for example, the signal of (C) will be referred to as a 0 ° signal, and the signal of (F) will be referred to as a 90 ° signal.
゜). An internal switch circuit (not shown) is turned on and off by the two-phase signal. For example, when one square wave signal V (0 °) is applied, as shown in FIGS. Voltages Vv (0 °) and Vi (0 °) corresponding to a half cycle of the detection voltages Vv and Vi are output from the synchronous detection circuit 14. Also, for example, the other square wave signal V (90 °)
Is added, as shown in FIGS. 7G and 7H,
Voltages Vv (90 °) and Vi (90 °) for a half cycle whose phases differ from Vv (0 °) and Vi (0 °) by 90 °.
Is output.

The A / D converter 17 has, for example, four integral A / D conversion elements (not shown), and the input voltage Vv
(0 °), Vi (0 °), and Vv (90 °), Vi
(90 °) given from the clock generator 16 in FIG.
It is sampled by a clock of frequency f × s shown in (J) and digitally converted. For example, assuming that the voltages v and i shown in FIG. 7B are respectively v = Vmsin (ωt−θ1) i = Imsin (ωt−θ2), and Vv = V for simplification, Vv = Vmsin (ωt−θ1) It is. The detection output Vi of the current detector 3 is Vi = Vimsin (ωt−θ2). Here, Vm is the maximum value of the voltage v, and Im is the current i.
Is the maximum value when the current i is converted to the voltage Vi. Further, θ1 and θ2 are phase delays from the origin 0, ω represents angular velocity, ω = 2πf, and f is the frequency of voltage and current, respectively.

Here, the synchronous detection circuit 1 shown in FIG.
The digital conversion data of the detection output Vv (0 ゜) of No. 4 is

[0014]

(Equation 1) The digital conversion data of the detection output Vi (0 °) shown in FIG.

[0015]

(Equation 2) The digital conversion data of the detection output Vv (90 °) shown in FIG.

[0016]

(Equation 3) The digitally converted data of the detection output Vi (90 °) shown in FIG.

[0017]

(Equation 4) Becomes Here, for example, FIGS. 7 (D), (E), (G),
In the hatched area (H), the absolute values are equal and the positive and negative polarities are opposite, so they are canceled during the integration operation of the A / D converter 17, and the digital conversion data is shown in FIG.
(K), (L), (M), and (N).
8 (K) to 8 (N) are expressed in analog for convenience.

The CPU 18 operates as shown in FIGS. 8 (K) to 8 (N).
Is divided by the half cycle π, which is the integration range, and the DC average voltages Vvc, Vic, Vvs, and Vis are calculated as shown in (P), (Q), (R), and (S) of FIG. Each is calculated and used as phase-related basic data. That is,

[0019]

In the above-mentioned conventional LCR tester, the frequency range of the measuring AC voltage generated from the signal source is determined by the apparatus. Therefore, if it becomes necessary to measure the characteristics of the sample at a frequency outside the range, it is difficult to respond.

Further, since the frequency of the measurement signal is usually transmitted in the form of a spot at a predetermined interval, it is difficult to measure, for example, when it is desired to measure at an intermediate frequency.

This invention has been made in view of the above circumstances, and its purpose is to use a signal generator provided in a test room or a factory as an external signal source to apply an AC voltage of a desired frequency to a sample. Another object of the present invention is to provide an LCR tester capable of measuring the characteristics of a signal source without owning the signal source.

[0022]

In order to achieve the above object, in the present invention, as shown in FIG. 1, an AC voltage is applied to a sample to be measured, and the applied AC voltage and a current flowing through the sample are applied. LC that obtains phase-related basic data from the detected values and calculates various characteristics of the sample using the data.
In the R tester, a current detector 3 for applying an AC voltage for measurement from an external signal source to the sample 2 mounted on the test terminals T2 and T3, converting the current i flowing through the sample 2 into a voltage Vi, and detecting the same. A voltage detector 4 for detecting a voltage Vv between both ends of the circuit, and a PLL circuit 5 receiving the AC voltage for measurement from the external signal source and generating a clock having a frequency f · s which is s times the AC voltage frequency f. And A / D converters 6 and 7 that sample and convert digitally n levels from one cycle of the detection voltages Vi and Vv in parallel with the clock timing and measure the frequency f of the measurement AC voltage. A frequency measurement circuit 9 and two tables A (m) and B (m) in which n multiplication constants are arranged in a predetermined array, and the detection voltages Vi and V Of the digital conversion data corresponding constants of the table A (m) or B (m) is integrated by multiplying respectively, the Vi, and 0 ° component of Vv 9
It is characterized by including a CPU 8 for calculating the 0 ° component to form phase-related basic data, and for obtaining characteristics of the sample 2 using the basic data and the frequency measurement data of the frequency measurement circuit 9.

In some cases, the magnification s in the PLL circuit 5 may be set to 1, and the A / D converters 6 and 7 may be sampled at the frequency f of the measurement AC voltage.

[0024]

For example, among the n pieces of digitally converted data in one cycle of the detected measurement AC voltage Vv, data of half cycle from No. 1 to No./2 are respectively stored by the CPU 8 in the table A (m). Multiply by constant 1 and n / 2 +
Multiplying the data for the half cycle from the first to the n-th by multiplying by the constant 0 of the same table A (m), the following equation is obtained: ｛Vv (1) × 1 + Vv (2) × 1 +. 2) × 1｝ + ｛Vv (n / 2 + 1) × 0 + Vv (n / 2 + 2) × 0... + Vv (n) × 0｝ = Vv (1) + Vv (2) +... + Vv (n / 2 ). Therefore, when the right-hand side of the above equation is divided by the number of effective data n / 2, a half cycle of the AC voltage Vv, that is, an average DC voltage in which n is the first to n / 2 is obtained, and FIG. Is equivalent to the voltage shown in FIG. Therefore, the obtained average DC voltage is set as Vv (c), and represents the 0 ° component of the AC voltage Vv. Similarly, n digital conversion data Vi (1), Vi in one cycle of the current i
(2),..., Vi (n) are multiplied by the respective constants in Table A (m), and the integrated value is divided by the number of effective data n / 2, to obtain a current i equivalent to the voltage shown in FIG. A DC average voltage Vic representing the 0 ° component of is obtained.

Next, a table B (m) is added to each digital conversion data during one cycle of the detected AC voltage Vv.
定 数 Vv (1) × 0 + Vv (2) × 0 +... + Vv (n / 4) × 0 + Vv (n / 4 + 1) × 1 + Vv (n / 4 + 2) × 1 +... + Vv (3n / 4 + 2) × 1 + Vv (3n / 4 + 1) × 0 + Vv (3n / 4 + 2) × 0 +... + Vv (n) × 0｝ = Vv (n / 4 + 1) + Vv (n / 4 + 2) +. (3n / 4). Therefore, when the right side of the above equation is divided by the number of valid data n / 2, an average DC voltage during the half cycle of the AC voltage Vv from n / 4 + 1 to 3n / 4 is obtained.
It becomes equivalent to the voltage shown in (R). Therefore, the obtained DC average voltage is set as Vvs, and represents the 90 ° component of the AC voltage Vv. Similarly, each digital conversion data Vi (1), Vi (2),.
When Vi (n) is multiplied by each constant of table B (m) and the integrated value is divided by the effective data number n / 2, FIG.
A DC average voltage Vis representing the 0 ° component of the current i equivalent to the voltage shown in FIG.

[0026]

Referring again to FIG. 1, in an embodiment of the present invention, the PLL circuit 5 includes, for example, a voltage-controlled oscillator (not shown), a 1 / s frequency divider, and a phase comparator, and receives an external signal having a frequency f. A clock having a frequency f × s is transmitted.

The A / D converters 6 and 7 use the clock to detect the detection outputs Vi and Vv of the current detector 3 and the voltage detector 4.
Are sampled and digitally converted as shown in FIGS. 2A and 2B and FIGS. 2C and 2D, respectively.

The frequency measuring circuit 9 includes, for example, a 1 / s frequency divider and a counter, and receives the output of the PLL circuit 5 to measure the frequency f of the external signal. In this case, the frequency may be measured by directly receiving the external signal from the terminal T1.

The CPU 8 monitors, for example, the stabilization of the measurement frequency of the frequency measurement circuit 9, controls the conversion operation for one cycle in the A / D converters 6, 7, controls the writing and reading of data to and from the memory 10, and also controls necessary data. Is calculated. For example, the digitally converted data Vv (m) and Vi (m) of Vv and Vi are first written into the memory 10,
Next, the written data and a multiplication constant A previously written in the memory 10 shown in FIGS.
(M) and B (m) are read out, and the 0 ° components Vvc and Vic of the voltages Vv and Vi, and the 90 ° components Vvs thereof,
Calculate Vis equal phase related basic data.

Based on the basic data, the phase difference θ between the voltage v and the current i, the impedance Z or admittance Y of the sample, and the resistance component R are calculated, and the measurement frequency f of the frequency measurement circuit 9 is used to calculate the same sample. L and C components and Q,
D and the like are calculated. These calculation data are stored in the memory 10.

Here, the operation of each unit will be described with reference to FIGS. 4 and 5. In FIG. 1, reference numerals are given to portions where the signals shown in FIGS. 4 and 5 (A) to (T) appear.

Now, for example, an input terminal T1 is supplied from an external signal source.
When an AC voltage for measurement having a frequency f is applied, the voltage is applied to the sample 2 attached to the terminals T2 and T3 via the buffer amplifier 1 on the one hand, and to the PLL circuit 5 on the other hand. As a result, an alternating current i having a magnitude inversely proportional to the impedance flows through the sample 2, and the current detector 3 passes this current through a reference resistor (not shown) to convert the current into a voltage Vi and detect the voltage Vi. FIG. 4A shows a voltage Vi representing this current.
Shown in The voltage Vv between the terminals T2 and T3 is detected by the voltage detector 4. This detection voltage Vv is
It is shown in (A).

On the other hand, the PLL circuit 5 receives the voltage f.times.s shown in FIG.
(Where s ≧ 2), for example, A /
The signal is sent to the D converters 6 and 7 and the frequency measurement circuit 9.

At the clock timing, the A / D converters 6 and 7 sample the voltages Vi and Vv for one cycle, for example, and perform digital conversion. This conversion data Vi
(M) and Vv (m) (where m = 1, 2,..., N) are shown in (D) and (C) of FIG. Here, the data is expressed in an analog state for convenience. These converted data are temporarily stored in the memory 10 in the sampling order via the CPU 8, for example.

The CPU 8 converts the converted data and the multiplied data A shown in FIG.
(M) is read, and the data A (m) is multiplied by the corresponding conversion data. FIG. 4 (F),
(G) is shown. Similarly, the multiplication data B shown in FIG.
(M) is read and multiplied by the corresponding conversion data.
It is shown in FIGS. 4 (J) and (K).

Next, FIGS. 4 (F), (G), (J),
The multiplication values in (K) are integrated. In this case, for example, data in a hatched area are offset because the absolute values are equal and the positive and negative polarities are opposite.
(L), (M), (N) and (P) are obtained. C
The PU 8 further divides these integrated values by the number of valid data, that is, the number of data n / 2 for a half cycle, and obtains a direct current as shown in (Q), (R), (S), and (T) of FIG. And calculate the average voltages Vvc, Vic, Vvs, and Vis as phase-related basic data.

For example, when the detection voltage Vv shown in FIG.
゜ For the component Vvc,

[0038]

(Equation 5) Regarding the 0 ° component Vic of the detection current Vi shown in FIG.

[0039]

(Equation 6) The 90 ° component Vvs of the detection voltage Vv shown in FIG.
about,

[0040]

(Equation 7) The 90 ° component Vis of the detection current Vi shown in FIG.
about,

[0041]

(Equation 8) Becomes

Note that the output frequency magnification s of the PLL circuit 5 may be set to 1, and the frequency of the measuring AC voltage applied from an external signal source may be used as the sampling clock of the A / D converters 6 and 7. Is PL
The L circuit 5 can be omitted.

[0043]

[Effects] As described in detail above, L according to the present invention is used.
In the CR tester, for example, an AC voltage for measurement is applied to the sample 2 from an external signal source, and the current i flowing through the sample is changed to
a current detector 3 that converts the current to i and detects the voltage, a voltage detector 4 that detects the AC voltage Vv applied between both ends of the sample,
A PLL circuit 5 for generating a clock having a frequency f · s which is s times the AC voltage frequency f, and an A / A for sampling and digitally converting n levels at each of the clock timings from one cycle of the detection voltages Vi and Vv. D converters 6 and 7 are provided.

A memory 10 previously holding two tables A (m) and B (m) in which n / 2 multiplication constants 1 and 0 are arranged in a predetermined array, and a frequency of the AC voltage f, a frequency measuring circuit 9 for measuring the
Table A (m) for each digital conversion data of i and Vv
Or, by multiplying and integrating the corresponding constants of B (m) to calculate the 0 ° component and the 90 ° component equal phase related basic data of the above Vi and Vv, and using the basic data and the above frequency measurement value f, C to calculate various characteristics of sample
PU8 is provided.

Therefore, according to this invention, it is possible to measure the characteristics of a sample by inputting an AC voltage having a desired frequency from an external signal source, to collect data in a relatively wide frequency band and to finely change the frequency. This is suitable when performing detailed analysis of the characteristics by using the above method. Further, since the phase-related basic data is obtained by software, a synchronous detection circuit or the like in the conventional device is not required, and since there is no measurement signal source, the configuration can be simplified and the cost of the device can be reduced.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an electrical configuration of an LCR tester according to an embodiment of the present invention.

FIG. 2 is an explanatory view showing the correspondence between sampling points of a voltage waveform and a current waveform and digital conversion data thereof.

FIG. 3 is an explanatory diagram showing correspondence between numbers of digitally converted data of voltage and current and multiplication constants.

FIG. 4 is a waveform chart for explaining the operation of each unit.

FIG. 5 is a waveform chart for explaining the operation of each unit.

FIG. 6 is a block diagram showing an electrical configuration of a conventional device.

FIG. 7 is a waveform chart for explaining the operation of each part of the conventional device.

FIG. 8 is a waveform chart for explaining the operation of each part of the conventional device.

[Explanation of symbols]

 2 Sample to be measured 3 Current detector 4 Voltage detector 5 PLL circuit 6 A / D converter 7 A / D converter 8 CPU 9 Frequency measurement circuit 10 Memory A (m) Multiplication table B (m) Multiplication table f AC voltage frequency

Claims (2)

(57) [Scope of request for utility model registration] 1. An AC voltage is applied to a sample to be measured, phase-related basic data is obtained from detection values of the applied AC voltage and a current flowing through the sample, and various characteristics of the sample are calculated using the data. In the LCR tester, a current detector 3 for applying an AC voltage for measurement from an external signal source to the sample 2 mounted on the test terminals T2 and T3, converting the current i flowing through the sample 2 into a voltage Vi, and detecting the same. A voltage detector 4 for detecting a voltage Vv between both ends of the circuit, and a PLL circuit 5 receiving the AC voltage for measurement from the external signal source and generating a clock having a frequency f · s which is s times the AC voltage frequency f. And A / D converters 6 and 7 for sampling and converting digitally n levels from one period of the detection voltages Vi and Vv in parallel with the clock timing.
And a frequency measurement circuit 9 for measuring the frequency f of the measurement AC voltage and a memory 1 holding two tables A (m) and B (m) in which n multiplication constants are arranged in a predetermined array.
0 and the digital conversion data of the detected voltages Vi and Vv are multiplied by the corresponding constants of the table A (m) or B (m), respectively, and integrated, and the 0 ° component and the 90 ° component of the Vi and Vv are calculated. An LCR tester comprising: a CPU 8 that calculates and forms phase-related basic data, and obtains a characteristic of the sample 2 using the basic data and the frequency measurement data of the frequency measurement circuit 9. 2. An output frequency magnification s of said PLL circuit 5 is 1, and said A / D converters 6 and 7 perform a sampling operation at a frequency f of said measuring AC voltage. The LCR tester as described.