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JPS5911663A - Manufacture of capacitor for semiconductor device - Google Patents

Manufacture of capacitor for semiconductor device

Info

Publication number
JPS5911663A
JPS5911663A JP12089682A JP12089682A JPS5911663A JP S5911663 A JPS5911663 A JP S5911663A JP 12089682 A JP12089682 A JP 12089682A JP 12089682 A JP12089682 A JP 12089682A JP S5911663 A JPS5911663 A JP S5911663A
Authority
JP
Japan
Prior art keywords
oxide film
tantalum oxide
film
ultra
silicon nitride
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12089682A
Other languages
Japanese (ja)
Inventor
Shuichi Shirakawa
白川 修一
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP12089682A priority Critical patent/JPS5911663A/en
Publication of JPS5911663A publication Critical patent/JPS5911663A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

PURPOSE:To reduce the leakage currents of a tantalum oxide film by forming an ultra-thin silicon nitride film between the tantalum oxide film and a silicon substrate, forming a nitrogen-concentration gradient, and reducing stress in the interface between the tantalum oxide film and the ultra-thin silicon nitride film. CONSTITUTION:A direct interaction between the tantalum oxide film 4 and the silicon semiconductor substrate 1 is obstructed owing to the ultra-thin silicon nitride film 2, and leakage currents are reduced. The nitrogen concentration gradient of which nitrogen concentration in the tantalum oxide film 4 increases in the interface 5 in the film thickness direction and decreases gradually toward the surface 6 of the tantalum oxide film and gradually increases again and reaches the surface 6 of the tantalum oxide film can be formed through heat treatment for two hrs. at 1,100 deg.C in NH3 gas, and tantalum oxide film layers 7, 7' of high nitrogen concentration are each formed. The oxide film layer 7 functions as a buffer layer relaxing stress resulting from the difference of thermal expansion coefficients because it has an intermediate thermal expansion coefficient of the tantalum oxide film 4 containing no nitrogen and the ultra-thin silicon nitride film 2, and leakage currents in the tantalum oxide film can be reduced.

Description

【発明の詳細な説明】 本発明は半導体装置用キャパシタの製造方法に関する。[Detailed description of the invention] The present invention relates to a method of manufacturing a capacitor for a semiconductor device.

従来、半導体装置用キャパシタには、金属あるいは半導
体へ絶縁層全付着し、さらに金属等の電極を被着した構
造のものが用いられてきた。絶縁膜としては2酸化シリ
コン(8i0z)、アルミナ(A[203)、窒化シリ
コン(8i3N4)等の膜が用いられて来た。実装密度
の増加が望まれているためにこれらの絶縁膜よりも大き
な誘電率をもち、かつ極端に薄い誘電体膜が要求されて
来た。、1981年春季応用物理学会学術講演会講演予
稿集第588頁にタンタル酸化物の誘電体を有する薄膜
キャパシタの形成方法が示されている。上記の方法では
、・第1のキャパシタ電極となるシリコン基板上にタン
タル薄膜がR−Fスパ、りで被着される。このタンタル
薄膜を有するシリコン基板はそれから525”oLve
素雰囲素中囲気中理される。タンタルはすべてQンタル
酸化物に変換される。第2のキャパシタ電極がタンタル
酸化物の膜の上に付着される。
Conventionally, capacitors for semiconductor devices have a structure in which an insulating layer is entirely attached to a metal or semiconductor, and an electrode made of metal or the like is further attached. Films such as silicon dioxide (8i0z), alumina (A[203), and silicon nitride (8i3N4) have been used as the insulating film. Since it is desired to increase the packaging density, a dielectric film having a larger dielectric constant than those of these insulating films and an extremely thin dielectric film has been required. , page 588 of the Proceedings of the 1981 Spring Academic Conference of the Japan Society of Applied Physics, describes a method for forming a thin film capacitor having a tantalum oxide dielectric. In the above method, a tantalum thin film is deposited on a silicon substrate, which will become a first capacitor electrode, by R-F spacing. The silicon substrate with this tantalum thin film was then rated at 525"oLve.
It is treated in an elementary atmosphere. All tantalum is converted to Qantalum oxide. A second capacitor electrode is deposited over the tantalum oxide film.

上記の方法において不利な点は、このキャパシタはリー
ク電流が大きいことである。
A disadvantage of the above method is that this capacitor has a high leakage current.

上記方法に於いてタンタル薄膜を525°0の酸素雰囲
気中で熱処理してタンタル酸化物に変換した後さらに1
000°Cの酸素雰囲気中で熱処理するとタンタル酸化
膜とシリコン基板の間に薄いシリコン酸化膜が形成され
そのためにリーク電流が減少することが・ホペられでい
る。しかしながら新たにタンタル酸化膜とシリコン基板
の界面に形成されるシリコン酸化膜は誘電率が小さいた
めにタンタル酸化膜のみの場合とくらべると全体の容量
が低下してしまうという欠点があった。
In the above method, after the tantalum thin film is heat-treated in an oxygen atmosphere at 525°0 to convert it into tantalum oxide,
It has been reported that when heat treatment is performed in an oxygen atmosphere at 000°C, a thin silicon oxide film is formed between the tantalum oxide film and the silicon substrate, thereby reducing leakage current. However, since the silicon oxide film newly formed at the interface between the tantalum oxide film and the silicon substrate has a small dielectric constant, there is a drawback that the overall capacitance is lower than in the case of only the tantalum oxide film.

本発明はタンタル酸化膜とシリコン基板の間に超薄屋化
シリコン膜を形成することによりタンタル酸化膜とシリ
コン基板が直接的に相互反応することを阻止してかつタ
ンタル酸化膜のリーク電流を減少させさらにタンタル酸
化膜中に♀素含有濃度全その膜厚方向に対してタンタル
酸化膜と超薄窒化シリコン膜界面で大きくタンタル酸化
膜表面に向って漸次減少し再び漸次増加してタンタル酸
化膜表面に至る窒素濃度勾配をもたせてタンタル酸化膜
と超薄窒化シリコン膜界面での応力を減少させることに
よシタンタル酸化膜のリーク電流を減少させ、さらにま
たシリコン酸化膜よりも誘電率の大きな窒化シリコン膜
を使うことによって全体の容量低下も少なくして上記の
欠点を解消した半導体装置用キャパシタの製造方法全提
供するものである。
The present invention prevents direct mutual reaction between the tantalum oxide film and the silicon substrate and reduces leakage current of the tantalum oxide film by forming an ultra-thin silicon film between the tantalum oxide film and the silicon substrate. Furthermore, the total concentration of ♀ elements in the tantalum oxide film gradually decreases in the film thickness direction at the interface between the tantalum oxide film and the ultra-thin silicon nitride film, and gradually increases again toward the tantalum oxide film surface. The leakage current of the tantalum oxide film is reduced by reducing the stress at the interface between the tantalum oxide film and the ultra-thin silicon nitride film by creating a nitrogen concentration gradient leading to The present invention provides a method for manufacturing a capacitor for a semiconductor device, which eliminates the above-mentioned drawbacks by reducing the overall capacitance drop by using a film.

以下本発明を第1図乃至第6図を参照しながら実施例に
ついて説明する。
Embodiments of the present invention will be described below with reference to FIGS. 1 to 6.

まず第1図に示すように30・cmO比抵抗のN型シリ
コン半導体基板1を用い、100%(NH3)ガス中で
、1200’0.1時間加熱して第2図に示すようにシ
リコン半導体基板1の表面約30八〇′厚みの部分を超
薄窒化シリコン膜2に変換する。
First, as shown in Fig. 1, an N-type silicon semiconductor substrate 1 with a specific resistance of 30 cmO is heated in 100% (NH3) gas for 1200'0.1 hour to form a silicon semiconductor substrate as shown in Fig. 2. A portion of the surface of the substrate 1 having a thickness of about 3080' is converted into an ultra-thin silicon nitride film 2.

次に第3図に示すように超薄窒化シリコン膜2の上にス
バ、り法で30ONの厚さのタンタル膜3全被着する。
Next, as shown in FIG. 3, a tantalum film 3 having a thickness of 30 nm is entirely deposited on the ultra-thin silicon nitride film 2 by a sputtering method.

この2層膜を有する基板はそれから525℃のドライ酸
素雰囲気中で30分熱処理して、第4図に示すように3
0OAの厚さのタンクル膜全すべてタンタル酸化膜4に
変換する。この時、タンタル酸化膜とシリコン半導体基
板間にあるちみつな超薄窒化シリコンBK2のためにタ
ンタル酸化膜4とシリコン半導体基板1との間の直接的
な相互作用は阻止されて導電性をもつタンタルシリサイ
ドの形成を防ぐことができてタンタル酸化膜のリーク電
流を減少させることができる。次に上記構造体を100
%(NHa)ガス中で、1100°C12時間熱処理す
るとタンタル酸化膜の粒界を介した増速拡散等によりタ
ンタル酸化膜4中の窒素含有濃度を膜厚方向に対してタ
ンタル酸化膜4と超薄窒化シリコン膜2の界面5で大き
くタンタル酸化膜表面6に向って漸次減少し再び漸次増
加してタンタル酸化膜表面6に至る窒素濃度勾配ができ
る。その結果第5図に示すようにタンタル酸化膜と超薄
窒化シリコン膜との界面5の近傍及びタンタル酸化膜6
の近傍に窒素含有濃度の高いタンタル酸化膜層7及び7
′がそれぞれ形成され、その中間には窒素含有濃度の小
さいタンタル酸化膜層8が形成される。この窒素含有濃
度の高いタンタル酸化膜層7は窒素を含まないタンタル
酸化膜4と超薄窒化シリコン膜2との中間の熱膨張率を
持つ念めにタンタル酸化膜4と超範窒化シリコン膜2と
の熱膨張率の違いに起因する応力を緩和する緩衝層とし
て働らく。このためにタンタル酸化膜中のリーク電流を
減少させることが出来る。
The substrate with this two-layer film was then heat treated in a dry oxygen atmosphere at 525°C for 30 minutes to form a three-layer structure as shown in FIG.
The entire tantalum film with a thickness of 0OA is converted into tantalum oxide film 4. At this time, direct interaction between the tantalum oxide film 4 and the silicon semiconductor substrate 1 is prevented due to the ultra-thin honey silicon nitride BK2 between the tantalum oxide film and the silicon semiconductor substrate, and the tantalum oxide film 4 has conductivity. Formation of silicide can be prevented and leakage current of the tantalum oxide film can be reduced. Next, convert the above structure to 100
% (NHa) gas for 12 hours at 1100°C, the nitrogen concentration in the tantalum oxide film 4 exceeds that of the tantalum oxide film 4 in the film thickness direction due to accelerated diffusion through the grain boundaries of the tantalum oxide film. At the interface 5 of the thin silicon nitride film 2, a nitrogen concentration gradient is formed which gradually decreases toward the tantalum oxide film surface 6 and then gradually increases again to reach the tantalum oxide film surface 6. As a result, as shown in FIG. 5, near the interface 5 between the tantalum oxide film and the ultra-thin silicon nitride film,
tantalum oxide film layers 7 and 7 with high nitrogen content near the
' are formed, and a tantalum oxide film layer 8 with a low nitrogen concentration is formed between them. This tantalum oxide film layer 7 with a high concentration of nitrogen has a coefficient of thermal expansion between the tantalum oxide film 4 which does not contain nitrogen and the ultra-thin silicon nitride film 2. It acts as a buffer layer to relieve stress caused by the difference in thermal expansion coefficient between the two. For this reason, leakage current in the tantalum oxide film can be reduced.

窒素含有濃度の高いタンタル酸化膜層7及び7′はいず
れもリーク電流を減少させるために効果があるが、タン
タル酸化膜中の窒素含有濃度が増加すると、タンタル酸
化膜の誘電率が小さくなるので、本発明の目的のために
は窒素含有濃度の高いタンタル酸化膜層7の窒素含有濃
度を太きくし、窒素含有濃度の高いタンタル液化膜層7
′の窒素含有濃度は出来る限り小さくすることが望まし
い。。
Both tantalum oxide film layers 7 and 7' with high nitrogen content concentration are effective in reducing leakage current, but as the nitrogen content concentration in the tantalum oxide film increases, the dielectric constant of the tantalum oxide film decreases. For the purpose of the present invention, the nitrogen content of the tantalum oxide film layer 7 with a high nitrogen content concentration is increased, and the tantalum liquefied film layer 7 with a high nitrogen content concentration is
It is desirable to keep the nitrogen concentration of ' as low as possible. .

かかる絶縁膜2,7,8.7’上に第6図に示すように
1μm厚さのアルミニウムを被着しパタニングして電極
9を作る。次に400℃のN2雰囲気中で10分間熱処
理を行ないキャパシタとする。
As shown in FIG. 6, aluminum with a thickness of 1 μm is deposited on the insulating films 2, 7, 8, 7' and patterned to form electrodes 9. Next, heat treatment is performed for 10 minutes in a N2 atmosphere at 400° C. to form a capacitor.

上記の方法で作製したキャパシタはタンタル酸化膜とシ
リコン半導体基板の間に超薄窒化シリコン膜があるため
に従来タンタル酸化膜のみの場合問題となっていたリー
ク電流を減少させることができる。さらにタンタル酸化
膜中のタンタル酸化膜と超薄窒化シリコン膜界面近傍に
窒素含有濃度の高いタンタル酸化膜層があるためにタン
タル酸化膜と超薄窒化シリコン膜との界面での応力を緩
和させてリーク電流全滅らすことができる。またタンタ
ル酸化膜とシリコン半導体基板との間に酸素雰囲気中で
熱処理することによって2酸化シリコン膜を形成してリ
ーク電流全減少させる公知の方法は、熱処理時間に増す
とそれにともなって2酸化シリコン膜厚が増加しそのた
め全体の容量値が時間と共に減少する。さらに高温で熱
処理すると薄い2酸化ンリコン膜ではタンタルシリサイ
ドの形成を防ぐことが出来ないという欠点があるが本発
明の方法はちみつな超薄窒化シリコン膜を使っているの
で熱処理時間を長くしても容量値は変化せず、タンタル
シリサイドの形成も防ぐことが出来てリーク電流の少な
いキャパシタが得られる。
Since the capacitor manufactured by the above method has an ultra-thin silicon nitride film between the tantalum oxide film and the silicon semiconductor substrate, it is possible to reduce leakage current, which has conventionally been a problem when using only a tantalum oxide film. Furthermore, since there is a tantalum oxide film layer with a high concentration of nitrogen near the interface between the tantalum oxide film and the ultra-thin silicon nitride film in the tantalum oxide film, stress at the interface between the tantalum oxide film and the ultra-thin silicon nitride film is alleviated. Leakage current can be completely eliminated. Furthermore, in the known method of reducing the total leakage current by forming a silicon dioxide film between a tantalum oxide film and a silicon semiconductor substrate by heat treatment in an oxygen atmosphere, as the heat treatment time increases, the silicon dioxide film The thickness increases so that the overall capacitance value decreases over time. Furthermore, when heat-treated at high temperatures, a thin silicon dioxide film cannot prevent the formation of tantalum silicide, which is a drawback. The value does not change, the formation of tantalum silicide can be prevented, and a capacitor with low leakage current can be obtained.

以上詳細に説明したように本発明はタンタル酸化膜とシ
リコン半導体基板の界面に超薄窒化シリコン膜を形成し
、その後タンタル酸化膜と超薄窒化シリコン膜界面近傍
及びタンタル酸化膜表面近傍のタンタル酸化膜全窒素含
有濃度の高いタンタル酸化膜層に変換することによって
容量密度が太きくしかもリーク電流の小さいキャパシタ
が得られる。
As explained in detail above, the present invention forms an ultra-thin silicon nitride film at the interface between a tantalum oxide film and a silicon semiconductor substrate, and then oxidizes the tantalum oxide film near the interface between the tantalum oxide film and the ultra-thin silicon nitride film and near the surface of the tantalum oxide film. By converting to a tantalum oxide film layer with a high total nitrogen content concentration, a capacitor with a large capacitance density and a small leakage current can be obtained.

【図面の簡単な説明】[Brief explanation of drawings]

第1図乃至第6図は各々本発明に係るキャパシタの製造
工程を工程順に説明する断面図、である。 なお図において、 1・・・・・・シリコン半導体基板、2・・・ 超薄窒
化シリコン膜、3・・・・・・タンタル膜、4・・・・
・・タンタル酸化膜% 5・・・・・・タンタル酸化膜
と超薄窒化シリコン膜との界面、6・・・・・・タンタ
ル酸化膜表面、7及び7′・・・・・・窒素含有濃度の
高いタンタル酸化膜層、8・・・・・・窒素含有濃度の
低いタンタル酸化膜層、9□□−射 □□□□□□−□□□ □□□メ/□園で−・ 一一一一一一番イ □□□□□□ぢ汁 □ 283− 一ノ  箒I 図 2 /4 77′ /3 一/ 77′ =≦ 茅乙図 −/
1 to 6 are cross-sectional views illustrating the manufacturing process of a capacitor according to the present invention in order of process. In the figure, 1... silicon semiconductor substrate, 2... ultra-thin silicon nitride film, 3... tantalum film, 4...
... Tantalum oxide film % 5 ... Interface between tantalum oxide film and ultra-thin silicon nitride film, 6 ... Tantalum oxide film surface, 7 and 7' ... Nitrogen content Tantalum oxide film layer with high concentration, 8... Tantalum oxide film layer with low nitrogen content concentration, 9 11111Ichibanii□□□□□□Jijiru□ 283- Ichino Houki I Figure 2 /4 77' /3 1/ 77' =≦ Kayaotsu figure -/

Claims (1)

【特許請求の範囲】[Claims] キャパシタの第1電極となるシリコン基板を窒素を構成
原子としてふくむ雰囲気中で熱処理して該シリコン基板
の表面部に超薄窒化シリコン膜全形成し、上記超薄窒化
シリコン膜表面にタンタルを被着し、上記構造体全酸素
雰囲気中で熱処理し上記タンタルをすべてタンタル酸化
膜に変換した後、上記構造体をアンモニア雰囲気中で熱
処理し、上記のタンタル酸化膜中の望素含有濃度をその
膜厚方向に対しタンタル酸化膜と超薄窒化シ1ノコン膜
界面で大きくタンタル1設化膜表面に向って漸次減少し
再び漸次増加してタンタル酸化膜表面に至る屋素濃度勾
配をもたせ、かかる絶縁膜にキャノくシタの第2電極を
被着すること全特徴とする半導体装置用キャパシタの製
造方法。
A silicon substrate, which will become the first electrode of the capacitor, is heat-treated in an atmosphere containing nitrogen as a constituent atom to form an ultra-thin silicon nitride film on the entire surface of the silicon substrate, and tantalum is deposited on the surface of the ultra-thin silicon nitride film. After the above structure is heat-treated in a total oxygen atmosphere to convert all the tantalum into a tantalum oxide film, the above-mentioned structure is heat-treated in an ammonia atmosphere, and the desired element content concentration in the tantalum oxide film is determined by its film thickness. With respect to the direction, at the interface between the tantalum oxide film and the ultra-thin silicon nitride film, the oxide concentration gradually decreases toward the surface of the tantalum oxide film, gradually increases again, and reaches the surface of the tantalum oxide film. A method for manufacturing a capacitor for a semiconductor device, which is characterized in that a second electrode of a capacitor is attached to the capacitor.
JP12089682A 1982-07-12 1982-07-12 Manufacture of capacitor for semiconductor device Pending JPS5911663A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12089682A JPS5911663A (en) 1982-07-12 1982-07-12 Manufacture of capacitor for semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12089682A JPS5911663A (en) 1982-07-12 1982-07-12 Manufacture of capacitor for semiconductor device

Publications (1)

Publication Number Publication Date
JPS5911663A true JPS5911663A (en) 1984-01-21

Family

ID=14797672

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12089682A Pending JPS5911663A (en) 1982-07-12 1982-07-12 Manufacture of capacitor for semiconductor device

Country Status (1)

Country Link
JP (1) JPS5911663A (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61198665A (en) * 1985-02-27 1986-09-03 Nec Corp Semiconductor device
JPS629666A (en) * 1985-07-05 1987-01-17 Nec Corp Semiconductor device
US4891684A (en) * 1986-08-04 1990-01-02 Hitachi, Ltd. Semiconductor device
JPH0328375A (en) * 1989-06-26 1991-02-06 Kyocera Corp Coated sintered hard alloy
JPH07335565A (en) * 1994-06-13 1995-12-22 Sony Corp Method for forming high dielectric thin film
KR19990055204A (en) * 1997-12-27 1999-07-15 김영환 Capacitor Formation Method of Semiconductor Device
WO2004086511A1 (en) * 2003-03-25 2004-10-07 Rohm Co., Ltd. Semiconductor device, process for producing the same and process for producing metal compound thin film
CN113862673A (en) * 2021-09-30 2021-12-31 中国电子科技集团公司第四十八研究所 High-temperature insulating layer for engine blade thin film sensor and preparation method thereof

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61198665A (en) * 1985-02-27 1986-09-03 Nec Corp Semiconductor device
JPS629666A (en) * 1985-07-05 1987-01-17 Nec Corp Semiconductor device
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