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JPS57199059A - Extension address system - Google Patents

Extension address system

Info

Publication number
JPS57199059A
JPS57199059A JP8312281A JP8312281A JPS57199059A JP S57199059 A JPS57199059 A JP S57199059A JP 8312281 A JP8312281 A JP 8312281A JP 8312281 A JP8312281 A JP 8312281A JP S57199059 A JPS57199059 A JP S57199059A
Authority
JP
Japan
Prior art keywords
extension
address
bit
extension address
address unit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8312281A
Other languages
Japanese (ja)
Inventor
Katsuyasu Ono
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
O J K KK
Original Assignee
O J K KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by O J K KK filed Critical O J K KK
Priority to JP8312281A priority Critical patent/JPS57199059A/en
Publication of JPS57199059A publication Critical patent/JPS57199059A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/0223User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/0292User address space allocation, e.g. contiguous or non contiguous base addressing using tables or multilevel address translation means

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)

Abstract

PURPOSE:To perform theoretically infinite addressing, by an addressing system using extension bit. CONSTITUTION:For example, 15 bits are defined as a basic address unit and the addition of one-bit extension address bit is taken as one extension address unit. For example, when 16-bit is defined as one extension address unit, accessing is made up to 32K bytes. To display the address which is one basic address unit or more, two extension address units are used, and the extension address bit of the 1st extension address unit is denated as 1 to show that the 2nd extension address unit is used. The two extension address units are accessible up to 1M byte. Further, to access the addresses more, the extension address unit is added one after another and the address units required for the accessing can be connected with the extension bits.
JP8312281A 1981-05-30 1981-05-30 Extension address system Pending JPS57199059A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8312281A JPS57199059A (en) 1981-05-30 1981-05-30 Extension address system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8312281A JPS57199059A (en) 1981-05-30 1981-05-30 Extension address system

Publications (1)

Publication Number Publication Date
JPS57199059A true JPS57199059A (en) 1982-12-06

Family

ID=13793395

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8312281A Pending JPS57199059A (en) 1981-05-30 1981-05-30 Extension address system

Country Status (1)

Country Link
JP (1) JPS57199059A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010152447A (en) * 2008-12-24 2010-07-08 Aisin Aw Co Ltd Variable length offset rewriting device, variable length offset rewriting method and recording medium for variable length offset rewriting device
JP2010152446A (en) * 2008-12-24 2010-07-08 Aisin Aw Co Ltd Variable length offset access method, variable length offset access device, variable length offset database creation method and recording medium for variable length offset access device
JP2015107183A (en) * 2013-12-03 2015-06-11 サミー株式会社 Game machine

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5659342A (en) * 1979-09-18 1981-05-22 Siemens Ag Code converting circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5659342A (en) * 1979-09-18 1981-05-22 Siemens Ag Code converting circuit

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010152447A (en) * 2008-12-24 2010-07-08 Aisin Aw Co Ltd Variable length offset rewriting device, variable length offset rewriting method and recording medium for variable length offset rewriting device
JP2010152446A (en) * 2008-12-24 2010-07-08 Aisin Aw Co Ltd Variable length offset access method, variable length offset access device, variable length offset database creation method and recording medium for variable length offset access device
JP2015107183A (en) * 2013-12-03 2015-06-11 サミー株式会社 Game machine

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