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JPS5713837A - Code transmission system - Google Patents

Code transmission system

Info

Publication number
JPS5713837A
JPS5713837A JP8784780A JP8784780A JPS5713837A JP S5713837 A JPS5713837 A JP S5713837A JP 8784780 A JP8784780 A JP 8784780A JP 8784780 A JP8784780 A JP 8784780A JP S5713837 A JPS5713837 A JP S5713837A
Authority
JP
Japan
Prior art keywords
pulse
circuit
output
level
outputted
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8784780A
Other languages
Japanese (ja)
Inventor
Noboru Shoji
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP8784780A priority Critical patent/JPS5713837A/en
Publication of JPS5713837A publication Critical patent/JPS5713837A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40—Transmitting circuits; Receiving circuits
    • H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
    • H04L25/4906—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using binary codes
    • H04L25/4915—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using binary codes using pattern inversion or substitution

Landscapes

  • Physics & Mathematics (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Dc Digital Transmission (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

PURPOSE:To perform transmission via a transmission line in binary signal level, by limiting succession of ''0''s by inserting pulses, each having peculiarity of pulse width, for data consisting of the succession of ''0''. CONSTITUTION:As the output of an OR circuit 7 at a transmission side, when input data is a ''1'', ''1'' pulse from a ''1''-pulse generating circuit 4 is outputted and when ''0''s continue by (n), a V pulse from a V-pulse generating circuit 6 is outputted. For optical communication, for example, this output is converted by a driving circuit 8 into a binary level which corresponds to the intensity of light and the level is transmitted. At a reception side, on the other hand, a V-pulse detecting circuit 12 detects a V pulse having greater pulse width than that of the normal ''1'' pulse and outputs a negative pulse, and an AND circuit 13 removes the V pulse from received data. The output of the circuit 13 is shaped 14 and at an output terminal 15, demodulated data appears.
JP8784780A 1980-06-30 1980-06-30 Code transmission system Pending JPS5713837A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8784780A JPS5713837A (en) 1980-06-30 1980-06-30 Code transmission system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8784780A JPS5713837A (en) 1980-06-30 1980-06-30 Code transmission system

Publications (1)

Publication Number Publication Date
JPS5713837A true JPS5713837A (en) 1982-01-23

Family

ID=13926274

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8784780A Pending JPS5713837A (en) 1980-06-30 1980-06-30 Code transmission system

Country Status (1)

Country Link
JP (1) JPS5713837A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0201935A2 (en) * 1985-05-17 1986-11-20 Fujitsu Limited Method and circuit for suppressing sequential "zeroes" data
US4955081A (en) * 1983-01-25 1990-09-04 Canon Kabushiki Kaisha Light communication system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4955081A (en) * 1983-01-25 1990-09-04 Canon Kabushiki Kaisha Light communication system
EP0201935A2 (en) * 1985-05-17 1986-11-20 Fujitsu Limited Method and circuit for suppressing sequential "zeroes" data

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