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JPS57120144A - Data transfer system - Google Patents

Data transfer system

Info

Publication number
JPS57120144A
JPS57120144A JP468981A JP468981A JPS57120144A JP S57120144 A JPS57120144 A JP S57120144A JP 468981 A JP468981 A JP 468981A JP 468981 A JP468981 A JP 468981A JP S57120144 A JPS57120144 A JP S57120144A
Authority
JP
Japan
Prior art keywords
data
memory
transfer
stored
buffer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP468981A
Other languages
Japanese (ja)
Inventor
Yasuo Suzuki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP468981A priority Critical patent/JPS57120144A/en
Publication of JPS57120144A publication Critical patent/JPS57120144A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Human Computer Interaction (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Information Transfer Systems (AREA)

Abstract

PURPOSE:To ensure the smooth transfer of data even in case the transfer interval among devices is smaller than the maximum allowable time of occupancy, by using two first-in/first-out buffer memories. CONSTITUTION:When a transfer data is read out of a floppy disk, the data is successively stored in the 1st buffer memory 11. When the occupancy of a common bus 6 is released, the signal is applied to the buffer 11 by a direct memory access controller 14. Then the stored data are delivered in a first-in/first-out way. In case a data is transferred to write the data into the floppy disk from a main memory 2, the data transferred from the memory 2 is stored once in the 2nd buffer memory 12 via the memory 2 and the bus 6. A transfer controller 13 feeds the data stored in the memory 12 to a floppy disk controller 8.
JP468981A 1981-01-16 1981-01-16 Data transfer system Pending JPS57120144A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP468981A JPS57120144A (en) 1981-01-16 1981-01-16 Data transfer system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP468981A JPS57120144A (en) 1981-01-16 1981-01-16 Data transfer system

Publications (1)

Publication Number Publication Date
JPS57120144A true JPS57120144A (en) 1982-07-27

Family

ID=11590852

Family Applications (1)

Application Number Title Priority Date Filing Date
JP468981A Pending JPS57120144A (en) 1981-01-16 1981-01-16 Data transfer system

Country Status (1)

Country Link
JP (1) JPS57120144A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59167767A (en) * 1983-01-11 1984-09-21 バロース　コーポレーション Burst mode data block transfer system
JPS6020269A (en) * 1983-07-15 1985-02-01 Hitachi Ltd Microcomputer system
JPS617967A (en) * 1984-06-15 1986-01-14 インタ−ナショナル　ビジネス　マシ−ンズ　コ−ポレ−ション I/o controller
JPS62501411A (en) * 1983-03-15 1987-06-11 ジヨンソン　マツセイ　パブリツク　リミテイド　カンパニ− collection pack
JPS63129449A (en) * 1986-11-14 1988-06-01 インターナショナル・ビジネス・マシーンズ・コーポレーション Control interface apparatus

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50117327A (en) * 1973-02-01 1975-09-13
JPS5247636A (en) * 1975-10-15 1977-04-15 Toshiba Corp Control method for transmitting information
JPS5417639A (en) * 1977-07-08 1979-02-09 Mitsubishi Electric Corp Terminal equipment
JPS55159226A (en) * 1979-05-30 1980-12-11 Mitsubishi Electric Corp Data input and output unit

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50117327A (en) * 1973-02-01 1975-09-13
JPS5247636A (en) * 1975-10-15 1977-04-15 Toshiba Corp Control method for transmitting information
JPS5417639A (en) * 1977-07-08 1979-02-09 Mitsubishi Electric Corp Terminal equipment
JPS55159226A (en) * 1979-05-30 1980-12-11 Mitsubishi Electric Corp Data input and output unit

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59167767A (en) * 1983-01-11 1984-09-21 バロース　コーポレーション Burst mode data block transfer system
JPH0319575B2 (en) * 1983-01-11 1991-03-15 Unisys Corp
JPS62501411A (en) * 1983-03-15 1987-06-11 ジヨンソン　マツセイ　パブリツク　リミテイド　カンパニ− collection pack
JPS6020269A (en) * 1983-07-15 1985-02-01 Hitachi Ltd Microcomputer system
JPS617967A (en) * 1984-06-15 1986-01-14 インタ−ナショナル　ビジネス　マシ−ンズ　コ−ポレ−ション I/o controller
JPH0332093B2 (en) * 1984-06-15 1991-05-09 Intaanashonaru Bijinesu Mashiinzu Corp
JPS63129449A (en) * 1986-11-14 1988-06-01 インターナショナル・ビジネス・マシーンズ・コーポレーション Control interface apparatus
JPH0574107B2 (en) * 1986-11-14 1993-10-15 Ibm

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