JPS57125591A - Recorded picture control system - Google Patents
Recorded picture control systemInfo
- Publication number
- JPS57125591A JPS57125591A JP56010890A JP1089081A JPS57125591A JP S57125591 A JPS57125591 A JP S57125591A JP 56010890 A JP56010890 A JP 56010890A JP 1089081 A JP1089081 A JP 1089081A JP S57125591 A JPS57125591 A JP S57125591A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- circuit
- control
- pulse
- period
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/76—Television signal recording
- H04N5/765—Interface circuits between an apparatus for recording and another apparatus
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Color Television Image Signal Generators (AREA)
Abstract
PURPOSE:To eliminate the need for control lines required for recorded picture control and to enable recorded picture control from a camera side, by superimposing a control signal for VTR recording control during each vertical blanking signal period of a TV camera output signal and after the 2nd equivalent pulse period. CONSTITUTION:An output signal A from a TV camera 2 of a picture transmitter 1 is applied to a control signal generating circuit 14 and a mixer 3, and the circuit 14 generates a control signal B from the start point of the 1st equivalent pulse to 10-13 times the repetitive period of a horizontal synchronizing pulse. This signal B is taken as the same frequency as a color burst signal, and when a switch 5 is closed, a signal A from the camera 2 and the signal B from the circuit 14 are mixed at the mixer 3, and a signal C is applied to a timing pulse generating circuit 8, closed circuit 9 and VTR7 of a recorder 6. Timing pulse is outputted from the circuit 8 at each vertical blanking signal, the circuit 9 closes the horizontal synchronism and burst pulse and recording control of the VTR is made after the 2nd equivalent pulse period at the blanking period.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56010890A JPS57125591A (en) | 1981-01-29 | 1981-01-29 | Recorded picture control system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56010890A JPS57125591A (en) | 1981-01-29 | 1981-01-29 | Recorded picture control system |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57125591A true JPS57125591A (en) | 1982-08-04 |
Family
ID=11762910
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56010890A Pending JPS57125591A (en) | 1981-01-29 | 1981-01-29 | Recorded picture control system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57125591A (en) |
-
1981
- 1981-01-29 JP JP56010890A patent/JPS57125591A/en active Pending
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