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JPS5664445A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS5664445A
JPS5664445A JP13923579A JP13923579A JPS5664445A JP S5664445 A JPS5664445 A JP S5664445A JP 13923579 A JP13923579 A JP 13923579A JP 13923579 A JP13923579 A JP 13923579A JP S5664445 A JPS5664445 A JP S5664445A
Authority
JP
Japan
Prior art keywords
frame
projection
boundary
semiconductor device
press
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13923579A
Other languages
Japanese (ja)
Inventor
Junji Nakada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP13923579A priority Critical patent/JPS5664445A/en
Publication of JPS5664445A publication Critical patent/JPS5664445A/en
Pending legal-status Critical Current

Links

Classifications

    • BPERFORMING OPERATIONS; TRANSPORTING
    • B29WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
    • B29CSHAPING OR JOINING OF PLASTICS; SHAPING OF MATERIAL IN A PLASTIC STATE, NOT OTHERWISE PROVIDED FOR; AFTER-TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING
    • B29C45/00Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor
    • B29C45/14Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor incorporating preformed parts or layers, e.g. injection moulding around inserts or for coating articles
    • B29C45/14336Coating a portion of the article, e.g. the edge of the article
    • B29C45/14418Sealing means between mould and article
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/565Moulds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Mechanical Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To remove the occurrence of burr in a recess boundary of a semiconductor device by forming a projection on the recess boundary between upper and lower dies, interposing under pressure a lead frame therebetween, press-fitting the projection to the frame and pouring molten material into the dies. CONSTITUTION:When the ends of the projections 13a, 13b of the upper and lower dies 10 and 11, respectively are faced and the lead frame 1 is interposed therebetween, the entire projection is press-fitted into the frame 1. Synthetic resin introduced under pressure to the recesses 5a and 5b in this state is not leaked out of a resin molding region. Thus, the boundary between the region and the external lead wire becomes distinct, and the step of plating the lead wire can be efficiently conducted.
JP13923579A 1979-10-30 1979-10-30 Manufacture of semiconductor device Pending JPS5664445A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13923579A JPS5664445A (en) 1979-10-30 1979-10-30 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13923579A JPS5664445A (en) 1979-10-30 1979-10-30 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS5664445A true JPS5664445A (en) 1981-06-01

Family

ID=15240618

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13923579A Pending JPS5664445A (en) 1979-10-30 1979-10-30 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5664445A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60153531U (en) * 1984-03-23 1985-10-12 新電元工業株式会社 Resin-sealed semiconductor device
JPS60194337U (en) * 1984-06-02 1985-12-24 ロ−ム株式会社 Mold for semiconductor devices
JPH01220466A (en) * 1988-02-26 1989-09-04 Mitsui High Tec Inc Lead frame and manufacture of semiconductor device using the same lead frame
CN107810100A (en) * 2015-06-26 2018-03-16 康宁股份有限公司 For the apparatus and method reshaped to sheet material
JP2019062214A (en) * 2018-11-27 2019-04-18 日亜化学工業株式会社 Light-emitting device, and method for manufacturing the same

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60153531U (en) * 1984-03-23 1985-10-12 新電元工業株式会社 Resin-sealed semiconductor device
JPS60194337U (en) * 1984-06-02 1985-12-24 ロ−ム株式会社 Mold for semiconductor devices
JPH01220466A (en) * 1988-02-26 1989-09-04 Mitsui High Tec Inc Lead frame and manufacture of semiconductor device using the same lead frame
CN107810100A (en) * 2015-06-26 2018-03-16 康宁股份有限公司 For the apparatus and method reshaped to sheet material
JP2019062214A (en) * 2018-11-27 2019-04-18 日亜化学工業株式会社 Light-emitting device, and method for manufacturing the same

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