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JPS55112639A - Analog data processing system - Google Patents

Analog data processing system

Info

Publication number
JPS55112639A
JPS55112639A JP1888679A JP1888679A JPS55112639A JP S55112639 A JPS55112639 A JP S55112639A JP 1888679 A JP1888679 A JP 1888679A JP 1888679 A JP1888679 A JP 1888679A JP S55112639 A JPS55112639 A JP S55112639A
Authority
JP
Japan
Prior art keywords
circuit
conversion
constitution
data processing
processing system
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1888679A
Other languages
Japanese (ja)
Other versions
JPS5857772B2 (en
Inventor
Hisao Nakane
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Yokogawa Electric Corp
Original Assignee
Yokogawa Hokushin Electric Corp
Yokogawa Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Yokogawa Hokushin Electric Corp, Yokogawa Electric Works Ltd filed Critical Yokogawa Hokushin Electric Corp
Priority to JP1888679A priority Critical patent/JPS5857772B2/en
Publication of JPS55112639A publication Critical patent/JPS55112639A/en
Publication of JPS5857772B2 publication Critical patent/JPS5857772B2/en
Expired legal-status Critical Current

Links

Landscapes

  • Arrangements For Transmission Of Measured Signals (AREA)
  • Analogue/Digital Conversion (AREA)

Abstract

PURPOSE: To simplify the line constitution and to economize the unit by performing the selection control of AD/DA conversion of the circuit at this data processor.
CONSTITUTION: The analog input signal AI of each channel is converted into digital signal at the conversion circuit CVT, and after suitable processing is given at the data processor CPU, it is again converted into analog signal at the conversion circuit CVT and delivered as the analog output signal AO. Since the main part of circuit can be commonly used for AD and DA conversion, the circuit constitution can be simplified.
COPYRIGHT: (C)1980,JPO&Japio
JP1888679A 1979-02-20 1979-02-20 Analog data processing method Expired JPS5857772B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1888679A JPS5857772B2 (en) 1979-02-20 1979-02-20 Analog data processing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1888679A JPS5857772B2 (en) 1979-02-20 1979-02-20 Analog data processing method

Publications (2)

Publication Number Publication Date
JPS55112639A true JPS55112639A (en) 1980-08-30
JPS5857772B2 JPS5857772B2 (en) 1983-12-21

Family

ID=11984040

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1888679A Expired JPS5857772B2 (en) 1979-02-20 1979-02-20 Analog data processing method

Country Status (1)

Country Link
JP (1) JPS5857772B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5107146A (en) * 1991-02-13 1992-04-21 Actel Corporation Mixed mode analog/digital programmable interconnect architecture
JPH0897721A (en) * 1994-09-28 1996-04-12 Nec Corp Ad/da converter

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5107146A (en) * 1991-02-13 1992-04-21 Actel Corporation Mixed mode analog/digital programmable interconnect architecture
JPH0897721A (en) * 1994-09-28 1996-04-12 Nec Corp Ad/da converter

Also Published As

Publication number Publication date
JPS5857772B2 (en) 1983-12-21

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