JPH11121662A - Cooling structure for semiconductor device - Google Patents
Cooling structure for semiconductor deviceInfo
- Publication number
- JPH11121662A JPH11121662A JP9276870A JP27687097A JPH11121662A JP H11121662 A JPH11121662 A JP H11121662A JP 9276870 A JP9276870 A JP 9276870A JP 27687097 A JP27687097 A JP 27687097A JP H11121662 A JPH11121662 A JP H11121662A
- Authority
- JP
- Japan
- Prior art keywords
- heat
- substrate
- semiconductor chip
- solder
- semiconductor chips
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73253—Bump and layer connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/35—Mechanical effects
- H01L2924/351—Thermal stress
- H01L2924/3511—Warping
Landscapes
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明は、半導体チップ等を
搭載した半導体装置の冷却構造に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a cooling structure for a semiconductor device having a semiconductor chip or the like mounted thereon.
【0002】[0002]
【従来の技術】従来のマルチチップ型の半導体装置にお
いては、複数の半導体チップを、1つの放熱部材に直接
密着させて放熱するために、パッケージがハーメチック
タイプである場合は、半導体チップと放熱部材との間に
はんだで接合し、高い熱伝導率を図っている。またパッ
ケージがノン・ハーメチックタイプである場合は、半導
体チップと放熱部材との間に熱伝導性の良好な部材を挟
み、接触部の熱抵抗を低下させている。2. Description of the Related Art In a conventional multi-chip type semiconductor device, in order to dissipate heat by directly adhering a plurality of semiconductor chips to one heat radiating member, when the package is a hermetic type, the semiconductor chip and the heat radiating member are connected. And soldering between them to achieve high thermal conductivity. When the package is a non-hermetic type, a member having good thermal conductivity is sandwiched between the semiconductor chip and the heat radiating member to reduce the thermal resistance of the contact portion.
【0003】実際にマルチチップ型の半導体装置を製造
する場合は、全ての半導体チップの高さにばらつきがあ
り、発熱する半導体チップの熱を放熱部材に伝えるた
め、いくつかの手段が報告されている。特開平7−24536
2 号公報では高さのばらつきを吸収する弾性体を半導体
チップと放熱部材との間に介在させている。特開平6−2
24334号公報では半導体チップに対向する放熱部材の面
に段差や凹みを設けて、厚さが均一な接着剤により半導
体チップを貼り付けている。In the case of actually manufacturing a multi-chip type semiconductor device, there are some variations in the height of all the semiconductor chips, and some means have been reported to transfer the heat of the semiconductor chips to the heat radiating member. I have. JP 7-24536
In Japanese Patent Publication No. 2, an elastic body for absorbing variations in height is interposed between the semiconductor chip and the heat radiating member. JP-A-6-2
In Japanese Patent No. 24334, a step or a depression is provided on the surface of a heat dissipating member facing a semiconductor chip, and the semiconductor chip is attached with an adhesive having a uniform thickness.
【0004】以上の構造は半導体チップの高さにばらつ
きがあっても、熱抵抗が低くなる有益な手段である。The above structure is a useful means for reducing the thermal resistance even if the height of the semiconductor chip varies.
【0005】しかしながら、半導体チップの高速化に伴
って発熱量も大きくなってきたため、半導体装置を稼動
するときに生じる各部品の熱変形の量を無視できなくな
ってきた。パワーをオンにした時、半導体チップが発熱
し、その熱により各部品が膨張して、変形が生じる。ま
た、パワーをオフにしたとき熱が下がることによって、
各部品が収縮変形する。このパワーのオン・オフを繰り
返すことによって、半導体チップに密着する伝熱部材、
もしくは放熱部材の剛性が高い場合、半導体チップ、も
しくは半導体チップと基板との接続部に、圧縮・引張の
応力が生じ、長期間の稼動によって破壊する可能性があ
る。However, the amount of heat generated has increased along with the speeding up of the semiconductor chip, so that the amount of thermal deformation of each component generated when operating the semiconductor device cannot be ignored. When the power is turned on, the semiconductor chip generates heat, and the heat causes each component to expand and deform. Also, when the power is turned off, the heat drops,
Each part shrinks and deforms. By repeatedly turning on and off this power, a heat transfer member that adheres to the semiconductor chip,
Alternatively, when the heat radiating member has high rigidity, a compressive / tensile stress is generated in the semiconductor chip or a connection portion between the semiconductor chip and the substrate, and there is a possibility that the semiconductor chip may be broken by a long-term operation.
【0006】[0006]
【発明が解決しようとする課題】上述のように組み立て
た初期の状態で、半導体チップの高さにばらつきがある
場合は、最も高さが高い半導体チップは放熱部材と接触
するが、それよりも高さが低い半導体チップは放熱部材
との間で隙間が生じ、これにより著しく熱抵抗が増加す
るという問題が生じていた。If the height of the semiconductor chip varies in the initial state assembled as described above, the semiconductor chip having the highest height comes into contact with the heat radiating member. A gap is formed between the semiconductor chip having a low height and the heat radiating member, thereby causing a problem that the thermal resistance is significantly increased.
【0007】また、半導体チップが発熱した際、基板及
びフレームが熱により膨張し、基板とフレームの熱膨張
差による変形で、半導体チップと放熱部材との間に隙間
が生じることがある。この場合も隙間に応じて熱抵抗が
増加するという問題が生じていた。Further, when the semiconductor chip generates heat, the substrate and the frame expand due to heat, and a gap may be generated between the semiconductor chip and the heat radiating member due to deformation due to a difference in thermal expansion between the substrate and the frame. Also in this case, there has been a problem that the thermal resistance increases according to the gap.
【0008】一方、上記の隙間が空く場合とは逆に、半
導体チップの発熱によって半導体チップと放熱部材とが
接近する方向に変形する部位もある。この場合、半導体
チップが放熱部材と基板との間で圧縮され、基板に半導
体チップを接続しているはんだ部分に過大な圧縮応力が
発生する。そのため、半導体装置のパワーオン・オフに
よって、はんだに繰り返し荷重が作用し、はんだ接続部
が疲労により、破壊するという問題が生じていた。On the other hand, in contrast to the case where the gap is opened, there is also a portion that is deformed in a direction in which the semiconductor chip and the heat radiating member approach each other due to heat generated by the semiconductor chip. In this case, the semiconductor chip is compressed between the heat radiating member and the substrate, and an excessive compressive stress is generated in a solder portion connecting the semiconductor chip to the substrate. Therefore, there has been a problem in that a repeated load is applied to the solder due to power on / off of the semiconductor device, and the solder connection portion is broken by fatigue.
【0009】本発明の目的は、全ての半導体チップの高
さをそろえることなく、かつ、半導体装置のパワーのオ
ンとオフの場合でも、半導体チップのはんだ接合部に過
大な圧縮荷重を付与することなく、高さの異なる半導体
チップを一括して、1つの放熱部材に確実に接触させ
て、放熱特性を良好にしたマルチチップ型の半導体装置
を提供することにある。It is an object of the present invention to apply an excessive compressive load to a solder joint of a semiconductor chip without adjusting the height of all the semiconductor chips and even when the power of the semiconductor device is turned on and off. Instead, it is an object of the present invention to provide a multi-chip type semiconductor device in which semiconductor chips having different heights are collectively brought into contact with one heat radiation member without fail and heat radiation characteristics are improved.
【0010】[0010]
【課題を解決するための手段】上記の目的は、図1に示
すように、基板2上に複数の半導体チップ1a,1b,
1cを搭載し、該半導体チップの熱を放熱部材4により
放熱する構造を有するマルチチップ型半導体装置におい
て、高さの異なる前記複数の半導体チップ1a,1b,
1cと、これらの複数の半導体チップに対して共通の放
熱部材4との間にグリースを充填した伝熱部材7を設置
することによって達成される。The object of the present invention is to provide, as shown in FIG. 1, a plurality of semiconductor chips 1a, 1b,
In the multi-chip type semiconductor device having the structure in which the semiconductor chip 1c is mounted and the heat of the semiconductor chip is radiated by the heat radiation member 4, the plurality of semiconductor chips 1a, 1b,
This is achieved by providing a heat transfer member 7 filled with grease between the semiconductor chip 1c and the common heat dissipation member 4 for the plurality of semiconductor chips.
【0011】本発明は、上記手段によって以下の作用を
生じさせ、前記課題を解決するものである。熱伝導性に
優れた金属で伝熱部材を構成し、該伝熱部材の放熱部材
に対向する面に微細フィンを形成した。さらに微細フィ
ンの隙間にグリースを充填した。伝熱部材は半導体チッ
プに密着し、かつ、伝熱部材に形成した微細フィンは、
しなった状態で常に放熱部材に接触している。微細フィ
ンは、初期の半導体チップの高さのばらつきや、組み立
て時に生じる変形を吸収し、半導体チップと放熱部材と
を熱的に接続する。さらに微細フィンの隙間にグリース
を充填して、放熱部材への伝熱特性をよくする。According to the present invention, the following effects are produced by the above means to solve the above-mentioned problems. The heat transfer member was made of a metal having excellent heat conductivity, and fine fins were formed on a surface of the heat transfer member facing the heat radiating member. Further, grease was filled in the gaps between the fine fins. The heat transfer member is in close contact with the semiconductor chip, and the fine fins formed on the heat transfer member
In the bent state, it always contacts the heat radiating member. The fine fins absorb variations in height of the initial semiconductor chip and deformations generated during assembly, and thermally connect the semiconductor chip and the heat radiating member. Further, grease is filled in the gaps between the fine fins to improve heat transfer characteristics to the heat radiating member.
【0012】[0012]
【発明の実施の形態】以下、本発明の実施例を図面に従
って説明する。Embodiments of the present invention will be described below with reference to the drawings.
【0013】(実施例1)図1は、本発明のマルチチッ
プ型の半導体装置であり、パッケージの構造を示す断面
図である。高さの異なる複数の半導体チップ1a,1
b,1cをセラミック等の基板2の上面に搭載し、基板
2の上面の周囲にフレーム3を配置して、フレーム3と
放熱部材4とをOリング5を介してネジ等で締め付け
て、気密式のパッケージとしたものである。(Embodiment 1) FIG. 1 is a cross-sectional view showing a structure of a package, which is a multi-chip type semiconductor device of the present invention. A plurality of semiconductor chips 1a, 1 having different heights
b, 1c are mounted on the upper surface of a substrate 2 made of ceramics or the like, the frame 3 is arranged around the upper surface of the substrate 2, and the frame 3 and the heat radiating member 4 are tightened with screws or the like via an O-ring 5 so as to be airtight. It is a formula package.
【0014】図2は、図1の構造を詳細に示す拡大断面
図である。半導体チップ1a,1b,1c(図2ではひ
とつの半導体チップ1のみを表示)は基板2の上面には
んだ6によって接合され、半導体チップ1a,1b,1
cと放熱部材4との間に伝熱部材7が設置されている。FIG. 2 is an enlarged sectional view showing the structure of FIG. 1 in detail. The semiconductor chips 1a, 1b, 1c (only one semiconductor chip 1 is shown in FIG. 2) are joined to the upper surface of the substrate 2 by solder 6, and the semiconductor chips 1a, 1b, 1c
The heat transfer member 7 is provided between the heat transfer member 4 and the heat transfer member 4.
【0015】伝熱部材7は熱伝導が良好で加工性に優れ
た金属、例えばアルミニウムで形成され、放熱部材4に
対向する面に切り込みがあり、これを起こして微細フィ
ン8を形成している。微細フィン8は、しなった状態
で、放熱部材4の面に常に接触している。該微細フィン
8の隙間には、熱伝導性のよいグリース9が充填されて
いる。The heat transfer member 7 is formed of a metal having good heat conduction and excellent workability, for example, aluminum, and has a cut in the surface facing the heat radiating member 4 to generate fine fins 8. . The fine fins 8 are always in contact with the surface of the heat radiating member 4 in a bent state. The gap between the fine fins 8 is filled with grease 9 having good thermal conductivity.
【0016】上記のような構成により、複数の半導体チ
ップ1a,1b,1cの高さがばらばらな場合でも、微
細フィン8のしなりにより、常に放熱部材4に接触した
状態にある。さらに、微細フィン8の隙間には、グリー
ス9が充填されているため、伝熱効率がよくなってい
る。With the above configuration, even when the heights of the plurality of semiconductor chips 1a, 1b, 1c are varied, the fine fins 8 are always in contact with the heat radiating member 4 due to the bending of the fine fins 8. Further, the gap between the fine fins 8 is filled with the grease 9, so that the heat transfer efficiency is improved.
【0017】本実施例における半導体装置の製造プロセ
スを図2を用いて説明する。まず、基板2に融点の高い
はんだ6で、半導体チップ1を接合する。この接合は、
半導体チップ1及びはんだ6を所定の位置に配置し、は
んだ6が溶融する温度を加えた後、冷却して行う。The manufacturing process of the semiconductor device according to this embodiment will be described with reference to FIG. First, the semiconductor chip 1 is joined to the substrate 2 with the solder 6 having a high melting point. This joint
The semiconductor chip 1 and the solder 6 are arranged at predetermined positions, and after applying a temperature at which the solder 6 melts, cooling is performed.
【0018】次に、はんだ6よりも融点の低いはんだ1
0で、基板2とフレーム3を、半導体チップ1と伝熱部
材7を接合する。この接合は、それぞれ所定の位置に設
置して、はんだ10が溶融する程度の温度を加え、冷却
する。その後、伝熱部材7に形成した微細フィン8の隙
間に熱伝導性がよく、かつ、粘性のあるグリース9を充
填する。なお伝熱部材7の微細フィン8は、カッターで
切り込みを入れ、その部位を起こすことにより形成され
る。Next, the solder 1 having a lower melting point than the solder 6
At 0, the substrate 2 and the frame 3 are joined, and the semiconductor chip 1 and the heat transfer member 7 are joined. This joint is installed at a predetermined position, and a temperature at which the solder 10 is melted is applied and cooled. Thereafter, the gap between the fine fins 8 formed in the heat transfer member 7 is filled with viscous grease 9 having good thermal conductivity. The fine fins 8 of the heat transfer member 7 are formed by making a cut with a cutter and raising the portion.
【0019】放熱部材4は放熱フィン4aと、これと接
合して流路4cを形成するキャップ4bからなる。本実
施例における放熱フィン4aとキャップ4bの材質は、
熱伝導が良好で加工性に優れた銅である。放熱フィン4
aとキャップ4bとの接合ははんだ6で行う。この接合
は、はんだ6を放熱フィン4aとキャップ4bとの間の
所定の位置に配置し、はんだ6が溶融する温度を加えた
後、冷却して行う。The heat dissipating member 4 includes a heat dissipating fin 4a and a cap 4b joined to the heat dissipating fin 4a to form a flow path 4c. The materials of the radiation fin 4a and the cap 4b in the present embodiment are as follows.
Copper with good heat conductivity and excellent workability. Heat radiation fins 4
a and the cap 4b are joined with the solder 6. This joining is performed by disposing the solder 6 at a predetermined position between the radiation fin 4a and the cap 4b, applying a temperature at which the solder 6 melts, and then cooling it.
【0020】最後に放熱部材4をOリング5を介してフ
レーム3にネジで締結して(ネジによる締結は図示せ
ず)、気密式のパッケージ構造とする。Finally, the heat dissipating member 4 is fastened to the frame 3 via the O-ring 5 with screws (fastening by screws is not shown) to obtain an airtight package structure.
【0021】以上のようなパッケージ構造にすることに
より、図1のように半導体チップ1a,1b,1cの高
さにばらつきがある場合でも、半導体チップ1a,1
b,1cにそれぞれ接続している伝熱部材7は放熱部材
4に接触しているため、常に熱的に接続されていること
になる。With the above-described package structure, even if the heights of the semiconductor chips 1a, 1b, 1c vary as shown in FIG.
Since the heat transfer members 7 connected to b and 1c are in contact with the heat radiation member 4, they are always thermally connected.
【0022】半導体チップ1a,1b,1cが発熱した
際は、はんだ10及び伝熱部材7に熱が伝わり、放熱部
材4へ熱が伝導されることにより、低い熱抵抗を実現す
ることができる。また、伝熱部材7にグリース9を充填
してることにより、より低い熱抵抗を実現している。When the semiconductor chips 1a, 1b, 1c generate heat, heat is transmitted to the solder 10 and the heat transfer member 7 and is transferred to the heat radiating member 4, thereby realizing a low heat resistance. Further, by filling the heat transfer member 7 with the grease 9, lower heat resistance is realized.
【0023】図3は本発明の半導体装置の一部を切り欠
いた鳥瞰図である。放熱部材4は流路4c,冷却水入口
4d及び冷却水出口4eを有している。冷却水入口4d
に流入した冷却水が、流路4cを通って冷却水出口4e
から流出することにより、放熱部材4は常に冷却され、
半導体チップの冷却特性を高めている。FIG. 3 is a bird's-eye view in which a part of the semiconductor device of the present invention is cut away. The heat radiating member 4 has a flow path 4c, a cooling water inlet 4d, and a cooling water outlet 4e. Cooling water inlet 4d
Cooling water flowing into the cooling water outlet 4e through the flow path 4c
The heat radiation member 4 is always cooled by flowing out of the
The cooling characteristics of the semiconductor chip are improved.
【0024】(実施例2)本発明の半導体装置を組み立
てる際に生じる変形を、図4から図6までを用いて説明
する。(Embodiment 2) The deformation that occurs when assembling the semiconductor device of the present invention will be described with reference to FIGS.
【0025】図4ははんだ10で基板2にフレーム3を
接合するため、はんだ10が溶融する程度の熱を全体に
加えた状態を示す断面図である。なお、基板2に半導体
チップ1a,1b,1cを接続しているはんだ6の融点
は、はんだ10よりも高いため、はんだ10が溶融する
温度で、はんだ6が溶融することはない。図4ははんだ
10が溶融する温度で、各々の部材が熱により膨張して
変形した状態を示している。これを冷却することにより
はんだ10が凝固し、フレーム3が基板2に接合され
る。この冷却する場合に、各々の部材、特に、基板2と
フレーム3の熱膨張率の違いにより、変形が生じる。以
下にその例を記す。FIG. 4 is a cross-sectional view showing a state in which heat enough to melt the solder 10 is applied to the whole to join the frame 3 to the substrate 2 with the solder 10. Since the melting point of the solder 6 connecting the semiconductor chips 1a, 1b, 1c to the substrate 2 is higher than that of the solder 10, the solder 6 does not melt at the temperature at which the solder 10 melts. FIG. 4 shows a state where each member is expanded and deformed by heat at a temperature at which the solder 10 melts. By cooling this, the solder 10 solidifies and the frame 3 is joined to the substrate 2. When this cooling is performed, deformation occurs due to the difference in the coefficient of thermal expansion between each member, particularly, the substrate 2 and the frame 3. An example is described below.
【0026】図5は、図4の状態から冷却し、基板2に
フレーム3を接合した断面図である。ただし、フレーム
3は基板2よりも大きな熱膨張率の材質で構成されてい
る。したがって、加熱したことにより、フレーム3の方
が多く膨張した分、冷却によって収縮しようとする。そ
の結果、フレーム3が基板2に接合されている部位を基
準にして、内側に倒れ込むように変形し、基板2もこれ
に追従して、凹形状に変形する。FIG. 5 is a cross-sectional view in which the frame 3 is joined to the substrate 2 after cooling from the state of FIG. However, the frame 3 is made of a material having a larger coefficient of thermal expansion than the substrate 2. Therefore, the frame 3 expands more due to the heating and tends to contract by cooling. As a result, the frame 3 is deformed so as to fall inward on the basis of the portion joined to the substrate 2, and the substrate 2 is also deformed to follow the shape.
【0027】図6は、図4の状態から冷却し、基板2に
フレーム3を接合した断面図である。ただし、フレーム
3は基板2よりも小さな熱膨張率の材質で構成されてい
る。したがって、加熱したことにより、基板2の方がよ
り多く膨張した分、冷却によって収縮しようとする。そ
の結果、フレーム3が基板2に接合されている部位を基
準にして、外側に倒れ込むように変形し、基板2もこれ
に追従して、凸形状に変形する。FIG. 6 is a cross-sectional view in which the frame 3 is joined to the substrate 2 after cooling from the state of FIG. However, the frame 3 is made of a material having a smaller coefficient of thermal expansion than the substrate 2. Therefore, the substrate 2 tends to contract by cooling as much as the substrate 2 expands due to the heating. As a result, the frame 3 is deformed so as to fall outward with reference to the portion joined to the substrate 2, and the substrate 2 is also deformed into a convex shape following this.
【0028】以上のように、フレーム3の熱膨張率が基
板2よりも大きい場合、基板2は凹形状に変形し、フレ
ーム3の熱膨張率が基板2よりも小さい場合、基板2は
凸形状に変形する。As described above, when the coefficient of thermal expansion of the frame 3 is larger than that of the substrate 2, the substrate 2 is deformed into a concave shape, and when the coefficient of thermal expansion of the frame 3 is smaller than that of the substrate 2, the substrate 2 becomes convex. Deform to.
【0029】本発明の半導体装置では、これらの変形が
生じていても、熱を効率よく放熱部材4に伝えることが
できる。この構造を、図7及び図8を用いて説明する。In the semiconductor device of the present invention, heat can be efficiently transmitted to the heat radiating member 4 even if these deformations occur. This structure will be described with reference to FIGS.
【0030】図7は、フレーム3を接合した基板2が凹
形状に変形した状態(図5)で、放熱部材4をネジで締
結した断面図である(ネジによる締結は図示せず)。ま
た図8は、フレーム3を接合した基板2が凸形状に変形
した状態(図6)で、放熱部材4をネジで締結した断面
図である。FIG. 7 is a cross-sectional view in which the heat radiating member 4 is fastened with screws in a state where the substrate 2 to which the frame 3 is joined is deformed into a concave shape (FIG. 5) (fastening with screws is not shown). FIG. 8 is a cross-sectional view in which the heat radiating member 4 is fastened with screws in a state where the substrate 2 to which the frame 3 is bonded is deformed into a convex shape (FIG. 6).
【0031】図7及び図8においてフレーム3よりも放
熱部材4のほうが剛性が高いため、放熱部材4に倣って
フレーム3が変形する。フレーム3を基板2に接合した
ときに生じていた基板2の変形は、放熱部材4をフレー
ムに締結したことによって小さくなるが、図7の場合で
凹形状、図8の場合で凸形状の変形が残留している。In FIGS. 7 and 8, the heat radiating member 4 has higher rigidity than the frame 3, so that the frame 3 is deformed following the heat radiating member 4. The deformation of the substrate 2 caused when the frame 3 is joined to the substrate 2 is reduced by fastening the heat radiating member 4 to the frame, but the deformation is concave in FIG. 7 and convex in FIG. Remains.
【0032】図7のように基板2が凹形状に変形してい
る場合、半導体チップと放熱部材4との距離は、中央部
に配置の半導体チップ1bが離れ、周辺部に配置の半導
体チップ1a,1cが近づく。逆に、基板2が凸形状に
変形している場合、半導体チップと放熱部材との距離
は、周辺部に配置の半導体チップ1a,1cが離れ、中
央部に配置の半導体チップ1bが近づく。どちらの変形
の状態になっても、本発明の構造の場合、伝熱部材7の
微細フィン8が、常にしなった状態で放熱部材4に接し
ている。When the substrate 2 is deformed into a concave shape as shown in FIG. 7, the distance between the semiconductor chip and the heat radiating member 4 is such that the semiconductor chip 1b disposed at the center is separated and the semiconductor chip 1a disposed at the peripheral part. , 1c approach. Conversely, when the substrate 2 is deformed in a convex shape, the distance between the semiconductor chip and the heat radiating member is such that the semiconductor chips 1a and 1c arranged in the peripheral portion are far from each other and the semiconductor chip 1b arranged in the central portion is close. Regardless of the deformation state, in the case of the structure of the present invention, the fine fins 8 of the heat transfer member 7 are always in contact with the heat radiating member 4 in a bent state.
【0033】したがって、本実施例では、組み立てた状
態で変形が生じていても、伝熱部材7を介して、半導体
チップ1a,1b,1cと放熱部材4とを熱的に接続し
ている。Therefore, in the present embodiment, the semiconductor chips 1a, 1b, 1c and the heat radiating member 4 are thermally connected via the heat transfer member 7 even if the assembly is deformed.
【0034】これにより、すべての半導体チップ1a,
1b,1cにおいて発熱した熱は、グリース9を充填し
た伝熱部材7に伝わり、放熱部材4へと熱を伝導し、低
熱抵抗が実現する。また、グリース9の代替として、熱
伝導性がよく、かつ、粘性のあるゲルまたはオイルまた
はワックスでもよい。Thus, all the semiconductor chips 1a,
The heat generated in 1b and 1c is transmitted to the heat transfer member 7 filled with the grease 9, and conducts the heat to the heat radiating member 4, thereby realizing low heat resistance. Further, as an alternative to the grease 9, a viscous gel or oil or wax having good heat conductivity may be used.
【0035】[0035]
【発明の効果】本発明によれば、組み立てたときの初期
の半導体チップの高さのばらつきがあっても、半導体チ
ップの熱を効率よく放熱部材に伝えることができる。According to the present invention, the heat of the semiconductor chip can be efficiently transmitted to the heat dissipating member even when the height of the semiconductor chip at the time of assembly is uneven.
【0036】さらに、発熱と放熱の繰り返しによって、
基板とフレームが変形し、半導体チップと放熱部材との
隙間が変化しても、半導体チップの熱を効率よく放熱部
材に伝えることができる。また、半導体チップの発熱に
よって変化する隙間を、伝熱部材が吸収するため、基板
と半導体チップとの接合部に負荷される力を低減させる
ことができ、発熱と放熱の繰り返しによる接合部位へ与
えるダメージが少なく、はんだがクリープ破壊すること
はない。Further, by repeating heat generation and heat radiation,
Even if the substrate and the frame are deformed and the gap between the semiconductor chip and the heat radiating member changes, the heat of the semiconductor chip can be efficiently transmitted to the heat radiating member. In addition, since the heat transfer member absorbs the gap that changes due to the heat generated by the semiconductor chip, the force applied to the joint between the substrate and the semiconductor chip can be reduced, and the gap is given to the joint by repeated heat generation and heat radiation. Low damage, no creep breakage of solder.
【図1】本発明の一実施例を示す高さの異なる半導体チ
ップを実装した半導体装置の断面図。FIG. 1 is a cross-sectional view of a semiconductor device according to an embodiment of the present invention, on which semiconductor chips having different heights are mounted.
【図2】本発明の一実施例を示す半導体チップ実装部の
拡大断面図。FIG. 2 is an enlarged cross-sectional view of a semiconductor chip mounting portion showing one embodiment of the present invention.
【図3】本発明の一実施例を示す一部切り欠いた半導体
装置の鳥瞰図。FIG. 3 is a bird's-eye view of a partially cut-away semiconductor device showing one embodiment of the present invention.
【図4】本発明の一実施例を示す熱を加えて基板とフレ
ームを接合した時の半導体装置の断面図。FIG. 4 is a cross-sectional view of a semiconductor device according to an embodiment of the present invention when a substrate and a frame are joined by applying heat.
【図5】本発明の一実施例を示す基板とフレームを接合
した後に生じる変形を示す半導体装置の断面図。FIG. 5 is a cross-sectional view of a semiconductor device showing deformation occurring after bonding a substrate and a frame according to an embodiment of the present invention.
【図6】本発明の一実施例を示す基板とフレームを接合
した後に生じる変形を示す半導体装置の断面図。FIG. 6 is a cross-sectional view of a semiconductor device according to an embodiment of the present invention, showing a deformation that occurs after a substrate and a frame are joined.
【図7】本発明の一実施例を示す半導体装置を組み立て
た後の変形を示す断面図。FIG. 7 is a sectional view showing a deformation after assembling the semiconductor device according to the embodiment of the present invention;
【図8】本発明の一実施例を示す半導体装置を組み立て
た後の変形を示す断面図。FIG. 8 is a sectional view showing a deformation after assembling the semiconductor device according to the embodiment of the present invention;
1,1a,1b,1c…半導体チップ、2…基板、3…
フレーム、4…放熱部材、4a…放熱フィン、4b…キ
ャップ、4c…流路、4d…冷却水入口、4e…冷却水
出口、5…Oリング、6…はんだ、7…伝熱部材、8…
微細フィン、9…グリース、10…はんだ。1, 1a, 1b, 1c ... semiconductor chip, 2 ... substrate, 3 ...
Frame: 4 heat dissipating member, 4a ... heat dissipating fin, 4b ... cap, 4c ... flow path, 4d ... cooling water inlet, 4e ... cooling water outlet, 5 ... O-ring, 6 ... solder, 7 ... heat transfer member, 8 ...
Fine fins, 9: grease, 10: solder.
───────────────────────────────────────────────────── フロントページの続き (72)発明者 中島 忠克 茨城県土浦市神立町502番地 株式会社日 立製作所機械研究所内 ────────────────────────────────────────────────── ─── Continuing on the front page (72) Inventor Tadakatsu Nakajima 502 Kandachicho, Tsuchiura-shi, Ibaraki Pref.
Claims (1)
導体チップの熱を放熱部材から放熱する構造を有する半
導体装置において、高さの異なる前記複数の半導体チッ
プと、これら複数の半導体チップに対して共通の放熱部
材との間に放熱部材に接触するフィンを有する伝熱部材
を介して、半導体チップと放熱部材との間を接続したこ
とを特徴とする半導体装置の冷却構造。In a semiconductor device having a structure in which a plurality of semiconductor chips are mounted on a substrate and heat of the semiconductor chips is radiated from a heat radiating member, the plurality of semiconductor chips having different heights and the plurality of semiconductor chips are provided. A cooling structure for a semiconductor device, wherein a semiconductor chip and a heat radiating member are connected via a heat conducting member having a fin that contacts the heat radiating member between the semiconductor chip and a common heat radiating member.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9276870A JPH11121662A (en) | 1997-10-09 | 1997-10-09 | Cooling structure for semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9276870A JPH11121662A (en) | 1997-10-09 | 1997-10-09 | Cooling structure for semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH11121662A true JPH11121662A (en) | 1999-04-30 |
Family
ID=17575567
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP9276870A Pending JPH11121662A (en) | 1997-10-09 | 1997-10-09 | Cooling structure for semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH11121662A (en) |
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US6781832B2 (en) | 2001-02-28 | 2004-08-24 | Kabushiki Kaisha Toshiba | Cooling unit for cooling heat generating component and electronic apparatus containing cooling unit |
JP2007184435A (en) * | 2006-01-10 | 2007-07-19 | Nakamura Mfg Co Ltd | Electronic component package provided with cooling section, and its forming method |
WO2007125802A1 (en) * | 2006-04-24 | 2007-11-08 | Sumitomo Electric Industries, Ltd. | Heat transfer member, protruding structural member, electronic device, and electric product |
JP2009123812A (en) * | 2007-11-13 | 2009-06-04 | Denso Corp | Electronic control device of heat radiating structure |
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-
1997
- 1997-10-09 JP JP9276870A patent/JPH11121662A/en active Pending
Cited By (17)
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US6781832B2 (en) | 2001-02-28 | 2004-08-24 | Kabushiki Kaisha Toshiba | Cooling unit for cooling heat generating component and electronic apparatus containing cooling unit |
JP2007184435A (en) * | 2006-01-10 | 2007-07-19 | Nakamura Mfg Co Ltd | Electronic component package provided with cooling section, and its forming method |
WO2007125802A1 (en) * | 2006-04-24 | 2007-11-08 | Sumitomo Electric Industries, Ltd. | Heat transfer member, protruding structural member, electronic device, and electric product |
JP2009123812A (en) * | 2007-11-13 | 2009-06-04 | Denso Corp | Electronic control device of heat radiating structure |
JP2013211287A (en) * | 2012-03-30 | 2013-10-10 | Mitsubishi Materials Corp | Substrate for power module with heat sink, manufacturing method of the same, and substrate for power module |
DE102014201227A1 (en) | 2013-02-07 | 2014-08-07 | Denso Corporation | Semiconductor device e.g. electro-mechanical control device for controlling motor used in vehicle, has first heat-conducting element that is laminated between metal element and second heat conducting elements |
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EP2779231A3 (en) * | 2013-03-14 | 2015-04-29 | General Electric Company | Power overlay structure and method of making same |
EP2779230A3 (en) * | 2013-03-14 | 2015-04-29 | General Electric Company | Power overlay structure and method of making same |
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JP2014209614A (en) * | 2013-03-29 | 2014-11-06 | 株式会社フジクラ | Heat radiator for electronic component |
US20160035646A1 (en) * | 2013-09-30 | 2016-02-04 | Fuji Electric Co., Ltd. | Semiconductor device, method for assembling semiconductor device, semiconductor device component, and unit module |
US9917031B2 (en) * | 2013-09-30 | 2018-03-13 | Fuji Electric Co., Ltd. | Semiconductor device, and method for assembling semiconductor device |
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