JPH01217951A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPH01217951A JPH01217951A JP63041996A JP4199688A JPH01217951A JP H01217951 A JPH01217951 A JP H01217951A JP 63041996 A JP63041996 A JP 63041996A JP 4199688 A JP4199688 A JP 4199688A JP H01217951 A JPH01217951 A JP H01217951A
- Authority
- JP
- Japan
- Prior art keywords
- pellet
- heat sink
- spacer
- heat dissipating
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims description 28
- 239000008188 pellet Substances 0.000 claims abstract description 51
- 239000000758 substrate Substances 0.000 claims abstract description 32
- 125000006850 spacer group Chemical group 0.000 claims abstract description 25
- 230000017525 heat dissipation Effects 0.000 claims description 6
- 239000000463 material Substances 0.000 abstract description 15
- 229910000679 solder Inorganic materials 0.000 abstract description 14
- 238000005219 brazing Methods 0.000 description 7
- 238000000034 method Methods 0.000 description 7
- 230000002093 peripheral effect Effects 0.000 description 5
- 238000007740 vapor deposition Methods 0.000 description 5
- 229910052782 aluminium Inorganic materials 0.000 description 4
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 4
- 230000000694 effects Effects 0.000 description 4
- 230000005855 radiation Effects 0.000 description 4
- 239000000853 adhesive Substances 0.000 description 3
- 230000001070 adhesive effect Effects 0.000 description 3
- 239000000945 filler Substances 0.000 description 3
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 description 2
- 238000002844 melting Methods 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 230000035882 stress Effects 0.000 description 2
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 229910010293 ceramic material Inorganic materials 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 239000000498 cooling water Substances 0.000 description 1
- 230000004907 flux Effects 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 229920002050 silicone resin Polymers 0.000 description 1
- 229920003002 synthetic resin Polymers 0.000 description 1
- 239000000057 synthetic resin Substances 0.000 description 1
- 230000008646 thermal stress Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73253—Bump and layer connectors
Landscapes
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、ＣＣＢバンブを介して半導体ペレットが基板
に実装された半導体装置の実装構造に関し、前記ＣＣＢ
バンプの接続信頼性向上に適用して有効な技術に関する
ものである。Detailed Description of the Invention [Field of Industrial Application] The present invention relates to a mounting structure for a semiconductor device in which a semiconductor pellet is mounted on a substrate via a CCB bump.
The present invention relates to a technique that is effective when applied to improving bump connection reliability.
半田などの低融点金属からなるＣＣＢバンブを介して半
導体ペレット（以下、ペレットという）を基板に実装す
る、いわゆるフリップチップ方式の半導体装置構造につ
いては、例えば、株式会社サイエンスフォーラム、昭和
５８年１１月２８日発行、「超ＬＳＩデバイスハンドブ
ック」Ｐ２３５〜Ｐ２３６に記載がある。Regarding the so-called flip-chip semiconductor device structure in which semiconductor pellets (hereinafter referred to as pellets) are mounted on a substrate via CCB bumps made of a low-melting point metal such as solder, for example, see Science Forum Co., Ltd., November 1982. It is described in "Very LSI Device Handbook" published on the 28th, pages 235-236.
近年、半導体装置の高密度化、高速度化によるペレット
サイズや人出力ピン数の増大に伴い、ペレットからの発
熱を効率的に放散させるための対策が不可欠となり、上
記フリップチップ方式による半導体装置においても、ペ
レットの上面にアルミヒートシンクなどの放熱体を設け
た実装構造が採用されるようになっている。In recent years, as the pellet size and number of output pins have increased due to the higher density and higher speed of semiconductor devices, it has become essential to take measures to efficiently dissipate heat generated from the pellets. A mounting structure in which a heat dissipation body such as an aluminum heat sink is provided on the top surface of the pellet is also being adopted.
ペレットの上面に放熱体を設けたフリップチップとして
は、従来、ペレットと放熱体との間の熱的接合を向上さ
せるため、ピストンなどを用いて上方から放熱体に荷重
を加えた実装構造が知られている。Conventionally, flip chips with a heat sink provided on the top surface of a pellet have a mounting structure in which a piston or the like is used to apply a load to the heat sink from above in order to improve thermal bonding between the pellet and the heat sink. It is being
本発明者は、ベレットの上面に放熱体を設けた１−記フ
リップチップ方式の半導体装置構造には、下記のような
問題があることを見出した。The inventors of the present invention have discovered that the flip-chip semiconductor device structure described in 1- above, in which a heat sink is provided on the upper surface of the pellet, has the following problems.
すなわち、ベレットの上面に放熱体を設けた場合には、
この放熱体の自重によってＣＣＢバンブに垂直方向の荷
重が加わるが、ＣＣＢバンブを構成する半田は、常温に
おい゛〔も塑性変形の生じ易い材料であるため、上記放
熱体の荷重による垂直方向の応力および回路動作時の発
熱による熱応力が恒常的に加わると、時間の経過ととも
に塑性変形が次第に増大する、いわゆるクリープ現象に
よってＣＣＢバンプが次第に変形し、最終的には潰れて
しすう虞れがある。In other words, when a heat sink is provided on the top surface of the pellet,
A vertical load is applied to the CCB bump due to the weight of the heat sink, but since the solder that makes up the CCB bump is a material that easily undergoes plastic deformation even at room temperature, vertical stress due to the load of the heat sink is applied. When thermal stress is constantly applied due to heat generated during circuit operation, the CCB bump gradually deforms due to the so-called creep phenomenon, in which plastic deformation gradually increases over time, and there is a risk that it will eventually collapse. .
特に、上方から放熱体に荷重を加えてベレットと放熱体
との間の熱的接合の向上を図っている前記従来の実装構
造においては、上記したクリープ現象が一層加速される
ため、ＣＣＢバンブの変形が一層顕著となり、その寿命
および接続信頼性が著しく低下してしまうことになる。In particular, in the conventional mounting structure in which a load is applied to the heat sink from above to improve the thermal bond between the pellet and the heat sink, the creep phenomenon described above is further accelerated. The deformation becomes more pronounced, and the lifespan and connection reliability are significantly reduced.
本発明は、上記問題点に着目してなされたものであり、
その目的は、放熱体を設けたフリップチップ方式の半導
体装置において、この放熱体の荷重によるＣＣＢバンブ
の変形を確実に防止することのできる技術を提供するこ
とにある。The present invention has been made focusing on the above problems,
The purpose is to provide a technique that can reliably prevent deformation of a CCB bump due to the load of the heat sink in a flip-chip type semiconductor device provided with a heat sink.
本発明の前記ならびにその他の目的と新規な特徴は、本
明細書の記述および添付図面から明らかになるであろう
。The above and other objects and novel features of the present invention will become apparent from the description of this specification and the accompanying drawings.
本願において開示される発明のうち代表的なものの概要
を簡単に説明すれば、次の通りである。A brief overview of typical inventions disclosed in this application is as follows.
すなわち、」下面に放熱体を設けたベレ７）をＣＣＢバ
ンプを介して基板に実装し、基板とベレットとの間、ま
たは、基板と放熱体との間にスペーサを介装した半導体
装置構造とするものである。In other words, a semiconductor device structure in which a bevel 7) with a heat dissipation body provided on the lower surface is mounted on a substrate via a CCB bump, and a spacer is interposed between the substrate and the bellet or between the substrate and the heat dissipation body. It is something to do.
上記し７た手段によれば５、放熱体の荷重がスベーづに
よって支λられるため、放熱体の荷重による垂直方向の
応力に起因するＣＣＢバンプの変形が確実に防止される
。According to the above-described means 5, since the load of the heat sink is supported by the support, deformation of the CCB bump due to stress in the vertical direction due to the load of the heat sink is reliably prevented.
第１図は本発明の一実施例である半導体装置を示す要部
断面図、第２図（ａ）、ら）はこの半導体装置の組立工
程を示す要部断面図である。FIG. 1 is a sectional view of a main part showing a semiconductor device according to an embodiment of the present invention, and FIGS. 2(a) and 2(a) are sectional views of main parts showing an assembly process of this semiconductor device.
本実施例の半導体装置は、セラミックや合成樹脂などを
積層した多層基板１の表面に所定数のベレット２を実装
した構造を有するものである。The semiconductor device of this embodiment has a structure in which a predetermined number of pellets 2 are mounted on the surface of a multilayer substrate 1 made of laminated ceramic, synthetic resin, or the like.
第１図に示すように、裏面に接続用のビン３が多数挿入
された多層基板ｌの表面には、所定の集積回路が形成さ
れた複数（図では一個のみ示す）のベレット２がその集
積回路形成面を下向きにして実装されている。As shown in FIG. 1, a plurality of pellets 2 (only one is shown in the figure) on which predetermined integrated circuits are formed are placed on the surface of a multilayer board l, in which a number of connection vials 3 are inserted on the back surface. It is mounted with the circuit formation side facing downward.
ベレット２の電極４と多層基板１の電極５との間には、
半田材料からなる球状のＣＣＢバンブ６が接続され、こ
のＣＣＢバンブ６を介してベレット２の集積回路と多層
基板１の配線とが電気的に接続されている。Between the electrode 4 of the pellet 2 and the electrode 5 of the multilayer substrate 1,
A spherical CCB bump 6 made of solder material is connected, and the integrated circuit of the pellet 2 and the wiring of the multilayer substrate 1 are electrically connected via this CCB bump 6.
多層基板１の表面においてベレット２の周囲には、アル
ミ （ＡＡ）などのような熱伝導性の高い１１［からな
る四角枠状のスペーサ７が介装され、ろう材８を介して
多層基板１の表面に接合されている。A rectangular frame-shaped spacer 7 made of highly thermally conductive material 11 such as aluminum (AA) is interposed around the pellet 2 on the surface of the multilayer substrate 1, and the spacer 7 is inserted into the multilayer substrate 1 through a brazing material 8. bonded to the surface of
ベレット２の上面には、スペーサ７とほぼ等しい外径を
有する四角板状のアルミ（Ａｊｌりなどからなる拡大放
熱板９がろう材１０を介して接合され、スペーサ７の上
面とこの拡大放熱板９の下面周縁部との間に僅かな隙間
ｄが形成されている。On the upper surface of the pellet 2, an enlarged heat sink 9 made of a rectangular plate of aluminum (Ajl or the like) having an outer diameter approximately equal to that of the spacer 7 is bonded via a brazing material 10, and the upper surface of the spacer 7 and this enlarged heat sink A slight gap d is formed between the lower surface peripheral edge portion of 9 and the periphery of the lower surface.
拡大放熱板９の上面には、アルミ （Ａβ）などの押出
し材からなる第１のヒートシンク１１および第２のヒー
トシンク１２が、それらの放熱フィンｌｌａ、１２ａを
互いに噛み合わせた状態で載置され、第１のヒートシン
ク１１の下面が接着剤１３を介して拡大放熱板９に接合
されている。On the upper surface of the enlarged heat sink 9, a first heat sink 11 and a second heat sink 12 made of extruded material such as aluminum (Aβ) are placed with their heat sink fins lla and 12a interlocked with each other. The lower surface of the first heat sink 11 is bonded to the enlarged heat sink 9 via an adhesive 13.
第１および第２のヒートシンク１１．１２の各放熱フィ
ンｌｌａ、１２ａの間には、ベレット２の傾きを吸収す
るため、アルミナ含をシリコーン樹脂などのように熱伝
導性が高く、かつ、非硬化性の軟質充填剤１４が充填さ
れ、これにより、拡大放熱板９およびヒートシンク１１
．１２の５重がベレット２の上面全体に均一に負荷され
るようになっている。In order to absorb the inclination of the pellet 2, between each of the radiation fins 11 and 12a of the first and second heat sinks 11 and 12, alumina-containing material is used, such as silicone resin, which has high thermal conductivity and is not hardened. The expanded heat sink 9 and the heat sink 11 are filled with a soft filler 14.
．． 12 quintuple loads are uniformly applied to the entire upper surface of the pellet 2.
多層基板１の表面に実装された上記複数のペレット２は
、多層基板１の表面全体を覆うキャップ１５によって外
部から遮断されている。The plurality of pellets 2 mounted on the surface of the multilayer substrate 1 are shielded from the outside by a cap 15 that covers the entire surface of the multilayer substrate 1.
キャップ１５は、窒化アルミ （ＡＩＮ）などのセラミ
ック材からなり、周縁部下端がろう材１６を介して多層
基板ｌの表面周縁部に接合され、上部には、冷却水を循
環させるダクト１７が穿設されている。The cap 15 is made of a ceramic material such as aluminum nitride (AIN), and the lower end of the periphery is joined to the surface periphery of the multilayer substrate l via a brazing material 16, and the upper part is bored with a duct 17 for circulating cooling water. It is set up.
キャップ１５の上部下面と第２のヒートシンク１２との
間には、所定間隔を置いて多数の押しばね１８が取り付
けられ、第２のヒートシンク１２が下方に付勢されるこ
とによって、ペレット２、拡大放熱板９、ヒートシンク
１１．１２の相互間の熱的接合が向上するようになって
いる。A large number of push springs 18 are attached at predetermined intervals between the upper and lower surface of the cap 15 and the second heat sink 12, and by urging the second heat sink 12 downward, the pellets 2 are enlarged. Thermal bonding between the heat sink 9 and the heat sink 11, 12 is improved.
また、これにより、動作時のペレット２から発、生した
熱の一部が拡大放熱板９、ヒートシンク１１．１２、押
しばね１８を経てキャップＩ５に伝わるようになってい
る。Further, a part of the heat generated from the pellet 2 during operation is transmitted to the cap I5 via the enlarged heat sink 9, the heat sink 11, 12, and the push spring 18.
次に、上記構成からなる半導体装置の組立工程を第２図
（ａ）、（ｂ）に従って、説明する。Next, the assembly process of the semiconductor device having the above structure will be explained with reference to FIGS. 2(a) and 2(b).
まず、通常のウェハプロセスによって所定の集積回路が
形成されたウェハの電極４に、例えば、リフト・オフ法
などを用いて半田蒸着膜１９を被着した後、ウェハをペ
レット２に分割し、その裏面にろう材１０を用いて拡大
放熱板９を接合し、さらに、拡大放熱板９の裏面に接着
剤１３を用いて第１のヒートシンク１１を接合する。First, a solder vapor deposition film 19 is deposited on the electrode 4 of a wafer on which a predetermined integrated circuit has been formed by a normal wafer process using, for example, a lift-off method, and then the wafer is divided into pellets 2. The enlarged heat sink 9 is bonded to the back surface using a brazing material 10, and the first heat sink 11 is further bonded to the back surface of the enlarged heat sink 9 using an adhesive 13.
一方、多層基板１０表面にも四角枠状のスペーサ７をろ
う材８を用いて接合しておく。On the other hand, a rectangular frame-shaped spacer 7 is also bonded to the surface of the multilayer substrate 10 using a brazing material 8.
次に、ペレット２の電極４に被着された半田蒸着膜１９
の表面にフラックスを塗布した後、半田蒸着［１９とこ
れに対応する多層基板１の電極５とを重ね合わせてペレ
ット２を仮固定する（第２図（ａ））。Next, the solder vapor deposition film 19 deposited on the electrode 4 of the pellet 2
After applying flux to the surface, the pellet 2 is temporarily fixed by overlapping the solder vapor deposition 19 and the corresponding electrode 5 of the multilayer substrate 1 (FIG. 2(a)).
なお、その際、ペレット２の半田蒸着膜１９と多層基板
１の電極５とが当接されるよう、あらかじめスペーサ７
の高さを調整しておく。In addition, at this time, spacers 7 are placed in advance so that the solder evaporated film 19 of the pellet 2 and the electrode 5 of the multilayer substrate 1 are brought into contact with each other.
Adjust the height.
次に、ペレット２が仮固定された多層基板１をリフロー
炉に搬入して半田溶融温度で加熱することにより、半田
蒸着膜１９が溶融してペレット２の電極４と多層基板１
の電極５との間に球状のＣＣＢバンブ６が形成される。Next, the multilayer substrate 1 on which the pellet 2 is temporarily fixed is carried into a reflow oven and heated at a solder melting temperature, whereby the solder vapor deposited film 19 is melted and the electrode 4 of the pellet 2 and the multilayer substrate 1 are heated.
A spherical CCB bump 6 is formed between the electrode 5 and the electrode 5 .
その際、溶融した半田蒸着膜１９の表面張力によってペ
レット２が僅かに上方に持ち上げられ、スペーサ７の上
面と拡大放熱板９の下面周嘩部との間に隙間ｄが形成さ
れる（第２図（５））。At this time, the pellet 2 is slightly lifted upward by the surface tension of the melted solder vapor deposition film 19, and a gap d is formed between the upper surface of the spacer 7 and the lower surface of the enlarged heat dissipation plate 9 (second Figure (5)).
次に、キャップ１５の上部下面に押しばねＩ８を取り付
け、その下端に第２のヒートシンク１２を吊り下げた後
、多層基板１０表面にキャップ１５を被せ、第２のヒー
トシンク１２の放熱フィン１２ａをあらかじめ軟質充填
剤１４が充填された第１のヒートシンクの放熱フィンｌ
ｌａの隙間に噛み合わせ、拡大放熱板９およびヒートシ
ンク１１．１２の荷重がペレット２の上面全体に均一に
負荷されるように位置決め固定する。Next, a pressure spring I8 is attached to the upper lower surface of the cap 15, and the second heat sink 12 is suspended from the lower end of the spring I8, and then the cap 15 is placed on the surface of the multilayer board 10, and the radiation fins 12a of the second heat sink 12 are attached in advance. Radiation fin l of the first heat sink filled with soft filler 14
The pellets 2 are positioned and fixed so that the loads of the enlarged heat dissipation plate 9 and the heat sinks 11 and 12 are uniformly applied to the entire upper surface of the pellet 2.
最後に、ろう材１６を用いてキャップ１５の周縁部下端
を多層基板ｌの表面に接合し、ペレット２を外部から遮
断することにより、半導体装置が完成する。Finally, the lower end of the periphery of the cap 15 is bonded to the surface of the multilayer substrate l using the brazing material 16, and the pellet 2 is isolated from the outside, thereby completing the semiconductor device.
以上、本実施例によれば、次のような効果を得ることが
できる。As described above, according to this embodiment, the following effects can be obtained.
（１）、ペレット２の上面に接合された拡大放熱板９と
多層基板１との間にスペーサ７を介装したことにより、
拡大放熱板９、ヒートシンク１１．１２およびペレット
２の荷重によってＣＣＢバンプ６が変形し始めた際、拡
大放熱板９の下面周縁部がスペーサ７の上面に当接し、
このスペーサ７によって上記荷重が支えられるようにな
るため、ＣＣＢバンブ６がそれ以上変形するのを確実に
防止することができる。(1) By interposing the spacer 7 between the enlarged heat sink 9 bonded to the upper surface of the pellet 2 and the multilayer substrate 1,
When the CCB bump 6 begins to deform due to the load of the enlarged heat sink 9, the heat sink 11.12, and the pellet 2, the lower peripheral edge of the enlarged heat sink 9 comes into contact with the upper surface of the spacer 7,
Since the above-mentioned load is supported by the spacer 7, further deformation of the CCB bump 6 can be reliably prevented.
（２）、上記（１）により、ＣＣＢバンブ６の寿命およ
び接続信頼性が向上し、半導体装置の高密度実装が促進
される。(2) According to (1) above, the life span and connection reliability of the CCB bump 6 are improved, and high-density packaging of semiconductor devices is promoted.
以上、本発明者によってなされた発明を実施例に基づき
具体的に説明したが、本発明は前記実施例に限定される
ものではなく、その要旨を逸脱しない範囲で種々変更可
能であることはいうまでもない。As above, the invention made by the present inventor has been specifically explained based on Examples, but it should be noted that the present invention is not limited to the Examples and can be modified in various ways without departing from the gist thereof. Not even.
例えば、多層基板上にスペーサを接合する手段に代えて
、第３図に示すように、拡大放熱板９の下面周縁部にス
ペーサ７を一体接合したり、第４図に示すように、ベレ
ット２の下面周縁部と多層基板１との間にスペーサ７を
介装してもよい。For example, instead of joining the spacers on the multilayer board, as shown in FIG. 3, the spacers 7 may be integrally joined to the lower peripheral edge of the enlarged heat sink 9, or as shown in FIG. A spacer 7 may be interposed between the lower peripheral edge of the multilayer substrate 1 and the multilayer substrate 1 .
また、スペーサの形状は、四角枠状のものに限定されず
、例えば、拡大放熱板やベレットの下面周縁部の四隅に
円柱状のスペーサを介装してもよい。Further, the shape of the spacer is not limited to a rectangular frame shape, and for example, cylindrical spacers may be interposed at the four corners of the lower peripheral edge of the enlarged heat sink or the pellet.
さらに、スペーサ、拡大放熱板、ヒートシンクなどは、
熱伝導度の良好なものであれば、その材質や形状を適宜
変更してよく、また、ベレットの上面に直接ヒートシン
クを接合し、ヒートシンクの下面と多層基板との間にス
ペーサ７を介装する構成としてもよい。In addition, spacers, expansion heat sinks, heat sinks, etc.
As long as it has good thermal conductivity, its material and shape may be changed as appropriate.Also, the heat sink may be directly bonded to the top surface of the pellet, and a spacer 7 may be interposed between the bottom surface of the heat sink and the multilayer board. It may also be a configuration.
本願において開示される発明のうち代表的なものによっ
て得られる効果を簡単に説明すれば、下記の通りである
。A brief explanation of the effects obtained by typical inventions disclosed in this application is as follows.
すなわち、上面に放熱体を設けたベレットをＣＣＢバン
ブを介して基板に実装し、基板とベレットとの間、また
は、基板と放熱体との間にスペーサを介装した半導体装
置構造とすることにより、放熱体の荷重がスペーサによ
って支えられるため、ＣＣＢバンブの変形が確実に防止
され、これにより、ＣＣＢバンプの接続信頼性が向上す
る。That is, by mounting a pellet with a heat sink on the top surface on a substrate via a CCB bump, and creating a semiconductor device structure in which a spacer is interposed between the substrate and the pellet or between the substrate and the heat sink. Since the load of the heat sink is supported by the spacer, deformation of the CCB bump is reliably prevented, thereby improving the connection reliability of the CCB bump.
第１図は本発明の一実施例である半導体装置を示す要部
断面図、
第２図（ａ）、 （ｂ）はこの半導体装置の組立工程を
示す要部断面図、
第３図および第４図は本発明の他の実施例である半導体
装置をそれぞれ示す要部断面図である。
１・・・多層基板、２・・・半導体ベレット、３・・・
ビン、４．５・・・電極、６・・・ＣＣＢバンブ、７・
・・スペーサ、８，１０．１６・・・ろう材、９・・・
拡大放熱板、１１．１２・・・ヒートシンク、ｌｌａ、
１２ａ・・・放熱フィン、１３・・・接着剤、１４・・
・軟質充填剤、１５・・・キャップ、１７・・・ダクト
、１８・・・押しばね、１９・・・半田蒸着膜、ｄ・・
・隙間。
９＼
第１図
↓
１コニ１マ・シフ９
第２図
（ａ）
（ｂ）
第３図
第４図
、／１１FIG. 1 is a sectional view of a main part showing a semiconductor device which is an embodiment of the present invention, FIGS. 2(a) and (b) are sectional views of main parts showing an assembly process of this semiconductor device, and FIGS. FIG. 4 is a cross-sectional view of a main part showing a semiconductor device according to another embodiment of the present invention. 1... Multilayer board, 2... Semiconductor pellet, 3...
Bottle, 4.5... Electrode, 6... CCB bump, 7.
... Spacer, 8, 10.16... Brazing metal, 9...
Expanding heat sink, 11.12... heat sink, lla,
12a...Radiation fin, 13...Adhesive, 14...
- Soft filler, 15... Cap, 17... Duct, 18... Pressing spring, 19... Solder vapor deposition film, d...
·gap. 9＼ Figure 1↓ 1Ko 1 Ma Schiff 9 Figure 2 (a) (b) Figure 3 Figure 4, /11
Claims (1)
するとともに、前記半導体ペレットの上面に放熱体を設
けてなる半導体装置であって、前記基板と半導体ペレッ
トとの間、または、前記基板と放熱体との間にスペーサ
を介装したことを特徴とする半導体装置。 ２、基板に実装された半導体ペレットをキャップで被覆
し、前記キャップと放熱体との間に前記放熱体を下方に
付勢する付勢手段を設けたことを特徴とする請求項１記
載の半導体装置。[Claims] 1. A semiconductor device in which a semiconductor pellet is mounted on a substrate via a CCB bump, and a heat dissipation body is provided on the upper surface of the semiconductor pellet, the semiconductor pellet being mounted between the substrate and the semiconductor pellet, or . A semiconductor device, characterized in that a spacer is interposed between the substrate and the heat sink. 2. The semiconductor according to claim 1, wherein the semiconductor pellet mounted on the substrate is covered with a cap, and a biasing means for biasing the heat sink downward is provided between the cap and the heat sink. Device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63041996A JPH01217951A (en) | 1988-02-26 | 1988-02-26 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63041996A JPH01217951A (en) | 1988-02-26 | 1988-02-26 | Semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01217951A true JPH01217951A (en) | 1989-08-31 |
Family
ID=12623811
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP63041996A Pending JPH01217951A (en) | 1988-02-26 | 1988-02-26 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01217951A (en) |
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5672548A (en) * | 1994-07-11 | 1997-09-30 | International Business Machines Corporation | Method for attaching heat sinks directly to chip carrier modules using flexible-epoxy |
| US5751062A (en) * | 1994-12-15 | 1998-05-12 | Hitachi, Ltd. | Cooling device of multi-chip module |
| US6046498A (en) * | 1997-06-30 | 2000-04-04 | Nec Corporation | Device having a heat sink for cooling an integrated circuit |
| US6943443B2 (en) * | 2001-01-17 | 2005-09-13 | Matsushita Electric Industrial Co., Ltd. | Electronic circuit device including metallic member having installation members |
| US7078788B2 (en) | 2000-08-16 | 2006-07-18 | Intel Corporation | Microelectronic substrates with integrated devices |
| US7082033B1 (en) * | 1998-02-13 | 2006-07-25 | Micron Technology, Inc. | Removing heat from integrated circuit devices mounted on a support structure |
| JP2007532002A (en) * | 2004-03-30 | 2007-11-08 | ハネウェル・インターナショナル・インコーポレーテッド | Thermal diffuser structure, integrated circuit, method of forming thermal diffuser structure, and method of forming integrated circuit |
| JP2012064864A (en) * | 2010-09-17 | 2012-03-29 | Denso Corp | Mounting structure of electronic module |
-
1988
- 1988-02-26 JP JP63041996A patent/JPH01217951A/en active Pending
Cited By (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5672548A (en) * | 1994-07-11 | 1997-09-30 | International Business Machines Corporation | Method for attaching heat sinks directly to chip carrier modules using flexible-epoxy |
| US5744863A (en) * | 1994-07-11 | 1998-04-28 | International Business Machines Corporation | Chip carrier modules with heat sinks attached by flexible-epoxy |
| US5785799A (en) * | 1994-07-11 | 1998-07-28 | International Business Machines Corporation | Apparatus for attaching heat sinks directly to chip carrier modules using flexible epoxy |
| US5751062A (en) * | 1994-12-15 | 1998-05-12 | Hitachi, Ltd. | Cooling device of multi-chip module |
| US6046498A (en) * | 1997-06-30 | 2000-04-04 | Nec Corporation | Device having a heat sink for cooling an integrated circuit |
| US6251709B1 (en) | 1997-06-30 | 2001-06-26 | Nec Corporation | Method of manufacturing a cooling structure of a multichip module |
| US7082033B1 (en) * | 1998-02-13 | 2006-07-25 | Micron Technology, Inc. | Removing heat from integrated circuit devices mounted on a support structure |
| US7078788B2 (en) | 2000-08-16 | 2006-07-18 | Intel Corporation | Microelectronic substrates with integrated devices |
| US6943443B2 (en) * | 2001-01-17 | 2005-09-13 | Matsushita Electric Industrial Co., Ltd. | Electronic circuit device including metallic member having installation members |
| US7208833B2 (en) | 2001-01-17 | 2007-04-24 | Matsushita Electric Industrial Co., Ltd. | Electronic circuit device having circuit board electrically connected to semiconductor element via metallic plate |
| JP2007532002A (en) * | 2004-03-30 | 2007-11-08 | ハネウェル・インターナショナル・インコーポレーテッド | Thermal diffuser structure, integrated circuit, method of forming thermal diffuser structure, and method of forming integrated circuit |
| JP2012064864A (en) * | 2010-09-17 | 2012-03-29 | Denso Corp | Mounting structure of electronic module |
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