JPH0329372A - Manufacturing method of semiconductor pressure sensor - Google Patents
Manufacturing method of semiconductor pressure sensorInfo
- Publication number
- JPH0329372A JPH0329372A JP16294189A JP16294189A JPH0329372A JP H0329372 A JPH0329372 A JP H0329372A JP 16294189 A JP16294189 A JP 16294189A JP 16294189 A JP16294189 A JP 16294189A JP H0329372 A JPH0329372 A JP H0329372A
- Authority
- JP
- Japan
- Prior art keywords
- silicon
- pressure
- recess
- wafer
- insulating film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims description 24
- 238000004519 manufacturing process Methods 0.000 title claims description 8
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 69
- 229910052710 silicon Inorganic materials 0.000 claims description 68
- 239000010703 silicon Substances 0.000 claims description 68
- 238000000034 method Methods 0.000 claims description 35
- 239000000758 substrate Substances 0.000 claims description 28
- 238000001020 plasma etching Methods 0.000 claims description 18
- 238000005498 polishing Methods 0.000 claims description 4
- 238000005530 etching Methods 0.000 description 23
- 238000007796 conventional method Methods 0.000 description 11
- 238000001514 detection method Methods 0.000 description 10
- 230000035945 sensitivity Effects 0.000 description 9
- 238000000866 electrolytic etching Methods 0.000 description 6
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 6
- 238000009792 diffusion process Methods 0.000 description 4
- 238000005553 drilling Methods 0.000 description 4
- 238000009412 basement excavation Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 238000010438 heat treatment Methods 0.000 description 3
- 239000000243 solution Substances 0.000 description 3
- 238000001179 sorption measurement Methods 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 239000002253 acid Substances 0.000 description 2
- 239000013078 crystal Substances 0.000 description 2
- 239000007789 gas Substances 0.000 description 2
- 229910052814 silicon oxide Inorganic materials 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- 238000007743 anodising Methods 0.000 description 1
- 239000007864 aqueous solution Substances 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 239000013013 elastic material Substances 0.000 description 1
- 239000003792 electrolyte Substances 0.000 description 1
- 238000000407 epitaxy Methods 0.000 description 1
- 238000007730 finishing process Methods 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 230000001788 irregular Effects 0.000 description 1
- 230000007774 longterm Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910017604 nitric acid Inorganic materials 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 239000002210 silicon-based material Substances 0.000 description 1
Landscapes
- Pressure Sensors (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は半導体シリコンに凹所を堀り込むことにより形
威されるシリコンの受圧ダイアフラム部に歪ケージを備
えてなる半導体圧力センサを製造するための方法に関す
る.
〔従来の技術〕
よく知られているように、半導体圧力センサは理想的な
高弾性材料である単結晶シリコンからなる受圧ダイアフ
ラム上にケージファクタが非常に高いシリコン歪ケージ
を作り込めるので、半導体技術を用いて小形で高感度な
ものが得られる特長があるが、感度の揃ったセンサの量
産には、シリコンウェハに凹所を正確に堀り込んで受圧
ダイアフラムの寸法とくに厚みを揃える必要があり、こ
のため従来から種々工夫がなされて来た.第1の従来技
術では、シリコンの基板上にそれと比抵抗が異なるエビ
タキシャル層を威長させ、エビタキシ中ル層表面に歪ケ
ージを作り込んだ上で、碁仮の裏面側からぶつ酸.硝酸
等の混合水溶液を用いて凹所を化学エッチングする.こ
の液のエッチング速度はシリコンの比抵抗に応じて選択
性があり、堀り込みがエビタキシャル層まで進むとエッ
チング速度が急速に落ちるので、これを利用して凹所の
堀り込み深さ従って受圧ダイアフラムの厚みを揃えるこ
とができる.
第2の従来技術では、n形の基板上にエビタキシャル層
をp形で威長させ、同様にエビタキシャル層側に歪ケー
ジを作り込んだ上で、基板の裏面側からプラズマエッチ
ング等によりエビタキシャル層との界面の数十一程度手
前まで下穴をまず明け、ついでぶつ酸溶液等を電解液と
しn形の基板を陽極とする電解エッチングにより下穴を
広げて凹所を仕上げる.この仕上げ用の堀り込みが残さ
れた数十一の基板を陽極酸化しながらp形のエビタキシ
ャル層に達したときに自動停止するので、第1の従来技
術よりは正確に受圧ダイアフラムの厚みを揃えることが
できる.
第3の従来技術では、凹所の堀り込みをプラズマエッチ
ングのみにより行ない、このエッチング条件を電気的に
正確に制御することにより、堀り込み深さを管理して受
圧ダイアフラムの厚みを揃える.従って、基板上にエビ
タキシ中ル層を威長させる必要はとくになく、所望の角
度でカットされた単結晶シリコンを基板に用いて検出特
性の良好な歪ケージを作り込める.
〔発明が解決しようとする課題〕
以上の従来技術はすべて工夫の結果生まれたものでそれ
ぞれ上述のような利点を有する一方、そのいずれにも次
のような問題点がある.第1の従来技術では、エッチン
グ時の化学反応に基づく発熱と気泡発生がかなり多く、
堀り込みが進行するにつれて熱や泡の放散が不充分にな
る結果、他の従来技術に比べて凹所の深さや形状に不揃
いが出やすい.従って、その実際の適用は大きくて浅い
凹所の堀り込み用に限られる.第2の従来技術では、電
解エッチングが基板とエビタキシャル層のpn接合面で
自動停止して呉れるので、エビタキシャル層の厚みによ
り受圧ダイアフラムの厚みを管理できるが、電解エッチ
ングの速度が遅くて下穴明けが必要なので工程が2@に
分かれるほか、下穴明けの過不足やpn接合の逆洩れ電
流によって不揃いが発生することがある.また、凹所の
底面に多孔性の多結晶シリコン膜が生威されやすく、そ
の除去が厄介で使用中に脱落するトラブルが発生しやす
い.
第3の従来技術では、凹所の堀り込み深さの均一性が第
2の従来技術ほど良好でない.この解決にはプラズマエ
ッチング条件を等方性にするのが有利であるが、この条
件で堀り込まれた凹所の底には丸みがつきやすく、受圧
ダイアフラムが中央部と周縁部で厚みがかなり異なる異
形形状になって感度がばらつく原因となる.このため、
実際には堀り込みを浅く従ってウェハを薄くするのが有
利であるが、ウェハプロセス中でその取り扱いが非常に
厄介になる問題が派生する.
このように、いずれの従来技術にも一長一短があって決
定版を見い出せない現状であるが、半導体圧力センサの
量産上は上述のように受圧ダイアフラムの厚み従ってセ
ンサの感度を均一に管理できるのが最も大切で、次に凹
所の堀り込みを極力簡単にできることが望ましい.
かかる事情に立脚して、本発明の目的は受圧ダイアフラ
ムの厚みを高精度にかつ容易に管理することができる半
導体圧力センサの製造方法を提供することにある.
〔課題を解決するための手段]
この目的は本発明方法によれば、シリコン基板とシリコ
ン板とを一方の研磨面に被着した薄い絶縁膜と他方の研
磨面との間で相互に接合した上でシリコン板を所定の厚
みに研磨してウェハを調製し、ウェハのシリコン板側表
面に歪ケージを作り込み、歪ケージが作り込まれた個所
に対応する範囲のウェハのシリコン基板側表員から凹所
をプラズマエッチング法により絶縁膜に達するまで堀り
込み、シリコン仮のこの凹所に対応する部分によって圧
力センサの受圧ダイアフラムを形成させることにより達
成される.
なお、上記構或中の絶縁膜としてはシリコン酸化膜が最
も簡単で、その厚みを0.5〜2μとするのが好適であ
る.この絶縁膜は接合前のシリコン基板とシリコン板の
いずれに設けて置いてもよいが、前者に設ける方が圧力
センサの密封を完全にする上で望ましい.また、この絶
縁膜を設けるべき面およびそれとの接合面には鏡面研磨
を施して置くのが望ましい.
二の絶縁膜を介するシリコン基板とシリコン板との相互
接合は、加温下で両者を静電的に吸着させて行なうのが
よく、この際の加熱温度は350〜400 ’Cとし、
静電吸着のため両者間に400〜soov程度の直流電
圧を掛けるのが好適である.これによる接合強度は充分
高く、接合後のシリコン基板とシリコン板を強制的に引
き外すと、接合面では破壊せずシリコン内で破壊が発生
する.調製されたウェハのシリコン板側表面に設ける歪
ケージは、拡散により作り込むのが最も簡単でかつ高い
ケージファクタを得る上で望ましく、かつシリコン板の
結晶面をこれに適するように選定して置くのが望ましい
.
ウェハのシリコン基板側表面からのプラズマエッチング
は、異方性エッチング条件で行なうのが凹所を表面にほ
ぼ直角な側面形状で堀り込んで所要チップ面積を縮小す
る上で望ましい.この条件では堀り込み深さが不揃いに
なりやすいが、オーバエッチングを行なって堀り込みを
絶縁膜内で停止させることができる.
〔作用〕
前述の電解エッチング法は凹所の堀り込みをpn接合面
で停止させて受圧ダイアフラムの厚みを揃える上で有利
であるがエッチング速度が遅い欠点があり、これに対し
てプラズマエッチング法はエッチング速度は早いが凹所
を均一な深さに堀り込むにはあまり有利でなく、それぞ
れ一長一短があるのが従来の問題点である.
本発明は、絶縁膜をあらかじめウェハ内部に作り込んで
置けば、プラズマエッチング法による四所の堀り込みを
電解エッチング法におけると同様にこの絶縁膜の表面で
停止させることができる点に着目して、半導体圧力セン
サの製造方法を前項記載の構威とすることにより、電解
エッチング法の受圧ダイアフラムの厚みを高精度で管理
できる長所とプラズマエッチング法のエッチング速度が
早い長所とをこれに兼備させ、かつ両方法のもっていた
欠点のほとんどを解消して課題を解決し、実用的な工程
で感度が高くかつよく揃った半導体圧力センサの量産に
威功したものである.〔実施例〕
以下、本発明による半導体圧力センサの製造方法の実施
例を、第1図を参照しながらその主な工程ごとに説明す
る.
第1図(a)に小形の半導体圧力センサを多数個作り込
むための同図(C)のウェハ1Gを構威するシリコン基
板lとシリコン板2を示す.同図(6)の完威状態の半
導体圧力センサ20からわかるように、シリコン基仮l
は受圧ダイアフラム2lの裏側の凹所22を堀り込む部
分用で、凹所22の周囲の支承壁23が受圧ダイアフラ
ム21を支える役目をするので熱膨張係数を合わせる必
要はあるが、いわば機構部なので単結晶シリコンのほか
任意のシリコン材料で構威できる.その厚みは凹所22
に必要な深さに応じて選定され、ふつうは300〜50
0 4とされる.シリコン板2の方は受圧ダイアフラム
2l用なので高弾性をもつ単結晶シリコンを用いるのが
望ましく、最終的に必要な厚みは数十一であるがあまり
薄いと単体時の取り扱いに不便なので、ふつうは200
〜300 4程度の厚みとされる.なお、この実施例で
は受圧ダイアフラムに組み込まれる歪ケージが拡散形な
ので、シリコン[2にはそれに通した(110)面を持
ちかつn形の単結晶シリコンが用いられものとする.
これらのシリコン基板lとシリコン板2を絶縁膜を介し
て接合するための第1図(a)の単体状態での準備工程
として、この例ではシリコン基板lの方にその片面に鏡
面研磨を施して研磨面1aとした上で絶緑膜3としてシ
リコン酸化膜を被着し、シリコン板2の方にはその片面
に鏡面研磨を施して研磨面2aとして置く.絶縁膜3は
通常の熱酸化膜ないしスチーム酸化膜であってよく、そ
の厚みは0.5〜2−とするのがよい.なお、この絶縁
膜3の被着と同時にシリコン碁板lの下面は同し酸化膜
4によって覆われる.
次の第IVA(ロ)の接合工程では、シリコン基板1と
シリコン板2を重ね合わせ、350〜400℃に加熱し
た条件下で400〜aoo vの直流電圧Eを掛けて相
互に密に静電吸着させることにより、両者を相互に接合
して一体とする.
なお、この接合は通常の加圧下での高温加熱によっても
可能であるが、本発明におけるように接合面にごく薄い
絶縁膜が介在する場合、これを利用してシリコン基板1
とシリコン板2との間に強い静電吸着力を発生させるこ
とにより低温での接合が可能になり、シリコン仮2内の
残留熱歪みを減少させて受圧ダイアフラム21に圧力が
掛かったときの撓みを一定にし、検出感度のばらつきを
減少させることができる.また、これにより前述のよう
にシリコンの強度より強固な接合を形成させることがで
きる.
続く第1図(C)はウェハlOとしての仕上げ工程であ
って、シリコン板2の表面2bを研削かつ研磨すること
によりその厚みを所望値に正確に合わせ、かつこの実施
例では拡散により歪ケージを作り込めるように鏡面仕上
げする.本発明方法ではシリコン板2のこの仕上げ厚み
により受圧ダイアフラム2lの厚みを実質上決めること
ができ、その値はもちろん被検出圧力に応じて選定され
るが通常は数十一程度とされる.
第1図(ロ)は歪ケージ6の組み込み工程であり、図の
右側の部分拡大図に示すように、この実施例ではn形の
シリコン板2の表面から通常のプロセス酸化Wlt5を
マスクとしてp形層6を拡散して歪ケージとする.この
歪ケージ6はふつう4個設けられ、プロセス酸化膜5に
明けた窓を介してその両端部に導電接触するアルミ等の
接続M7によりブリッジ接続される.接統膜7上は通例
のように窒化シリコン等の保護118で覆われる.第1
図(e)と(f)は凹所22のプラズマエッチングによ
る堀り込み工程であって、第1図(e)がその途中状履
,第1図(f)が完了状態である.このプラズマエッチ
ングには、通例のように高周波プラズマを用い、反応ガ
スとしては例えばSP−にlO〜30%の酸素を混入し
たものを用いて、シリコン基Itと絶緑膜3に対するエ
ッチング速度を2桁程度異ならせる.また、凹所22を
図のようにほぼ傾斜のない側面22aを持つ形状に堀り
込むため、ガス圧,高周波電力等を選定して異方性エッ
チング条件とするのが望ましい.
プラズマエッチングに当たっては、ウェハ1Gのシリコ
ン基板1の裏面に付けたアルξや銅の数一の膜をマスク
9として、その窓から凹所22を堀り込む.エッチング
を異方性にすることにより、凹所の側面22aは若干つ
ぼ形になる傾向はあるが、図示のようにおおむね傾斜の
ない形状になり、垂直方向の堀り込み深さに対する側方
へのいわゆるサイrエッチ量はA程度である.
しかし、この異方性エッチングでは堀り込み深さに若干
ばらつきが出るのは避け難く、第1図(e)に示すよう
にある凹所22では堀り込みが絶縁113に達しても、
他の凹所では堀り込みが不足になってシリコン基板にエ
ッチング残部1bが出やすい.第1図(f)はかかる残
部1bをすべてなくすようオーバエッチングした後の堀
り込み完了状態を示す.このように本発明方法では、プ
ラズマエッチングによる堀り込み深さにかなり不揃いが
出ても、常にオーバエッチングを掛けて堀り込みを絶緑
膜3内で停止させることにより、すべての凹所22の堀
り込み深さを揃えることができる.
この堀り込みの停止は、もちろんエッチング速度がシリ
コン基Filと絶縁膜3とで2桁以上異なるためであっ
て、逆にいえば本発明方法ではオーバエッチング時に堀
り込みが絶縁膜内で停まるように絶縁膜の厚みを選定す
る.前述のように凹所22の深さはふつうは500一以
下で、堀り込み深さの不揃いは異方性エッチング条件で
もそのlO%の50tsa以下であるから、酸化膜等の
絶!!G3のエッチング速度をシリコンの1/100と
すると、その厚みは0.54以上あればよいことになる
.また絶縁膜3にこの程度の厚みがあれば、第1図(ロ
)の工程でシリコン基板1とシリコン仮2の間に充分電
圧を掛け、接合形威に要する静電吸着力を発生させ得る
.しかし、実際面では絶縁膜3の膜厚に若干余裕を見て
置くのが望ましく、経験的ではあるが本発明ではこの絶
縁膜厚を前述のように0.5〜2mとするのが適当であ
る.このように凹所22の堀り込みが完了したウェハ1
0は、マスク9の除去後に第1図(6)のグイシング工
程で半導体圧力センサ20に単離される.以上のように
して製作された半導体圧力センサ20は、例えば3■角
の薄いチンブに2鵬径の凹所22が堀り込まれた小形の
もので、支承壁23の下面を取り付け面とし、受圧ダイ
アフラム2lの上下面に被検出圧力および基準圧力をそ
れぞれ受けた状態で使用され、受圧ダイアフラム2lに
組み込まれた複数個の歪ケージ6のブリッジ接続回路か
ら検出出力が取り出される.
この半導体圧力センサでは、受圧ダイアフラム2lの厚
みがウェハ10内のシリコン板2の厚みで決められるの
で、凹所22の堀り込み時、のオーバエッチングにより
絶縁11R3の厚みに若干の不揃いが出ても、受圧ダイ
アフラムの厚みを±2〜3−の高精度で管理することが
できる.また、この実施例では前述のようにシリコン碁
仮1とシリコン板2とが比較的低温で接合されているの
で、受圧ダイアフラム2l内の残留熱歪みが少なく、従
って歪ケージ6のブリッジ検出出力の検出圧力に対する
直線性が良好で、かつ圧力検出感度レベルのばらつきも
小さく管理できる.
さらにこの実施例では、絶縁膜3がシリコン基板1上の
熱酸化膜等なのでこれと支承壁23との界面の気密性が
非常に高く、被検出圧力が基準圧力側に洩れるおそれな
く圧力センサの長期使用期間中その検出感度を安定に維
持することができる.また、この実施例における異方性
プラズマエッチングの採用により、凹所22を傾斜のな
いほぼ理想的な側面形状で堀り込んで、圧力センサのチ
ップサイズを最低に縮小できる.なお、図の半導体圧力
センサ20の断面形状は、図示の都合上その上下方向寸
法が左右方向に比べて2倍程度跨張されていることを了
承されたい.
以上説明した実施例に限らず、本発明は種々の態様で実
施をすることができる.例えば、絶縁膜の種類.接合前
の絶縁膜の被着相手.シリコン基板とシリコン板の接合
手段,プラズマエッチングの条件.歪ケージの種類等は
、実施例中の記載が最良ではあるがあくまでも例示であ
り、必要に応じて適宜な変形を加えて上述の効果の全部
ないし一部を得ることができる.
〔発明の効果〕
本発明では以上の説明のとおり、シリコン基板とシリコ
ン板とを一方の研磨面に被着した薄い絶縁膜と他方の研
磨面との間で相互に接合した上でシリコン板を所定の厚
みに研磨することにより半導体圧力センサを作り込むた
めのウェハをまず調製し、このウェハのシリコン板側表
面には歪ケージを作り込み、ウェハのシリコン基板側表
面からはこの歪ケージが作り込まれた個所に対応する範
囲に凹所をプラズマエッチング法により絶&iWAに達
するまで堀り込み、この凹所に対応するシリコン板部分
を被検出圧力を受ける受圧ダイアフラムとすることによ
り、ウェハ内に作り込むすべての半導体圧力センサにつ
いて凹所の堀り込みが常に絶縁膜内で停止されるので、
受圧ダイアフラムをウェハ内のシリコン板に与えた厚み
に±2〜3一の誤差内で揃えて、検出感度が従来より格
段に一定した半導体圧力センサを量産できる.さらに、
本発明およびその有利な実施態様により次の効果を上げ
ることができる.
(6)エッチング速度が早いプラズマエッチングにより
、かつ1回の工程で深い凹所を短時間内に堀り込めるの
で、低い製作コストで任意の設計の半導体圧力センサを
量産できる.
(ロ)静電吸着を利用した低温接合法でウェハを調製す
ることにより、受圧ダイアフラム内の残留熱歪みを減少
させて、半導体圧力センサの圧力感度レベルを揃え、か
つそのブリッジ検出出力特性の直線性を向上できる.
(C)拡散形の歪ケージを用いる場合、受圧ダイアフラ
ム用のシリコン板にそれに最も適した結晶面をもつ単結
晶シリコンを用いることにより、ケージファクタが高く
従って検出感度の高い歪ケージを作り込める.
(ロ)異方性プラズマエッチングで凹所を堀り込むこと
により、凹所を理想的な形状として半導体圧力センサを
小形化できる.
(e)絶゜縁膜を接合前のシリコン基板側に設けて置く
ことにより、密封性が非常に良好で従って検出特性の信
頼性が高い圧力センサをgl供できる.[Detailed Description of the Invention] [Industrial Application Field] The present invention manufactures a semiconductor pressure sensor in which a strain cage is provided in a silicon pressure receiving diaphragm formed by digging a recess into semiconductor silicon. Regarding the method for [Prior Art] As is well known, semiconductor pressure sensors are developed using semiconductor technology because a silicon strain cage with a very high cage factor can be fabricated on a pressure-receiving diaphragm made of single-crystal silicon, which is an ideal highly elastic material. It has the advantage of being able to obtain a compact and highly sensitive sensor using a sensor, but in order to mass-produce sensors with uniform sensitivity, it is necessary to precisely drill recesses in the silicon wafer and make the dimensions, especially the thickness, of the pressure-receiving diaphragm uniform. For this reason, various efforts have been made to date. In the first conventional technique, an epitaxial layer having a different resistivity from that of the silicon substrate is formed, a strain cage is formed on the surface of the epitaxial layer, and then an acid layer is formed from the back side of the Go card. Chemically etch the recesses using a mixed aqueous solution such as nitric acid. The etching rate of this solution is selective depending on the resistivity of silicon, and as the etching progresses to the epitaxial layer, the etching rate drops rapidly. The thickness of the pressure receiving diaphragm can be made the same. In the second conventional technology, a p-type epitaxial layer is formed on an n-type substrate, a strain cage is similarly formed on the epitaxial layer side, and the strain cage is removed from the back side of the substrate by plasma etching or the like. First, a pilot hole is drilled several tens of meters before the interface with the taxial layer, and then the pilot hole is enlarged by electrolytic etching using an acid solution as an electrolyte and the n-type substrate as an anode to finish the recess. The process automatically stops when the p-type epitaxial layer is reached while anodizing the dozens of substrates left with this finishing digging, so the thickness of the pressure-receiving diaphragm can be determined more accurately than in the first conventional technique. You can arrange the . In the third conventional technique, the recess is dug only by plasma etching, and the etching conditions are accurately controlled electrically to control the depth of the trench and make the thickness of the pressure receiving diaphragm uniform. Therefore, there is no particular need to increase the size of the epitaxy medium layer on the substrate, and a strain cage with good detection characteristics can be fabricated by using single crystal silicon cut at a desired angle as the substrate. [Problem to be solved by the invention] All of the above conventional techniques were created as a result of ingenuity, and while each has the advantages described above, they all have the following problems. The first conventional technique generates a lot of heat and bubbles due to chemical reactions during etching.
As the digging progresses, the dissipation of heat and bubbles becomes insufficient, resulting in irregularities in the depth and shape of the recess compared to other conventional techniques. Therefore, its practical application is limited to digging large and shallow depressions. In the second conventional technique, the electrolytic etching automatically stops at the pn junction between the substrate and the epitaxial layer, so the thickness of the pressure receiving diaphragm can be controlled by the thickness of the epitaxial layer, but the electrolytic etching speed is slow and the process is slow. Since drilling is required, the process is divided into two steps, and irregularities may occur due to over-drilling or under-drilling or reverse leakage current of the pn junction. In addition, a porous polycrystalline silicon film tends to grow on the bottom of the recess, making it difficult to remove and easily falling off during use. In the third conventional technique, the uniformity of the digging depth of the recess is not as good as in the second conventional technique. To solve this problem, it is advantageous to make the plasma etching conditions isotropic, but under these conditions, the bottom of the recess is likely to be rounded, and the pressure receiving diaphragm is thicker at the center and periphery. This results in significantly different irregular shapes and causes variations in sensitivity. For this reason,
In practice, it is advantageous to make the trench shallower and thus make the wafer thinner, but this creates a problem that makes handling during the wafer process extremely difficult. In this way, all of the conventional technologies have their advantages and disadvantages, and it is currently difficult to find a definitive solution. However, in mass production of semiconductor pressure sensors, it is important to uniformly control the thickness of the pressure receiving diaphragm and therefore the sensitivity of the sensor, as described above. Most important, and secondly, it is desirable to be able to dig into the recess as easily as possible. Based on such circumstances, an object of the present invention is to provide a method for manufacturing a semiconductor pressure sensor that allows the thickness of a pressure receiving diaphragm to be easily controlled with high precision. [Means for Solving the Problems] According to the method of the present invention, a silicon substrate and a silicon plate are bonded to each other between a thin insulating film deposited on one polished surface and the other polished surface. A wafer is prepared by polishing the silicon plate to a predetermined thickness as described above, and a strain cage is created on the silicon plate side surface of the wafer. This is accomplished by digging out a recess from the hole using a plasma etching method until it reaches the insulating film, and forming the pressure-receiving diaphragm of the pressure sensor using the portion of temporary silicon that corresponds to this recess. Note that the simplest insulating film in the above structure is a silicon oxide film, and its thickness is preferably 0.5 to 2 μm. Although this insulating film may be provided on either the silicon substrate or the silicon plate before bonding, it is preferable to provide it on the former in order to completely seal the pressure sensor. It is also desirable to mirror polish the surface on which this insulating film is to be provided and the surface to be bonded to it. The silicon substrate and the silicon plate are preferably bonded to each other through the second insulating film by electrostatically adhering them together under heating, and the heating temperature at this time is 350 to 400'C.
For electrostatic adsorption, it is preferable to apply a DC voltage of about 400 to soov between the two. The bonding strength resulting from this is sufficiently high that if the silicon substrate and silicon plate are forcibly removed after bonding, the bond will not break at the bonded surface, but breakage will occur within the silicon. The strain cage to be provided on the surface of the prepared wafer on the silicon plate side is easiest to create by diffusion and is desirable in terms of obtaining a high cage factor, and the crystal plane of the silicon plate is selected so as to be suitable for this purpose. It is desirable that Plasma etching from the silicon substrate side surface of the wafer is preferably performed under anisotropic etching conditions in order to reduce the required chip area by engraving the recesses with side profiles that are approximately perpendicular to the surface. Under these conditions, the digging depth tends to be uneven, but by over-etching, the digging can be stopped within the insulating film. [Operation] The electrolytic etching method described above is advantageous in stopping the digging of the recess at the pn junction surface and making the thickness of the pressure-receiving diaphragm uniform, but it has the disadvantage of slow etching speed.In contrast, the plasma etching method The problem with conventional methods is that although the etching speed is fast, it is not very advantageous for digging recesses to a uniform depth, and each method has its advantages and disadvantages. The present invention focuses on the point that if an insulating film is formed inside the wafer in advance, the digging in four places by plasma etching can be stopped at the surface of this insulating film, similar to electrolytic etching. By adopting the structure described in the previous section for the manufacturing method of a semiconductor pressure sensor, it is possible to combine the advantages of electrolytic etching in which the thickness of the pressure-receiving diaphragm can be controlled with high precision and the advantages of plasma etching in which the etching speed is high. , most of the drawbacks of both methods were eliminated, and the problems were solved, making it possible to mass-produce highly sensitive and well-equipped semiconductor pressure sensors in a practical process. [Example] Hereinafter, an example of the method for manufacturing a semiconductor pressure sensor according to the present invention will be explained for each main process with reference to FIG. FIG. 1(a) shows a silicon substrate 1 and a silicon plate 2 that constitute a wafer 1G shown in FIG. 1(C) for fabricating a large number of small semiconductor pressure sensors. As can be seen from the semiconductor pressure sensor 20 in the fully-functioning state in FIG. 6 (6), silicon-based
is for the part that digs into the recess 22 on the back side of the pressure receiving diaphragm 2l, and since the support wall 23 around the recess 22 serves to support the pressure receiving diaphragm 21, it is necessary to match the coefficient of thermal expansion, but it is a mechanical part so to speak. Therefore, it can be constructed with any silicon material other than single crystal silicon. Its thickness is recess 22
It is selected according to the depth required for
It is assumed to be 0.4. The silicon plate 2 is for the pressure-receiving diaphragm 2l, so it is desirable to use single crystal silicon with high elasticity.The final required thickness is several tens of thousands, but if it is too thin, it will be inconvenient to handle when it is a single unit, so it is usually not used. 200
It is said to have a thickness of ~300.4 mm. In this example, since the strain cage incorporated in the pressure receiving diaphragm is of a diffusion type, it is assumed that n-type single crystal silicon having a (110) plane passing through the silicon [2] is used. As a preparatory step for bonding these silicon substrates 1 and 2 through an insulating film in the single state shown in FIG. 1(a), in this example, mirror polishing is applied to one side of the silicon substrate 1. On the polished surface 1a, a silicon oxide film is applied as an anti-green film 3, and one side of the silicon plate 2 is mirror polished and placed as a polished surface 2a. The insulating film 3 may be a normal thermal oxide film or a steam oxide film, and its thickness is preferably 0.5 to 2-2. Incidentally, at the same time as this insulating film 3 is deposited, the lower surface of the silicon Go plate 1 is covered with the same oxide film 4. In the next IVA (b) bonding process, silicon substrate 1 and silicon plate 2 are stacked and heated to 350 to 400 degrees Celsius, and a DC voltage E of 400 to 400 volts is applied to create a dense electrostatic charge between them. By adsorbing them, they are joined together and made into one body. Note that this bonding is also possible by ordinary high-temperature heating under pressure, but when a very thin insulating film is interposed on the bonding surface as in the present invention, this can be used to bond the silicon substrate 1.
By generating a strong electrostatic adsorption force between the silicon plate 2 and the silicon plate 2, it is possible to bond at low temperatures, reducing the residual thermal distortion in the silicon plate 2 and reducing the deflection when pressure is applied to the pressure receiving diaphragm 21. can be kept constant and the variation in detection sensitivity can be reduced. Additionally, as mentioned above, it is possible to form a bond stronger than that of silicon. Subsequently, FIG. 1(C) shows a finishing process for preparing a wafer 10, in which the surface 2b of the silicon plate 2 is ground and polished to accurately adjust its thickness to a desired value, and in this embodiment, a strain cage is formed by diffusion. Finish it to a mirror finish so that you can create it. In the method of the present invention, the thickness of the pressure-receiving diaphragm 2l can be substantially determined by the finished thickness of the silicon plate 2, and its value is of course selected depending on the pressure to be detected, but is usually about several dozen. FIG. 1(B) shows the process of assembling the strain cage 6, and as shown in the partially enlarged view on the right side of the figure, in this embodiment, a normal process oxidation Wlt5 is used as a mask from the surface of the n-type silicon plate 2. The shaped layer 6 is diffused to form a strain cage. This strain cage 6 is usually provided in four pieces, and is bridge-connected by a connection M7 made of aluminum or the like that makes conductive contact with both ends of the strain cage 6 through a window formed in the process oxide film 5. The top of the bonding film 7 is covered with a protection layer 118 made of silicon nitride or the like as usual. 1st
Figures (e) and (f) show the drilling process of the recess 22 by plasma etching, with Figure 1 (e) showing the process in progress and Figure 1 (f) showing the completed state. For this plasma etching, high-frequency plasma is used as usual, and the reactive gas is, for example, SP- mixed with 10 to 30% oxygen, and the etching rate for the silicon base It and the green film 3 is set to 2. The difference is about an order of magnitude. Furthermore, in order to dig the recess 22 into a shape having side surfaces 22a with almost no slope as shown in the figure, it is desirable to select gas pressure, high frequency power, etc. to provide anisotropic etching conditions. During the plasma etching, a recess 22 is dug through the window using a mask 9 made of Al ξ or a copper film attached to the back surface of the silicon substrate 1 of the wafer 1G. By making the etching anisotropic, the side surface 22a of the recess tends to be slightly pot-shaped, but as shown in the figure, it has a shape that is generally not inclined, and the side surface 22a of the recess has a tendency to become slightly pot-shaped. The so-called etch amount is about A. However, with this anisotropic etching, it is difficult to avoid slight variations in the digging depth, and as shown in FIG.
In other recesses, the etching residue 1b tends to appear on the silicon substrate due to insufficient digging. FIG. 1(f) shows the completed state of digging after over-etching to eliminate all of the remaining portion 1b. In this way, in the method of the present invention, even if the depth of excavation caused by plasma etching is considerably uneven, over-etching is always applied and the excavation is stopped within the green-free film 3, so that all the recesses 22 can be completely etched. The depth of digging can be made the same. This stopping of digging is of course due to the difference in etching speed between the silicon-based Fil and the insulating film 3 by more than two orders of magnitude, and conversely, in the method of the present invention, digging stops within the insulating film during over-etching. Select the thickness of the insulating film so that the As mentioned above, the depth of the recess 22 is usually less than 500 mm, and the irregularity in the depth of excavation is less than 50 tsa of lO% even under anisotropic etching conditions. ! If the etching rate of G3 is 1/100 that of silicon, the thickness should be 0.54 or more. Furthermore, if the insulating film 3 has this thickness, a sufficient voltage can be applied between the silicon substrate 1 and the silicon temporary 2 in the process shown in FIG. .. However, in practice, it is desirable to allow a slight margin for the thickness of the insulating film 3, and based on experience, in the present invention, it is appropriate to set the insulating film thickness to 0.5 to 2 m as described above. be. The wafer 1 in which the recesses 22 have been dug in this way
0 is isolated into the semiconductor pressure sensor 20 in the guising process shown in FIG. 1(6) after the mask 9 is removed. The semiconductor pressure sensor 20 manufactured as described above is a small one having, for example, a 3 square thin chimney with a 2 square diameter recess 22 drilled therein, and the lower surface of the support wall 23 is used as the mounting surface. The pressure-receiving diaphragm 2l is used with the detected pressure and reference pressure applied to the upper and lower surfaces of the pressure-receiving diaphragm 2l, respectively, and the detection output is taken out from a bridge connection circuit of a plurality of strain cages 6 built into the pressure-receiving diaphragm 2l. In this semiconductor pressure sensor, since the thickness of the pressure receiving diaphragm 2l is determined by the thickness of the silicon plate 2 in the wafer 10, slight irregularities in the thickness of the insulation 11R3 may occur due to over-etching when digging the recess 22. The thickness of the pressure-receiving diaphragm can also be controlled with high accuracy of ±2 to 3-3. Furthermore, in this embodiment, as mentioned above, the silicon go temporary 1 and the silicon plate 2 are bonded at a relatively low temperature, so there is little residual thermal strain within the pressure receiving diaphragm 2l, and therefore the bridge detection output of the strain cage 6 is It has good linearity with respect to detected pressure, and the variation in pressure detection sensitivity level can be controlled to be small. Furthermore, in this embodiment, since the insulating film 3 is a thermal oxide film or the like on the silicon substrate 1, the airtightness of the interface between it and the supporting wall 23 is very high, and the pressure sensor can be operated without fear of the detected pressure leaking to the reference pressure side. The detection sensitivity can be maintained stably during long-term use. Further, by employing anisotropic plasma etching in this embodiment, the recess 22 can be dug with an almost ideal side shape without any inclination, and the chip size of the pressure sensor can be reduced to the minimum. It should be noted that the cross-sectional shape of the semiconductor pressure sensor 20 shown in the figure is approximately twice as wide in the vertical direction as in the horizontal direction for convenience of illustration. The present invention is not limited to the embodiments described above, but can be implemented in various ways. For example, the type of insulating film. The target to which the insulating film is attached before bonding. Bonding method of silicon substrate and silicon plate, plasma etching conditions. The types of strain cages, etc. are best described in the examples, but they are merely examples, and all or part of the above-mentioned effects can be obtained by making appropriate modifications as necessary. [Effects of the Invention] As explained above, in the present invention, a silicon substrate and a silicon plate are bonded to each other between a thin insulating film deposited on one polished surface and the other polished surface, and then the silicon plate is bonded. First, a wafer for fabricating a semiconductor pressure sensor is prepared by polishing it to a predetermined thickness.A strain cage is fabricated on the silicon plate side surface of this wafer, and this strain cage is fabricated from the silicon substrate side surface of the wafer. By using a plasma etching method, a recess is dug in the area corresponding to the area where the wafer is inserted until it reaches the wafer height, and the silicon plate corresponding to the recess is used as a pressure receiving diaphragm that receives the pressure to be detected. For all semiconductor pressure sensors manufactured, the digging of the recess is always stopped within the insulating film.
By aligning the pressure-receiving diaphragm to the thickness of the silicon plate in the wafer within an error of ±2 to 31, it is possible to mass-produce semiconductor pressure sensors with much more constant detection sensitivity than conventional methods. moreover,
The following effects can be achieved by the present invention and its advantageous embodiments. (6) Plasma etching has a fast etching speed, and deep recesses can be dug in a short time in a single process, so semiconductor pressure sensors of any design can be mass-produced at low production costs. (b) By preparing the wafer using a low-temperature bonding method using electrostatic adsorption, residual thermal distortion within the pressure receiving diaphragm can be reduced, the pressure sensitivity level of the semiconductor pressure sensor can be made uniform, and the bridge detection output characteristic can be straightened. You can improve your sexuality. (C) When using a diffusion type strain cage, by using single-crystal silicon with the most suitable crystal plane for the silicon plate for the pressure-receiving diaphragm, it is possible to create a strain cage with a high cage factor and therefore high detection sensitivity. (b) By digging the recess using anisotropic plasma etching, the recess can be made into an ideal shape and the semiconductor pressure sensor can be made smaller. (e) By providing an insulating film on the silicon substrate side before bonding, a pressure sensor with very good sealing performance and highly reliable detection characteristics can be provided.
第1図は本発明による半導体圧力センサの製造方法の最
良実施例を主な工程ごとの状態で示す断面図である.図
において、FIG. 1 is a cross-sectional view showing each main process of the best embodiment of the method for manufacturing a semiconductor pressure sensor according to the present invention. In the figure,
Claims (1)
薄い絶縁膜と他方の研磨面との間で相互に接合した上で
シリコン板を所定の厚みに研磨してウェハを調製する工
程と、ウェハのソリコン板側表面に歪ケージを作り込む
工程と、この歪ケージが作り込まれた個所に対応する範
囲のウェハのシリコン基板側表面から凹所をプラズマエ
ッチング法により絶縁膜に達するまで堀り込む工程とを
含み、この凹所に対応するシリコン板の部分を被検出圧
力を受ける受圧ダイアフラムとしたことを特徴とする半
導体圧力センサの製造方法。A step of preparing a wafer by bonding a silicon substrate and a silicon plate to each other between a thin insulating film deposited on one polished surface and the other polished surface, and then polishing the silicon plate to a predetermined thickness; A process of creating a strain cage on the surface of the wafer on the silicon plate side, and digging a recess from the silicon substrate side surface of the wafer in the area corresponding to the area where the strain cage is created until it reaches the insulating film using plasma etching method. 1. A method for manufacturing a semiconductor pressure sensor, characterized in that the portion of the silicon plate corresponding to the recess is used as a pressure receiving diaphragm that receives the pressure to be detected.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16294189A JPH0329372A (en) | 1989-06-26 | 1989-06-26 | Manufacturing method of semiconductor pressure sensor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16294189A JPH0329372A (en) | 1989-06-26 | 1989-06-26 | Manufacturing method of semiconductor pressure sensor |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0329372A true JPH0329372A (en) | 1991-02-07 |
Family
ID=15764162
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP16294189A Pending JPH0329372A (en) | 1989-06-26 | 1989-06-26 | Manufacturing method of semiconductor pressure sensor |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0329372A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104071744A (en) * | 2014-06-24 | 2014-10-01 | 上海天英微系统科技有限公司 | Pressure sensor and making method thereof |
-
1989
- 1989-06-26 JP JP16294189A patent/JPH0329372A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104071744A (en) * | 2014-06-24 | 2014-10-01 | 上海天英微系统科技有限公司 | Pressure sensor and making method thereof |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US6445053B1 (en) | Micro-machined absolute pressure sensor | |
JP3506932B2 (en) | Semiconductor pressure sensor and method of manufacturing the same | |
JPH0453267B2 (en) | ||
US10173887B2 (en) | Epi-poly etch stop for out of plane spacer defined electrode | |
JPH0799239A (en) | Semiconductor device and manufacture thereof | |
JP2010199133A (en) | Method of manufacturing mems, and mems | |
CN1243576A (en) | Micromechanical semiconductor device and method for production thereof | |
JP4168497B2 (en) | Manufacturing method of semiconductor dynamic quantity sensor | |
JPS60138434A (en) | Manufacturing method of semiconductor capacitive pressure sensor | |
JPH0329372A (en) | Manufacturing method of semiconductor pressure sensor | |
JP2010194622A (en) | Manufacturing method of mems | |
JPH02218172A (en) | Manufacture of semiconductor acceleration sensor | |
JPH0230188A (en) | Manufacture of semiconductor pressure sensor | |
JP3744218B2 (en) | Manufacturing method of semiconductor pressure sensor | |
JPH08248061A (en) | Acceleration sensor and manufacture thereof | |
JPH11186566A (en) | Manufacture of fine device | |
JP2000055758A (en) | Manufacture of semiconductor pressure sensor | |
JPH07113708A (en) | Manufacture of semiconductor absolute pressure sensor | |
JPH049770A (en) | Semiconductor strain-sensitive sensor and manufacture thereof | |
JPH03180070A (en) | Semiconductor device and manufacture thereof | |
JPH0476959A (en) | Manufacture of semiconductor pressure sensor | |
JPH02100372A (en) | Semiconductor pressure sensor | |
JPH1140820A (en) | Manufacture of semiconductor dynamic sensor | |
JPH02181472A (en) | Manufacturing method of semiconductor pressure sensor | |
JPH0636980A (en) | Manufacture of thin film |