JPH02143604A - Ultrahigh frequency amplifier - Google Patents
Ultrahigh frequency amplifierInfo
- Publication number
- JPH02143604A JPH02143604A JP29611688A JP29611688A JPH02143604A JP H02143604 A JPH02143604 A JP H02143604A JP 29611688 A JP29611688 A JP 29611688A JP 29611688 A JP29611688 A JP 29611688A JP H02143604 A JPH02143604 A JP H02143604A
- Authority
- JP
- Japan
- Prior art keywords
- source
- inductance
- terminal
- wire
- reduced
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims abstract description 22
- 230000002542 deteriorative effect Effects 0.000 abstract description 4
- 238000004519 manufacturing process Methods 0.000 abstract description 2
- 229910001218 Gallium arsenide Inorganic materials 0.000 abstract 1
- 238000010586 diagram Methods 0.000 description 6
- 239000002184 metal Substances 0.000 description 5
- 239000000758 substrate Substances 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000006698 induction Effects 0.000 description 1
- 229920006395 saturated elastomer Polymers 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/30107—Inductance
Landscapes
- Microwave Amplifiers (AREA)
Abstract
Description
【発明の詳細な説明】
し産業上の利用分野］
本発明は、半導体を使用した超高周波増幅器に関し、特
に混変調歪特性を改善できるようにした超高周波増幅器
に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an ultra-high frequency amplifier using a semiconductor, and more particularly to an ultra-high frequency amplifier that can improve cross-modulation distortion characteristics.
［従来の技術］
従来、半導体を使用した超高周波増幅器には、Ｇ、Ａ、
ＩＩＩＥＳ ＦＥＴを使用したソース接地型増幅器、
シリコンポーラトランジスタを使用したエミッタ接地型
増幅器あるいはベース接地型増幅器等が広く使用されて
いる。[Prior art] Conventionally, ultrahigh frequency amplifiers using semiconductors include G, A,
Source-grounded amplifier using IIIS FET,
Common emitter type amplifiers or common base type amplifiers using silicon polar transistors are widely used.
上述した超高周波増幅器の共通端子、すなわちソース接
地型増幅器におけるソース電極、あるいはエミッタ接地
型増幅器におけるエミッタ電極は、高周波的に最短距離
をもって接地されるように構成してあった。このような
構成は、共通端子に抵抗成分あるいはインダクタンス成
分が装荷されると見かけ上の相互コンダクタンスを減少
させ、これによって増幅器の利得か減少したり、高周波
特性を劣化させるためであった。The common terminal of the above-mentioned ultra-high frequency amplifier, that is, the source electrode in a common source type amplifier or the emitter electrode in a common emitter type amplifier, is configured to be grounded at the shortest distance in terms of high frequency. The reason for this configuration is that when a resistance component or an inductance component is loaded onto the common terminal, the apparent mutual conductance is reduced, thereby reducing the gain of the amplifier and deteriorating the high frequency characteristics.
ｔ５３図はソース接地ボンディングワイヤを最短距離を
もって接地した超高周波増幅器に要部拡大模式図である
。Figure t53 is an enlarged schematic diagram of the essential parts of an ultra-high frequency amplifier in which the source grounding bonding wire is grounded at the shortest distance.
同図において、ｌはハイブリッドＩＣの金属ケース、２
は金属ケースｌの上面に設けた半導体チップ、３は半導
体チップ２の近傍に設けた入力用基板、４は同じく出力
用基板である。３ａは入力用基板３に設けた入カバター
ンであり、半導体チップ２の入力端子側に入力側ボンデ
ィングワイヤ５によって接続しである。４ａは出力用基
板４に設けた出カバターンてあり、半導体チップ２の出
力端子側に出力側ボンディングワイヤ６によって接続し
である。In the figure, l is the metal case of the hybrid IC, 2
3 is a semiconductor chip provided on the upper surface of the metal case 1, 3 is an input board provided near the semiconductor chip 2, and 4 is an output board. Reference numeral 3a denotes an input cover turn provided on the input substrate 3, which is connected to the input terminal side of the semiconductor chip 2 by an input side bonding wire 5. Reference numeral 4a denotes an output cover turn provided on the output substrate 4, which is connected to the output terminal side of the semiconductor chip 2 by an output side bonding wire 6.
ｌＯは半導体チップ２に隣接して設けた一対の金属片で
あり、半導体チップ２のソース側にそれぞれソース接地
ボンディングワイヤ７によって接続しである。ソース接
地ボンディングワイヤ７は高周波特性が得られるように
最短距離をもって一対の金属片１０に接地されており、
それぞれの長さは０．５■鳳以下に形成されている。し
たがって、ソース接地ボンディングワイヤ７のインダク
タンスは、０．３〜０．５ｎＨ以下となっている。IO is a pair of metal pieces provided adjacent to the semiconductor chip 2, and connected to the source side of the semiconductor chip 2 by source ground bonding wires 7, respectively. The source grounding bonding wire 7 is grounded to a pair of metal pieces 10 at the shortest distance to obtain high frequency characteristics.
Each length is less than 0.5 mm. Therefore, the inductance of the source-grounded bonding wire 7 is 0.3 to 0.5 nH or less.
また、二本並列接続にした場合のインダクタンスは０．
１５〜０．２５ｎＨ以下となっている。Also, when two wires are connected in parallel, the inductance is 0.
It is 15 to 0.25 nH or less.
［解決すべき課題］
上述したように従来の超高周波増幅器は高周波特性を得
るために共通端子の抵抗成分、インダクタンス成分を減
少させていた。しかしながら、高周波特性を重視するあ
まりに抵抗成分、インダクタンス成分の減少を行なって
いくと増幅素子の相互コンダクタンスのばらつきを発生
し、このばらつきか増幅器の特性に影響を与え、製品の
歩留りを悪くするという問題かあった。また、＊導体素
子の有している非直線性も、同様に共通端子の抵抗成分
、インダクタンス成分か小さい場合には増幅器の特性に
影響を及ぼすため、混変調歪特性を悪化させるという問
題もあった。[Problems to be Solved] As described above, conventional ultra-high frequency amplifiers reduce the resistance component and inductance component of the common terminal in order to obtain high frequency characteristics. However, if too much emphasis is placed on high-frequency characteristics and the resistance and inductance components are reduced, variations in the mutual conductance of the amplifier elements will occur, and this variation will affect the characteristics of the amplifier, resulting in a problem of poor product yield. There was. Additionally, the nonlinearity of *conductor elements also affects the characteristics of the amplifier if the resistance and inductance components of the common terminal are small, so there is also the problem of worsening the cross-modulation distortion characteristics. Ta.
本発明は上述した問題点にかんがみてなされたもので、
製品の歩留りを悪化させることなく良好な混変調歪特性
を得られるようにした超高周波増幅器の提供を目的とす
る。The present invention has been made in view of the above-mentioned problems.
The purpose of the present invention is to provide an ultra-high frequency amplifier that can obtain good intermodulation distortion characteristics without deteriorating product yield.
［課題の解決手段］
上記目的を達成するために本発明の超高周波増幅器は半
導体を使用した超高周波増幅器であって、入力信号と出
力信号が共通して通過する半導体素子の端子に、インダ
クタンスを装荷した構成としてあり、好ましくは０．３
ｎｌ＋以上のインダクタンスを装荷している。[Means for Solving the Problems] In order to achieve the above object, the ultra-high frequency amplifier of the present invention is an ultra-high frequency amplifier using a semiconductor, and includes an inductance at a terminal of a semiconductor element through which an input signal and an output signal commonly pass. in a loaded configuration, preferably 0.3
Loaded with an inductance of nl+ or more.
さらに好ましくは、上記半導体としてバイポーラ型トラ
ンジスタあるいは静電誘導型トランジスタ等の三個以上
の端子を有する半導体素子を用いている。More preferably, a semiconductor element having three or more terminals, such as a bipolar transistor or a static induction transistor, is used as the semiconductor.
［実施例］
以下、本発明の一実施例について図面を参照して説明す
る。[Example] Hereinafter, an example of the present invention will be described with reference to the drawings.
第１図は本実施例における超高周波増幅器の回路図であ
る。なお、先に示した第３図と同一の部分については同
一の符号を付してあり、詳細な説明は省略する。FIG. 1 is a circuit diagram of an ultra-high frequency amplifier in this embodiment. Note that the same parts as in FIG. 3 shown earlier are given the same reference numerals, and detailed explanations will be omitted.
同図において、半導体チップ２のソース側はソース接地
ボンディングワイヤ８によって設置されている。In the figure, the source side of the semiconductor chip 2 is installed by a source grounding bonding wire 8.
第２（２！は半導体チップにインダクタンスを装荷した
場合の要部拡大模式図てあり、半導体としてＧ、Ａ、
ＭＥＳ ＦＥＴを使用し、ハイブリッドＩＣを構成した
場合を示している。The second (2!) is an enlarged schematic diagram of the main part when an inductance is loaded on a semiconductor chip.
This shows a case where a hybrid IC is configured using MES FETs.
同図において、ソース接地ボンディングワイヤ８は通常
より長く形成してあり、半導体チップ２のソース側に装
荷するインダクタンスとして一端側を半導体チップ２の
ソース側に接続し、他端側を金属ケース１に接続しであ
る。In the figure, the source grounding bonding wire 8 is formed longer than usual, and one end is connected to the source side of the semiconductor chip 2 as an inductance loaded on the source side of the semiconductor chip 2, and the other end is connected to the metal case 1. It is connected.
上述した構成とすることにより、ソース接地ボンデイン
クワイヤ８の長さをｌｌｌ１１〜２１１麿として接地す
ることか製造上可能となる。したがって、ソースインダ
クタンスは０．３〜１ｎｌｌの値を得ることかできる。With the above-described configuration, it is possible to ground the source grounding bond wire 8 with a length of 111 to 211 in terms of manufacturing. Therefore, the source inductance can have a value of 0.3 to 1 nll.
このようにして得られたソースインダクタンスを用いる
と、小信号利得は減少するか、飽和出力は減少しないた
め、入出力特性における直線性が改良され混変調歪は減
少する。By using the source inductance obtained in this manner, the small signal gain is reduced, but the saturated output is not reduced, so linearity in input/output characteristics is improved and cross-modulation distortion is reduced.
［発明の効果］
以上説明したように１本発明の超高周波増幅器は、贋産
レベルを考慮した簡単な構成で製品の歩留りを悪化させ
ることなく、良好な混変調歪特性を得ることかてきる。[Effects of the Invention] As explained above, the ultra-high frequency amplifier of the present invention has a simple configuration that takes into account the level of counterfeiting, and can obtain good intermodulation distortion characteristics without deteriorating the product yield. .
第１Ｉ２１は本発明実施例における超高周波増幅器の回
路図、第２図は半導体チップにインダクタンスを装荷し
た場合の要部拡大模式図、第３図は従来の超高周波増幅
器の要部拡大模式図である。
ｌ゛金属ケース ２：半導体チップ８゛ソース接地
ボンデインクワイヤ1I21 is a circuit diagram of an ultra-high frequency amplifier according to an embodiment of the present invention, FIG. 2 is an enlarged schematic diagram of the main parts when an inductance is loaded on a semiconductor chip, and FIG. 3 is an enlarged schematic diagram of the main parts of a conventional ultra-high frequency amplifier. be. l゛Metal case 2: Semiconductor chip 8゛Source grounded bond wire
Claims (1)
出力信号が共通して通過する半導体素子の端子に、イン
ダクタンスを装荷したことを特徴とする超高周波増幅器
。An ultra-high frequency amplifier using a semiconductor, characterized in that an inductance is loaded at a terminal of a semiconductor element through which an input signal and an output signal commonly pass.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP29611688A JPH02143604A (en) | 1988-11-25 | 1988-11-25 | Ultrahigh frequency amplifier |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP29611688A JPH02143604A (en) | 1988-11-25 | 1988-11-25 | Ultrahigh frequency amplifier |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH02143604A true JPH02143604A (en) | 1990-06-01 |
Family
ID=17829345
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP29611688A Pending JPH02143604A (en) | 1988-11-25 | 1988-11-25 | Ultrahigh frequency amplifier |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH02143604A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008085929A (en) * | 2006-09-29 | 2008-04-10 | Sony Corp | Power amplification apparatus |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5892243A (en) * | 1981-11-27 | 1983-06-01 | Mitsubishi Electric Corp | Package for fet |
| JPS59143406A (en) * | 1983-01-28 | 1984-08-17 | マイクロウエイブ．セミコンダクタ−．コ−ポレ−シヨン | Hybrid microwave subsystem |
| JPS61167209A (en) * | 1985-01-14 | 1986-07-28 | テキサス インスツルメンツ インコーポレイテツド | Low noise amplifier |
-
1988
- 1988-11-25 JP JP29611688A patent/JPH02143604A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5892243A (en) * | 1981-11-27 | 1983-06-01 | Mitsubishi Electric Corp | Package for fet |
| JPS59143406A (en) * | 1983-01-28 | 1984-08-17 | マイクロウエイブ．セミコンダクタ−．コ−ポレ−シヨン | Hybrid microwave subsystem |
| JPS61167209A (en) * | 1985-01-14 | 1986-07-28 | テキサス インスツルメンツ インコーポレイテツド | Low noise amplifier |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008085929A (en) * | 2006-09-29 | 2008-04-10 | Sony Corp | Power amplification apparatus |
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