JPH07273432A - Manufacture of printed wiring board - Google Patents
Manufacture of printed wiring boardInfo
- Publication number
- JPH07273432A JPH07273432A JP8778494A JP8778494A JPH07273432A JP H07273432 A JPH07273432 A JP H07273432A JP 8778494 A JP8778494 A JP 8778494A JP 8778494 A JP8778494 A JP 8778494A JP H07273432 A JPH07273432 A JP H07273432A
- Authority
- JP
- Japan
- Prior art keywords
- printed wiring
- resist
- dimensional
- conductive layer
- wiring board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0284—Details of three-dimensional rigid printed circuit boards
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0073—Masks not provided for in groups H05K3/02 - H05K3/46, e.g. for photomechanical production of patterned surfaces
- H05K3/0082—Masks not provided for in groups H05K3/02 - H05K3/46, e.g. for photomechanical production of patterned surfaces characterised by the exposure method of radiation-sensitive masks
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/108—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by semi-additive methods; masks therefor
Landscapes
- Structure Of Printed Boards (AREA)
- Manufacturing Of Printed Circuit Boards (AREA)
- Manufacturing Of Printed Wiring (AREA)
Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明はプリント配線板の製造法
に関し、特に、立体的なプリント配線板の製造法に関す
るものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a printed wiring board, and more particularly to a method for manufacturing a three-dimensional printed wiring board.
【0002】[0002]
【従来の技術】従来のプリント配線板における立体成形
品等を基板本体とするプリント配線板の製造法として
は、2−ショット法、転写方式、およびエッチング方式
の3方法を挙げることができ、エッチング方式において
はパッド印刷によるエッチングレジストの形成とフォト
レジストを立体的マスクを使用して露光、現像してエッ
チングレジストを形成する方法が実施されている。2. Description of the Related Art As a conventional method for producing a printed wiring board using a three-dimensional molded article or the like in a printed wiring board as a substrate body, there are three methods including a 2-shot method, a transfer method and an etching method. In the method, a method of forming an etching resist by pad printing and a method of exposing and developing a photoresist using a three-dimensional mask to form an etching resist are implemented.
【0003】しかして、前記2−ショット法による製造
法は、立体的な基板本体のうち、回路を形成する部分
(プラスチック材等)にパラジウム触媒を均一に分散さ
せてモールディングを行うとともにこの一段目のモール
ドにて形成した部分を2段目のモールド型に固定する際
に、前記回路を形成する部分のみを露出させつつモール
ドする。(但し、2段目のモールドの際に使用する樹脂
には触媒を使用しない)。However, in the manufacturing method by the 2-shot method, the palladium catalyst is uniformly dispersed in the portion (plastic material or the like) forming the circuit in the three-dimensional substrate body, and molding is performed at the same time. When fixing the portion formed by the molding to the second stage mold, molding is performed while exposing only the portion where the circuit is formed. (However, no catalyst is used in the resin used for the second molding).
【0004】かかるモールド成形品をクロム酸等にて粗
化する等の方法にて前処理を行った後、無電解銅メッキ
を行い、前記回路を形成する部分にプリント配線回路を
形成するものである。The molded product is subjected to pretreatment by a method such as roughening with chromic acid or the like, and then electroless copper plating is performed to form a printed wiring circuit in the portion where the circuit is formed. is there.
【0005】また、前記転写方式としては、転写紙を用
いる方式、すなわち、導電性の回路パターンを表面に形
成した転写フィルムを立体成形品を成形する樹脂成形用
金型内に予めセットし、成形時に前記転写フィルムの回
路パターンを成形品に転写することにより製造する方法
であり、これに換えて、金型内に回路パターンをメッキ
する方式、すなわち、射出成形用金型に回路パターンに
対応する溝を穿設するとともに溝以外の型面にローラー
印刷等の方法によってレジストを塗布した後、前記溝部
分のみに電解メッキにより金属層を電着し、かつ前記レ
ジストを剥離後、前記射出成形用金型による射出成形を
行うことにより、成形品に、前記金型の型面に電着した
金属層から成る回路パターンを転写することにより製造
する方法である。As the transfer method, a method using a transfer paper, that is, a transfer film having a conductive circuit pattern formed on its surface is set in advance in a resin molding die for molding a three-dimensional molded article and molded. Sometimes it is a method of manufacturing by transferring the circuit pattern of the transfer film to a molded product, and instead, a method of plating the circuit pattern in the mold, that is, corresponding to the circuit pattern in the injection mold. After forming a groove and applying a resist to the mold surface other than the groove by a method such as roller printing, a metal layer is electrodeposited only on the groove portion by electrolytic plating, and the resist is peeled off, followed by injection molding. In this method, a circuit pattern composed of a metal layer electrodeposited on the mold surface of the mold is transferred to a molded product by performing injection molding with a mold.
【0006】さらに、前記転写方式としては、成形品の
成形後に回路パターンを転写する方式、すなわち、回路
パターンを転写フィルムにスクリーン印刷するとともに
この転写フィルムの回路パターン上に接着剤を塗布した
後、成形品の転写部位に転写フィルムの回路パターンを
位置合わせしつつ当接させるとともに前記接着剤が硬化
するまで、加熱、加圧した後、前記転写フィルムを剥離
することにより、前記回路パターンを成形品の転写部位
に転写して製造する方法が実施されている。Further, as the transfer system, a circuit pattern is transferred after molding of a molded product, that is, after the circuit pattern is screen-printed on a transfer film and an adhesive is applied on the circuit pattern of the transfer film, The circuit pattern of the transfer film is aligned and brought into contact with the transfer site of the molded product, and the circuit pattern is formed by peeling the transfer film after heating and pressing until the adhesive is cured. The method of manufacturing by transferring to a transcription site of is carried out.
【0007】さらに、前記したエッチング方式の場合に
は、立体成形品の表面を適度な表面粗さに処理した後、
無電解および電解メッキ等により、全面に回路導体用の
金属層に被着するとともに所望の回路パターンに対応す
るエッチングレジストを形成し、かつ前記金属層をエッ
チングすることにより立体成形品の表面に所望の回路パ
ターンを形成する製造法である。Further, in the case of the above-mentioned etching method, after the surface of the three-dimensional molded product is treated to have an appropriate surface roughness,
A metal layer for a circuit conductor is deposited on the entire surface by electroless and electrolytic plating, an etching resist corresponding to a desired circuit pattern is formed, and the metal layer is etched to obtain a desired surface of the three-dimensional molded article. Is a manufacturing method for forming a circuit pattern.
【0008】そして、前記製造法中、エッチングレジス
トの形成する方法としては、金属層の表面にパッド印刷
によりレジストインクを転写することにより、エッチン
グレジストを形成する方法と、前記金属層の表面に液状
のフォトレジストをDIPやスプレー等により全面塗布
後、立体的なマスクを介して密着露光するとともに現像
することによりエッチングレジストを形成する方法が採
用されている。As a method of forming an etching resist in the manufacturing method, a method of forming an etching resist by transferring a resist ink onto the surface of a metal layer by pad printing and a method of forming a liquid on the surface of the metal layer are used. A method of forming an etching resist by applying the photoresist on the entire surface by DIP, spraying or the like, and then exposing the same by contact through a three-dimensional mask and developing it.
【0009】[0009]
【発明が解決しようとする課題】さて、前記従来の技術
の項にて説明したところの2−ショット法による立体的
な成形品等の基板本体に対するプリント配線回路の形成
法による場合には、1段目のモールディングに使用する
材料、特にパラジウム触媒とのなじみ性についての材料
選定に制約を受けるとともに1段目と2段目に使用する
材料とのサーマルマッチングにも制約を受ける等、成形
品の成形樹脂に制約を受ける欠点を有することに加え
て、モールディングに使用する金型が高価となり、経済
性に乏しい欠点を有し、さらには、金型製作上から線幅
0.2mm、間隔0.2mm、略限界ピッチ0.4mmおよび
回路長さにも限界を有するもので、回路設計上の制約を
受ける欠点を有する。In the case of the method of forming a printed wiring circuit on a substrate body such as a three-dimensional molded article by the 2-shot method as described in the section of the above-mentioned prior art, it is 1 There are restrictions on the material used for the molding of the first step, especially the material selection for the compatibility with the palladium catalyst, and also the thermal matching with the material used for the first and second steps. In addition to the drawback of being restricted by the molding resin, the mold used for molding becomes expensive and has the disadvantage of being economically disadvantageous. Furthermore, from the viewpoint of mold manufacture, the line width is 0.2 mm and the interval is 0. It has a limit of 2 mm, a substantially limit pitch of 0.4 mm and a circuit length, and has a drawback of being restricted by the circuit design.
【0010】また、転写方式の転写紙を用いる方法の場
合には、複雑な形状の成形品には対応が困難であるとと
もに成形品の形状と回路パターンの位置精度を高精度に
することが困難である欠点を有するとともに、金型内に
回路パターンをメッキする方法の場合には、金型製作費
が嵩み、かつ回路パターンについても金型内に製作する
関係上、線幅、間隔(略両者とも0.2mm)に限度を有
するとともに金型に対して成形品の成形毎にメッキを施
す必要があり、量産性に乏しい欠点を有する。Further, in the case of the transfer method using transfer paper, it is difficult to deal with a molded product having a complicated shape, and it is difficult to make the shape of the molded product and the positional accuracy of the circuit pattern highly accurate. In addition, in the case of the method of plating the circuit pattern in the mold, the cost for manufacturing the mold is high, and the circuit pattern is also manufactured in the mold. Both of them have a limit of 0.2 mm), and it is necessary to plate the mold for each molding of the molded product, which has a drawback that mass productivity is poor.
【0011】そして、成形品の成形後に回路パターンを
転写する方法においては、複雑な成形品の形状に対応し
難い欠点に加えて、成形品に対して回路パターンが接着
剤によって密着された構成であって、ピール強度に難点
を有するものである。In addition, in the method of transferring the circuit pattern after molding the molded product, in addition to the drawback that it is difficult to cope with the complicated shape of the molded product, the circuit pattern is adhered to the molded product with an adhesive. Therefore, it has a problem in peel strength.
【0012】さらに、前記エッチング方式による製造法
の場合のエッチングレジストをパット印刷により形成す
る方法の場合には、複雑な成形品の形状に対応し得ない
難点に加えて、回路の線幅および間隔に限界を有すると
ともにエッチングレジストとして耐え得るレジスト厚の
確保に問題があり、不安定である欠点を有し、かつ、回
路パターンのうちのスルーホールの設計が出来ない欠点
を有する。また、フォトレジストによるエッチングレジ
ストの形成方法の場合には、液状のフォトレジストを立
体的な成形品の表面全体にピンホールでなく、均一に塗
布するのが難しい点に加えて、成形品の形状に対応した
立体的なフォトマスクを作るのが困難で、高価とならざ
るを得ず、さらには回路導体の細線パターン化に限度を
有する等の欠点を有するものである。Further, in the case of the method of forming the etching resist by the pad printing in the case of the manufacturing method by the above-mentioned etching method, in addition to the difficulty that it cannot cope with the complicated shape of the molded product, the line width and the interval of the circuit are However, there is a problem in that a resist thickness that can withstand as an etching resist is not secured, and there is a drawback that it is unstable, and there is a drawback that a through hole in a circuit pattern cannot be designed. In addition, in the case of the etching resist forming method using a photoresist, it is difficult to uniformly apply the liquid photoresist to the entire surface of the three-dimensional molded product instead of pinholes. It is difficult to make a three-dimensional photomask corresponding to the above, and it is inevitably expensive, and further, there are drawbacks such that there is a limit in forming a fine line pattern of a circuit conductor.
【0013】因て、本発明は前述してきた従来技術によ
る立体的な成形品等の基板本体に対するプリント配線板
の製造法における欠点に鑑みて開発されたもので、複雑
な成形品の形状に対応した高精度のプリント配線回路の
形成を安価に、しかも量産性を以て製造し得る立体的な
成形品等の基板本体に対するプリント配線板の製造法の
提供を目的とするものである。Therefore, the present invention was developed in view of the drawbacks in the method of manufacturing a printed wiring board for a substrate body such as a three-dimensional molded article according to the above-mentioned conventional technique, and can cope with a complicated molded article shape. It is an object of the present invention to provide a method for manufacturing a printed wiring board for a substrate body such as a three-dimensional molded product which can be manufactured with high productivity and at low cost by forming a highly accurate printed wiring circuit.
【0014】[0014]
【課題を解決するための手段】本発明者は、上記したよ
うな立体的な成形品を基板に用いたプリント配線板の製
造法における欠点を克服するために鋭意研究した結果、
立体的な基板の表面に導電層を形成し、該導電層上に電
着レジストを形成し、前記電着レジストを平行光線によ
り露光、現像後、露出した導電層上に電気メッキを施
し、電着レジストを剥離後、電気メッキされない導電層
をソフトエッチングすることにより、複雑な成形品の形
状に対応した高精度のプリント配線回路を安価に、しか
も量産性を以て製造し得ることを見出し本発明を完成す
るに至った。Means for Solving the Problems The inventors of the present invention have conducted extensive studies to overcome the drawbacks in the method for producing a printed wiring board using a three-dimensional molded article as a substrate as described above.
A conductive layer is formed on the surface of a three-dimensional substrate, an electrodeposition resist is formed on the conductive layer, the electrodeposition resist is exposed to parallel rays and developed, and then the exposed conductive layer is electroplated. After removing the deposition resist, by soft-etching the conductive layer that is not electroplated, it has been found that a highly accurate printed wiring circuit corresponding to the shape of a complicated molded product can be manufactured at low cost and with mass productivity It came to completion.
【0015】かくして、本発明に従えば、「(1)立体
的な基体の表面に無電解メッキにより導電層を形成する
工程、(2)誘導電層上に電着レジストを形成する工
程、(3)該電着レジストを平行光により露光する工
程、(4)露光後、電着レジストを現像する工程、
(5)現像後、露出した導電層パターン部分に電気メッ
キを施す工程、(6)電気メッキされない部分の導電層
上の電着レジストを剥離する工程、及び(7)電気メッ
キされない部分の導電層をソフトエッチングにより除去
する工程からなるプリント配線板の製造法。」が提供さ
れる。Thus, according to the present invention, "(1) a step of forming a conductive layer on the surface of a three-dimensional substrate by electroless plating, (2) a step of forming an electrodeposition resist on the induction electrode layer, ( 3) a step of exposing the electrodeposition resist by parallel light, (4) a step of developing the electrodeposition resist after the exposure,
(5) After development, a step of electroplating the exposed conductive layer pattern portion, (6) a step of peeling the electrodeposition resist on the conductive layer in the non-electroplated portion, and (7) a conductive layer in the non-electroplated portion. A method for manufacturing a printed wiring board, which comprises the step of removing by soft etching. Is provided.
【0016】[0016]
【作用】本発明は、電着レジストにより、基板本体の立
体形状に対応する均一かつ薄いレジストを得ることがで
きるとともに前記電着レジストの露光を平行光により行
うことにより立体的な基板本体の形状に対応する立体的
なマスクを不要とし、パターンの設計に幅をもたせるこ
とができ、立体的なプリント配線回路の高精度化と立体
形状の複雑さに充分な対応作用を有するものである。The present invention makes it possible to obtain a uniform and thin resist corresponding to the three-dimensional shape of the substrate body by the electrodeposition resist, and at the same time, perform the exposure of the electrodeposition resist by parallel light to obtain a three-dimensional shape of the substrate body. The three-dimensional mask corresponding to the above is not required, the pattern can be designed in a wide range, and the three-dimensional printed wiring circuit can have high precision and can sufficiently cope with the complexity of the three-dimensional shape.
【0017】[0017]
【実施例】以下本発明プリント配線板の製造法の実施例
を図面とともに具体的に説明する。Embodiments of the method for manufacturing a printed wiring board according to the present invention will be specifically described below with reference to the drawings.
【0018】図1は本発明のプリント配線板の製造法の
概略説明図である。FIG. 1 is a schematic explanatory view of a method for manufacturing a printed wiring board of the present invention.
【0019】まず、プリント配線板の立体的な基体とな
る所望の形状から成る立体成形品1を所要の樹脂材料
(例えば耐熱性のスーパーエンプラ等)にて射出成形す
る。First, a three-dimensional molded article 1 having a desired shape which serves as a three-dimensional substrate of a printed wiring board is injection-molded with a required resin material (for example, heat resistant super engineering plastic).
【0020】しかる後、立体成形品1の全表面、すなわ
ち、(1)に示すように立体成形品1の凹部2、スルー
ホール3及び凸部4、その他の平面部の全表面に必要な
前処理(有機溶剤およびクロム酸等による粗面化処理
等)を施すとともに無電解メッキ、スパタリング等にて
電着レジストが塗装可能な導電層5を均一に被着する。
尚、密着強度は、前記前処理により、充分に得られる。After that, the entire surface of the three-dimensional molded article 1, that is, the concave surface 2, the through hole 3 and the convex portion 4 of the three-dimensional molded article 1 as shown in (1), and all the other surfaces of the flat surface are necessary. Treatment (roughening treatment with an organic solvent and chromic acid, etc.) is performed, and the electroconductive layer 5 to which the electrodeposition resist is coatable is uniformly applied by electroless plating, sputtering, or the like.
The adhesion strength can be sufficiently obtained by the pretreatment.
【0021】さらに、(2)に示す如く、前記金属被膜
5の上側に電着(ED)レジスト6(図示の場合ネガ型
電着レジスト)を被着し、次いで(3)に示すように露
光部7aおよび未露光部7bを備える平面板から成るフ
ォトマスク7を前記立体成形品1の上下両側に配設し、
かつこの上下両側に配設したフォトマスク7を介して、
前記電着レジスト6を平行光の露光装置(不図示)によ
り露光する。Further, as shown in (2), an electrodeposition (ED) resist 6 (negative type electrodeposition resist in the figure) is applied on the upper side of the metal film 5, and then exposed as shown in (3). Photomasks 7 made of a flat plate having a portion 7a and an unexposed portion 7b are arranged on both upper and lower sides of the three-dimensional molded article 1,
Moreover, through the photomasks 7 arranged on the upper and lower sides,
The electrodeposition resist 6 is exposed by a parallel light exposure device (not shown).
【0022】しかして、前記フォトマスク7の露光部7
aおよび未露光部7bを立体成形品1のプリント配線回
路の回路パターンに対応したレジスト画像を得られるよ
うに配設して形成するとともにその露光部7aと未露光
部7bを立体成形品1の回路パターンに対応せしめて上
下両側に配設しつつセットすることにより、前記平行光
による露光工程にて電着レジスト6は露光部7aその対
応位置が露光されるとともに未露光部7bとの対応位置
は未露光となる。Thus, the exposure section 7 of the photomask 7
a and the unexposed part 7b are arranged and formed so that a resist image corresponding to the circuit pattern of the printed wiring circuit of the three-dimensional molded product 1 can be obtained, and the exposed part 7a and the unexposed part 7b of the three-dimensional molded product 1 are formed. By setting them while arranging them on the upper and lower sides corresponding to the circuit pattern, the electrodeposition resist 6 is exposed at the corresponding position of the exposed portion 7a and the corresponding position of the unexposed portion 7b in the exposure process by the parallel light. Is unexposed.
【0023】因て、(4)に示す如く、前記露光処理後
の電着レジスト6を現像することにより、未露光部分が
溶解除去されるとともに露光部分がレジスト画像となっ
て残存する。Therefore, as shown in (4), by developing the electrodeposited resist 6 after the exposure process, the unexposed portion is dissolved and removed, and the exposed portion remains as a resist image.
【0024】次いで、(5)に示すように露出した導電
層パターン部分を電気メッキすることにより、プリント
配線回路の導体に要求される導体厚を得られる金層被膜
8を均一に被着する。Next, as shown in (5), the exposed conductive layer pattern portion is electroplated to uniformly deposit the gold layer coating 8 which can obtain the conductor thickness required for the conductor of the printed wiring circuit.
【0025】次に、(6)に示すように電気メッキされ
ない部分の導電層上の電着被膜を剥離し、次いで(7)
に示すように電気メッキされない部分の導電層をソフト
エッチングすることにより、立体的なプリント配線板を
製造することができる。Next, as shown in (6), the electrodeposition coating on the conductive layer in the portion which is not electroplated is peeled off, and then (7).
By soft-etching the conductive layer in the portion that is not electroplated as shown in (3), a three-dimensional printed wiring board can be manufactured.
【0026】[0026]
【発明の効果】以上の説明から明らかな通り、本発明の
プリント配線板の製造法によれば、立体的な基体の表面
に導電層を形成するとともに前記導電層上に電着レジス
トを塗装し、露光、現像により形成された導電層パター
ン部分に電気メッキを施して回路パターンを形成し、電
着レジストを剥離後、露出した導電層をソフトエッチン
グで取り去ることによりプリント配線回路を形成するプ
リント配線板の製造法において、前記導電層に電着レジ
ストを成形することにより、前記立体的な基体の複雑な
表面に、薄く均一なフォトレジストを形成することがで
き、立体的な基体の形状に左右されることのないレジス
トが得られ、回路パターン精度を向上し得るものであ
る。As is apparent from the above description, according to the method for manufacturing a printed wiring board of the present invention, a conductive layer is formed on the surface of a three-dimensional substrate and an electrodeposition resist is coated on the conductive layer. , Printed wiring that forms a printed wiring circuit by electroplating the conductive layer pattern portion formed by exposure and development to form a circuit pattern, and after removing the electrodeposition resist, the exposed conductive layer is removed by soft etching. In the method of manufacturing a plate, a thin and uniform photoresist can be formed on the complicated surface of the three-dimensional substrate by forming an electrodeposition resist on the conductive layer. It is possible to obtain a resist that will not be removed and improve the circuit pattern accuracy.
【0027】また、前記フォトレジストの露光に当たっ
ては、光源として平行光を使用するもので、立体的な基
体の複雑な形状に対応させた立体的なフォトマスクを不
要とするとともにフォトマスクを立体的な基体に密着さ
せることなく、平面的なフォトマスクを配設することに
より、立体的な基体の形状に対応せしめた所望のレジス
ト画像を適確に得られ、かつ回路パターンの変更、ある
いは基体の複雑な形状等にも柔軟に対応し得る。Further, in exposing the photoresist, parallel light is used as a light source, which eliminates the need for a three-dimensional photomask corresponding to the complicated shape of the three-dimensional substrate, and makes the photomask three-dimensional. By arranging a planar photomask without closely contacting the substrate, a desired resist image corresponding to the three-dimensional substrate shape can be accurately obtained, and the circuit pattern can be changed or the substrate can be changed. It can flexibly cope with complicated shapes.
【図1】本発明のプリント配線板の製造法の概略説明図
である。FIG. 1 is a schematic explanatory view of a method for manufacturing a printed wiring board of the present invention.
1 立体成形品 2 凹部 3 スルーホール 4 凸部 5 導電層(無電解メッキ層) 6 電着レジスト 7 フォトマスク 8 電気メッキ層(プリント配線回路) 1 Three-dimensional molded product 2 Recessed part 3 Through hole 4 Convex part 5 Conductive layer (electroless plating layer) 6 Electrodeposition resist 7 Photomask 8 Electroplating layer (printed wiring circuit)
Claims (1)
キにより導電層を形成する工程、 (2)誘導電層上に電着レジストを形成する工程、 (3)該電着レジストを平行光により露光する工程、 (4)露光後、電着レジストを現像する工程、 (5)現像後、露出した導電層パターン部分に電気メッ
キを施す工程、 (6)電気メッキされない部分の導電層上の電着レジス
トを剥離する工程、及び (7)電気メッキされない部分の導電層をソフトエッチ
ングにより除去する工程からなるプリント配線板の製造
法。1. A step of forming a conductive layer on the surface of a three-dimensional substrate by electroless plating, a step of forming an electrodeposition resist on the induction electrode layer, and a step of forming the electrodeposition resist. Step of exposing with parallel light, (4) Step of developing the electrodeposition resist after exposure, (5) Step of electroplating the exposed conductive layer pattern portion after development, (6) Conductive layer in the area not electroplated A method of manufacturing a printed wiring board, which comprises a step of removing the upper electrodeposition resist, and (7) a step of removing a conductive layer in a portion which is not electroplated by soft etching.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8778494A JPH07273432A (en) | 1994-03-30 | 1994-03-30 | Manufacture of printed wiring board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8778494A JPH07273432A (en) | 1994-03-30 | 1994-03-30 | Manufacture of printed wiring board |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH07273432A true JPH07273432A (en) | 1995-10-20 |
Family
ID=13924611
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP8778494A Pending JPH07273432A (en) | 1994-03-30 | 1994-03-30 | Manufacture of printed wiring board |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH07273432A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2002023961A1 (en) * | 2000-09-12 | 2002-03-21 | Epcos Ag | Method for producing an electrically conductive structure on a non-planar surface and the use of said method |
JP2021165848A (en) * | 2018-08-13 | 2021-10-14 | ミニスイス・ソシエテ・アノニムMiniswys S.A. | Lens driving device, camera module, and camera-mounted device |
-
1994
- 1994-03-30 JP JP8778494A patent/JPH07273432A/en active Pending
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2002023961A1 (en) * | 2000-09-12 | 2002-03-21 | Epcos Ag | Method for producing an electrically conductive structure on a non-planar surface and the use of said method |
US6998222B2 (en) | 2000-09-12 | 2006-02-14 | Epcos Ag | Producing an electrically-conductive structure on a non-planar surface |
JP2021165848A (en) * | 2018-08-13 | 2021-10-14 | ミニスイス・ソシエテ・アノニムMiniswys S.A. | Lens driving device, camera module, and camera-mounted device |
JP2021165847A (en) * | 2018-08-13 | 2021-10-14 | ミニスイス・ソシエテ・アノニムMiniswys S.A. | Shake-correcting device for lens, camera module, and camera-mounted device |
JP2021170119A (en) * | 2018-08-13 | 2021-10-28 | ミニスイス・ソシエテ・アノニムMiniswys S.A. | Lens deflection correction device, camera module, and camera-equipped device |
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