JPH05303828A - Hold distortion compensating circuit - Google Patents

Abstract

PURPOSE:To reduce error components of a pulse adder type switching noise compensating circuit. CONSTITUTION:The voltage, which is proportional to an input voltage difference, is held by a holding circuit 5, during a short duration right after the completion of a hold period and a pulse generating circuit 7 outputs pulses, whose wave height values are proportional to the output of the circuit 5, for the same duration as the hold period. These output pulses are added with the outputs of a hold circuit 3 and the low frequency components of distortion are reduced. When the input output voltage difference of the circuit 3 is small, error components caused by noises are outputted from a differential amplifier 4. These small error components are inputted to a nonlinear differential amplifier 6. The amplifier 6 is made to have a characteristic so that there is no output when the input is close to zero, sets the level of a non-sensitive region to be slightly wider than the error component level which is generated by noises so that pulse adding portion of errors is eliminated.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention is a circuit for removing switching noise generated when a head switch of a high fidelity video tape recorder (HiFiVTR) is switched.

[0002]

2. Description of the Related Art A conventional HiFi VTR has a sample hold circuit as a countermeasure against switching noise (FIG. 2a). This is to prevent switching noise from being output by holding for a certain period immediately after the head switch is switched (FIG. 2b).

However, in the countermeasure against switching noise using sample hold, switching noise itself is not output, but as can be seen from FIG. 2B, a part of the signal which should be a sine wave is distorted and the frequency is high (10 kHz).
z or more) and a signal with a high level is reproduced,
There was a problem that this was heard as noise. In solving these problems, there is a distortion correction circuit that reduces noise due to hold distortion by adding pulses of opposite polarities. This is a configuration in which immediately after the end of the hold period of the sample hold circuit, pulses having a polarity proportional to the magnitude of the distortion generated by the hold and having the opposite polarity to the distortion component are added. The signal waveform at this time is shown in FIG. 2d.

[0004]

FIG. 3 shows pulse addition when there is no signal. When there is no signal, noise is added, and error components that should not actually exist are added as shown in FIG. 3c. Although this error component is sufficiently small with respect to the standard signal level, it is a hindrance when the signal is small. Also, the above problem becomes a problem when the error component between the hold signal and the original signal is small.

[0005]

According to the present invention, when the error component between the input voltage and the hold voltage immediately before the end of the hold period is sufficiently small, the differential amplifier has a non-linear characteristic so as not to output the addition pulse signal. is there. The non-linear characteristic dead band is set so as to eliminate only unnecessary pulse addition components due to noise or the like.

[0006]

According to the present invention, when the error component between the hold signal and the original signal is sufficiently small, unnecessary pulse addition caused by noise or the like is reduced.

[0007]

FIG. 1 shows a block diagram of an embodiment. In FIG. 1, the output of the original sample hold circuit 3 having the input terminal 1 and the input terminal 2 is input-connected to the differential amplifier 4, the output is input-connected to the correction sample-hold circuit 5, and the output thereof is non-linear. It is input to the differential amplifier 6 having the characteristics (see FIG. 4), its output is input to the correction pulse generation circuit 7, and its output is added to the output of the sample hold circuit 3. Is a structure for taking out.

Next, FIG. 2 shows an output waveform for explaining the operation of the present invention. In the figure, a is an input to this circuit, b is an original output of the sample hold circuit 3, c is an output of the correction pulse generator 7, and d is an output of this circuit. Also,
Reference characters e and f respectively indicate the original hold pulse of the hold circuit 3 and the hold pulse of the correction hold circuit 5. In this circuit, the hold circuit 5 holds a voltage proportional to the input / output voltage difference of the hold circuit 3 for a short period immediately after the hold period of the hold circuit 3 is finished, and the pulse generation circuit 7 is proportional to the output of the hold circuit 5. The pulse having the peak value is output for the same period as the hold period of the hold circuit 5. By adding this output pulse to the output of the hold circuit 3, the low frequency component of the hold distortion can be reduced.

Next, consider a case where the input / output voltage difference of the hold circuit 3 is small. At this time, almost no signal should be output to the output of the differential amplifier 4, but an error component is output due to noise or the like. This small error component is input to the non-linear differential amplifier 6. The characteristics of the non-linear differential amplifier 6 are shown in FIG. It is possible to eliminate the pulse addition of the error due to noise or the like by giving the characteristic that the input is not output near zero and setting the dead band to a level slightly wider than the error component level generated by noise or the like.

[0010]

According to the present invention, in the pulse addition type switching noise correction circuit, malfunction due to noise or the like can be significantly reduced.

[Brief description of drawings]

FIG. 1 is a block diagram of an embodiment of a hold distortion correction circuit having non-linear characteristics according to the present invention.

2 is an explanatory diagram of signal waveforms of main points in the block diagram of FIG.

FIG. 3 is an explanatory diagram of an output waveform when there is no signal.

FIG. 4 Input / output characteristics of a non-linear differential amplifier

[Explanation of symbols]

 1 Input Terminal 2 Output Terminal 3 Sample Hold Circuit 4 Differential Amplifier 5 Sample Hold Circuit 6 Non-Linear Differential Amplifier 7 Timing Pulse Generator

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁵ Identification code Office reference number FI technical display location H04N 5/93 G 4227-5C

Claims (1)

[Claims] 1. A sample-and-hold circuit that receives a sine wave signal, and immediately after the end of the hold period of the sample-and-hold circuit, which is proportional to the difference voltage between the input voltage and the hold voltage immediately before the end of the hold period, and the reverse voltage. A hold distortion correction circuit configured by a pulse adder circuit that adds a pulse of polarity to the output of the sample hold circuit, and does not perform pulse addition when the difference voltage between the input voltage and the hold voltage immediately before the end of the hold period is small.