JPH04359550A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPH04359550A JPH04359550A JP3134740A JP13474091A JPH04359550A JP H04359550 A JPH04359550 A JP H04359550A JP 3134740 A JP3134740 A JP 3134740A JP 13474091 A JP13474091 A JP 13474091A JP H04359550 A JPH04359550 A JP H04359550A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor device
- resin
- external lead
- protrusion
- cracking
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 24
- 239000011347 resin Substances 0.000 claims abstract description 22
- 229920005989 resin Polymers 0.000 claims abstract description 22
- 238000000465 moulding Methods 0.000 claims description 5
- 238000000034 method Methods 0.000 abstract description 6
- 238000005336 cracking Methods 0.000 abstract 3
- 230000015572 biosynthetic process Effects 0.000 abstract 2
- 238000004519 manufacturing process Methods 0.000 abstract 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 abstract 1
- 238000007789 sealing Methods 0.000 description 6
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 230000002250 progressing effect Effects 0.000 description 2
- 238000005219 brazing Methods 0.000 description 1
- 230000002542 deteriorative effect Effects 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 230000008595 infiltration Effects 0.000 description 1
- 238000001764 infiltration Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Lead Frames For Integrated Circuits (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
Description
【０００１】0001
【産業上の利用分野】本発明は、半導体装置に係り、特
に外部リードの形状に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to semiconductor devices, and particularly to the shape of external leads.
【０００２】0002
【従来の技術】図４は従来の樹脂封止型の半導体装置の
要部断面図を示す。この図において、１は半導体装置の
外部リード、２はモールド樹脂、３はダイパット、４は
このダイパッド３上に接続されたＩＣチップ、５はこの
ＩＣチップ４と外部リード１とを接続する金線、９は前
記外部リード１の樹脂封止部を示す。2. Description of the Related Art FIG. 4 shows a sectional view of a main part of a conventional resin-sealed semiconductor device. In this figure, 1 is an external lead of the semiconductor device, 2 is a mold resin, 3 is a die pad, 4 is an IC chip connected to this die pad 3, and 5 is a gold wire that connects this IC chip 4 and the external lead 1. , 9 indicates a resin-sealed portion of the external lead 1.
【０００３】次に、図４の半導体装置の組立工程につい
て説明する。まず、ＩＣチップ４はロー材にてダイパッ
ト３に接着された後、ＩＣチップ４内電極と外部リード
１とを金線５で結線する。次に、必要部分をモールド樹
脂２で封止し、図５（ａ），（ｂ）に示すような方法で
外部リード１を曲げ成形する。すなわち、図５（ａ）に
おいて、外部リード１は金型ダイ６にセットされ、リー
ド押え７でクランプされてから図５（ｂ）においてロー
ラ８により曲げ成形される。Next, the assembly process of the semiconductor device shown in FIG. 4 will be explained. First, the IC chip 4 is bonded to the die pad 3 with brazing material, and then the electrodes inside the IC chip 4 and the external leads 1 are connected with the gold wires 5. Next, the necessary portions are sealed with mold resin 2, and the external leads 1 are bent and formed by the method shown in FIGS. 5(a) and 5(b). That is, in FIG. 5(a), the external lead 1 is set in a mold die 6, clamped with a lead presser 7, and then bent by rollers 8 in FIG. 5(b).
【０００４】0004
【発明が解決しようとする課題】従来の半導体装置の外
部リード１は、以上のようにして曲げ成形が行われてい
るため、外部リード１の成形時にリード押え７による外
部リード１の押えが不十分だと、図６に示すように、外
部リード１の樹脂封止部９とモールド樹脂２との間にク
ラック（すきま）１０が入り、モールド樹脂２と外部リ
ード１との表面の密着が剥離して進行していき、その部
分から水分が浸入し、半導体装置の耐湿性及び信頼性が
劣化するという問題点があった。[Problems to be Solved by the Invention] Since the external leads 1 of the conventional semiconductor device are bent and formed as described above, the external leads 1 cannot be held down by the lead presser 7 when forming the external leads 1. If this is sufficient, as shown in FIG. 6, a crack (gap) 10 will appear between the resin sealing part 9 of the external lead 1 and the molded resin 2, and the surface adhesion between the molded resin 2 and the external lead 1 will peel off. There is a problem in that moisture infiltrates from that part, deteriorating the moisture resistance and reliability of the semiconductor device.
【０００５】本発明は、上記のような問題点を解決する
ためになされたもので、外部リードの樹脂封止部とモー
ルド樹脂との間にクラックが入ったとしても、半導体装
置の耐湿性、信頼性が劣化しない半導体装置を得ること
を目的とする。The present invention has been made to solve the above-mentioned problems, and even if a crack occurs between the resin sealing part of the external lead and the molding resin, the moisture resistance and moisture resistance of the semiconductor device can be improved. An object of the present invention is to obtain a semiconductor device whose reliability does not deteriorate.
【０００６】[0006]
【課題を解決するための手段】本発明に係る半導体装置
は、外部リードの樹脂封止部表面に所要形状の突起部を
設けたものである。SUMMARY OF THE INVENTION A semiconductor device according to the present invention is provided with a protrusion of a desired shape on the surface of a resin-sealed portion of an external lead.
【０００７】[0007]
【作用】本発明においては、外部リードの樹脂封止部に
突起部を設けたことから、外部リードの成形により樹脂
封止部とモールド樹脂との間にクラックが入ったとして
も、外部リードの樹脂封止部に設けた突起部によって、
そのクラックの進行を防止するので、その部分からの水
分の浸入が防止される。[Function] In the present invention, since the protrusion is provided on the resin-sealed portion of the external lead, even if a crack occurs between the resin-sealed portion and the molded resin due to molding of the external lead, the external lead The protrusion provided on the resin sealing part allows
Since the cracks are prevented from progressing, moisture is prevented from penetrating from the cracks.
【０００８】[0008]
【実施例】以下、本発明の一実施例を図について説明す
る。図１は本発明の一実施例を示す樹脂封止型の半導体
装置の要部断面図で、図４と同一符号は同一構成部分を
示し、１１は前記外部リード１の樹脂封止部９表面に設
けられた突起部で、この突起部１１は段差部が垂直に形
成されている。なお、この突起部１１に限らず、例えば
図２に示すように、三角形状に形成した突起部１２を設
けても良く、その他、クラック１０の進行が防止できる
形状であればどのような形状でもよい。DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a sectional view of a main part of a resin-sealed semiconductor device showing an embodiment of the present invention, in which the same reference numerals as those in FIG. This protrusion 11 is provided with a vertical step. Note that the protrusion 11 is not limited to the protrusion 11; for example, as shown in FIG. good.
【０００９】上記のように、外部リード１の樹脂封止部
９に突起部１１または１２を設けることにより、例えば
外部リード１の成形時にモールド樹脂２と樹脂封止部９
との間に図３に示すようにクラック１０が入ったとして
も、前記突起部１１，１２等を設けて外部リード１の形
状を変えることによりクラック１０の進行が防止される
。したがって、この部分からの水分の浸入を防止するこ
とができる。As described above, by providing the protrusion 11 or 12 on the resin sealing part 9 of the external lead 1, for example, when molding the external lead 1, the mold resin 2 and the resin sealing part 9 can be separated.
Even if a crack 10 occurs between the external lead 1 and the external lead 1 as shown in FIG. 3, the crack 10 can be prevented from progressing by providing the projections 11, 12, etc. and changing the shape of the external lead 1. Therefore, it is possible to prevent moisture from entering from this part.
【００１０】なお、上記実施例では、ＤＩＰタイプのパ
ッケージについて示したが、本発明は、どのようなリー
ド曲げ形状のパッケージにおいても、上記実施例と同様
の効果を奏する。In the above embodiment, a DIP type package was shown, but the present invention can produce the same effects as in the above embodiment with any type of package with bent leads.
【００１１】[0011]
【発明の効果】以上説明したように、本発明は、外部リ
ードの樹脂封止部に所要形状の突起部を設けたので、モ
ールド樹脂と外部リードの樹脂封止部の表面との剥離に
よるクラックの進行が防止され、したがって、剥離部分
からの水分の浸入が防止されるため、信頼性の高い半導
体装置が得られる効果がある。As explained above, the present invention provides a protrusion of a desired shape on the resin-sealed portion of the external lead, thereby preventing cracks caused by peeling between the molding resin and the surface of the resin-sealed portion of the external lead. The progress of this process is prevented, and the infiltration of moisture from the peeled portion is therefore prevented, resulting in a highly reliable semiconductor device.
【図１】本発明の一実施例を示す半導体装置の要部断面
図である。FIG. 1 is a sectional view of a main part of a semiconductor device showing an embodiment of the present invention.
【図２】本発明の他の実施例を示す半導体装置の要部断
面図である。FIG. 2 is a sectional view of a main part of a semiconductor device showing another embodiment of the present invention.
【図３】本発明の効果を説明する半導体装置の要部断面
図である。FIG. 3 is a sectional view of a main part of a semiconductor device for explaining the effects of the present invention.
【図４】従来の半導体装置を示す要部断面図である。FIG. 4 is a sectional view of a main part of a conventional semiconductor device.
【図５】従来の半導体装置の外部リードの成形工程を説
明する要部断面図である。FIG. 5 is a cross-sectional view of a main part illustrating a process of forming an external lead of a conventional semiconductor device.
【図６】従来の半導体装置の問題点を説明する要部断面
図である。FIG. 6 is a cross-sectional view of a main part explaining problems of a conventional semiconductor device.
１ 外部リード ２ モールド樹脂 ３ ダイパット ４ ＩＣチップ ５ 金線 ９ 樹脂封止部 １０ クラック １１ 突起部 １２ 突起部 1 External lead 2 Mold resin 3 Die pad 4 IC chip 5 Gold wire 9 Resin sealing part 10 Crack 11 Protrusion 12 Protrusion
Claims (1)
において、前記半導体装置の外部リードの樹脂封止部表
面に所要形状の突起部を形成したことを特徴とする半導
体装置。1. A semiconductor device sealed with a molding resin, wherein a protrusion of a desired shape is formed on a surface of a resin-sealed portion of an external lead of the semiconductor device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3134740A JPH04359550A (en) | 1991-06-06 | 1991-06-06 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3134740A JPH04359550A (en) | 1991-06-06 | 1991-06-06 | Semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH04359550A true JPH04359550A (en) | 1992-12-11 |
Family
ID=15135477
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3134740A Pending JPH04359550A (en) | 1991-06-06 | 1991-06-06 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH04359550A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10325825B2 (en) | 2017-09-29 | 2019-06-18 | Mitsubishi Electric Corporation | Semiconductor apparatus |
-
1991
- 1991-06-06 JP JP3134740A patent/JPH04359550A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10325825B2 (en) | 2017-09-29 | 2019-06-18 | Mitsubishi Electric Corporation | Semiconductor apparatus |
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