JPH04290337A - Orthogonal modulator - Google Patents

Abstract

PURPOSE:To perform the stable orthogonal modulation of complex signals with simple construction. CONSTITUTION:The polarity of a real part signal I of a digital complex signal is inverted by a polarity inversion circuit 64. The polarity of an imaginary part signal Q of the digital complex signal is inverted by a polarity inversion circuit 65. Signals I, Q, -I, and -Q are inputted to a switch circuit 63. The switch circuit 63 is switched by sampling frequency fs, and the complex signals I, Q, -I, -Q,... are successively outputted at the timing of sampling frequency fs. This is D/A-converted by a D/A converter 68, and the carrier wave frequency fIF component is taken out. The relation between the sampling frequency fs and the carrier wave frequency fIF satisfies fIF=fs (2n+1), the orthogonal modulation signal can be easily obtained.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention particularly relates to a quadrature modulator suitable for use in digital automobiles, mobile phones, etc.

0002

2. Description of the Related Art Conventional automobiles and mobile phones use an analog system in which analog audio signals are FM modulated and transmitted and received using radio waves in the 800 MHz band, for example. However,
Analog-based automobiles and mobile phones have limits on system capacity expansion, making it difficult to respond to an increase in the number of subscribers. Therefore, development of digital automobiles and mobile phones is underway.

[0003] Standardization of specifications for digital automobiles and mobile phones is progressing in each country. for example,
In North American systems, digital audio signals are encoded using, for example, VSE, which is a high-efficiency code based on an analysis-synthesis encoding system.
LP (Vector Sum Excited Lin
ear Prediction). This highly efficient encoded audio signal is subjected to π/4 shift QPSK modulation. Then, it is transmitted using the 800 MHz band. TDMA (time division multiplexed access) is used as the access method. The channel spacing is
For example, it is set to 30kHz.

[0004] In such digital automobile/mobile phone terminals, when performing QPSK modulation on a highly efficiently encoded audio signal, the baseband signal is QPSK modulated in a QPSK modulation circuit configured as a digital circuit, and the baseband signal is QPSK modulated.
The intermediate frequency signal is orthogonally modulated using the digital complex signal obtained by modulation. Then, this intermediate frequency signal is mixed with a signal from a local oscillation circuit and frequency-converted, resulting in an 800
It forms a MHz band signal.

In this case, conventionally, a quadrature modulator as shown in FIG. 4 is used. In other words, FIG. 4 shows an example of a conventional quadrature modulator. In Figure 4, input terminal 1
01 is supplied with the real part signal I of the digital complex signal (I+jQ). A digital complex signal (I
+jQ) imaginary part signal Q is supplied.

[0006] The real part signal I from the input terminal 101 is a D/A
It is supplied to converter 103. D/A converter 10
3, the digital real part signal I is converted into an analog signal. The output of the D/A converter 103 is supplied to a multiplier 105 via a low-pass filter 104. Multiplier 10
5 receives an analog carrier wave signal cos 2 from a terminal 106.
πfIFt (fIF is the frequency of the carrier signal) is supplied. The multiplier 105 converts the carrier wave signal co from the terminal 106 by the real part signal I passed through the low-pass filter 104.
s2πfIFt is modulated. The output of multiplier 105 is supplied to adder 106.

The imaginary part signal Q from the input terminal 102 is D/A
The signal is supplied to converter 107. D/A converter 10
At 7, the digital imaginary signal Q is converted to an analog signal. The output of the D/A converter 107 is supplied to a multiplier 109 via a low-pass filter 108. Multiplier 1
09, an analog carrier wave signal sin is input from the terminal 110.
2πfIFt is supplied. Multiplier 109 modulates carrier signal sin 2πfIFt from terminal 109 with real part signal I passed through low-pass filter 108 . The output of multiplier 109 is supplied to adder 106.

Adder 106 adds the output of multiplier 105 and the output of multiplier 109. The output of adder 106 is taken out from output terminal 111. A quadrature modulated output is obtained from the output of the output terminal 111.

[0009]

As described above, in the conventional quadrature modulator, the D/A converters 103 and 107 convert the real part signal I and imaginary part signal Q of the digital complex signal (I+jQ) into analog complex signals ( I+jQ) into real part signal I and imaginary signal Q signal, and multipliers 105 and 109 convert the analog real part signal I and imaginary signal Q signal into analog carrier wave signals cos 2πfIFt and sin 2π, respectively.
The configuration is such that fIFt is multiplied and the adder 106 adds the multiplication outputs. In this case, two D/A converters 103 and 107, two low-pass filters 1
04 and 108, and two multipliers 105 and 109 are required, which poses a problem of increasing the circuit scale. In addition, analog carrier wave signals cos 2πfIFt and s
To obtain in 2πfIFt, we need an analog oscillator and transfer.

[0010] Accordingly, an object of the present invention is to provide a quadrature modulator that has a simple configuration and is capable of performing quadrature modulation with stable operation.

[0011]

[Means for Solving the Problems] The present invention provides inverting means for inverting the signs of the real and imaginary parts of a digital complex signal, the real and imaginary parts of the digital complex signal, and the inverting means for inverting the signs of the real and imaginary parts of the digital complex signal, and A real part and an imaginary part are input, and the real part and imaginary part of the input digital complex signal and the real part and imaginary part of the sign-inverted digital complex signal are sequentially selected and output in a predetermined order at a sampling frequency. a D/A converter that converts the output of the switch means into an analog signal; and an output of the D/A converter.
It consists of a bandpass filter that extracts the frequency component of the carrier signal that has a predetermined relationship with the sampling frequency.
This is a quadrature modulator that obtains a quadrature modulation signal from the output of a bandpass filter.

0012

[Operation] Sampling frequency fS and carrier frequency fI
If the relationship with F is fIF=fS (2n+1)/4, then the complex signals I, Q, -I, -Q, ..., or I,
-Q, -I, Q, ... are sequentially switched at the timing of the sampling frequency fS, D/A converted, and this is converted to a frequency fS.
If the signal is extracted through an IF bandpass filter, a quadrature modulation signal can be obtained. In this way, the circuit scale can be reduced.

[0013]

EXAMPLES Examples of the present invention will be described in the following order. a. Overall configuration of car/mobile phone terminal b. Quadrature modulation and D/A converter

a. Overall configuration diagram of car/mobile phone terminal 2
1 shows an example of a North American type digital automobile/mobile phone terminal to which the present invention can be applied. In this embodiment, two modes can be set: digital mode and analog mode.

In FIG. 2, switch circuits 1 and 2 are as follows:
This is a switch that can be switched between digital mode and analog mode on the transmitting side. In the digital mode, switch circuits 1 and 2 are set to the a side, and in analog mode, the switch circuits 1 and 2 are set to the b side.

The switch circuit 3 is a switch that can be switched between voice transmission and wideband data transmission in analog mode. During audio transmission, the switch circuit 3 is set to the a side. During wideband data transmission, the switch circuit 3 is set to the b side.

The switch circuit 4 is a switch that can be switched between transmitting and receiving. During transmission, the switch circuit 4 is set to the a side, and during reception, the switch circuit 4 is set to the b side.
set on the side.

First, the transmitting side in digital mode will be explained. In FIG. 2, an audio signal is supplied to the input terminal 5. This audio signal is supplied to the A/D converter 6. A/D converter 6 receives frequency fA from terminal 7.
clock (fA = 8kHz) is supplied. A/
The D converter 6 digitizes the audio signal from the input terminal 5 at a sampling frequency of 8 kHz.

In the digital mode, the switch circuit 9 is set to the a side. Therefore, in the digital mode, this digital audio signal is transmitted to the switch circuit 1.
The signal is supplied to the codec 8 via. With codec 8,
This digital audio signal is converted into VSELP (Vector
SumExcited Linear Predic
tion).

The signal encoded with high efficiency by the codec 8 is supplied to a channel coder 9 . channel coder 9
Accordingly, processing for assembling audio data, control data, etc. into a TDMA frame is performed. Data is output from the channel coder 9 at a modulation rate of 24.3 kHz. The output data of this channel coder 9 is DPSK
The signal is supplied to the modulation circuit 10.

The DPSK modulation circuit 10 receives a baseband carrier clock (fDB=
97.2kHz) is supplied. DPSK modulation circuit 10
As a result, the data from the channel coder 9 is π/4 shift DPSK modulated. The baseband carrier frequency fDB at this time is 97.2 kHz.

The output of the DPSK modulation circuit 12 is m (m=1
00) is supplied to the multiplier circuit 11. In the m multiplier circuit 11,
The frequency of the output signal of the DPSK modulation circuit 12 is m (m=1
00) will be multiplied. Since the baseband carrier frequency fDB of the output signal of the DPSK modulation circuit 12 is set to 97.2kHz, the frequency fDB of the output signal from the m multiplication circuit 11 is 9.72M.
A signal of Hz (97.2kHz×100) is output. The output of the m multiplier circuit 11 is supplied to the a-side input terminal of the switch circuit 2.

In the digital mode, the switch circuit 2 is set to the a side. Therefore, the output of the m multiplier circuit 11 is subjected to quadrature modulation and D/D via the switch circuit 2.
The signal is supplied to the A converter circuit 12. Quadrature modulation and D/
The A converter circuit 12 receives a frequency fS from a terminal 13.
A sampling frequency of (fS=9.72MHz) is supplied. The orthogonal modulation and D/A converter circuit 12 receives real part positive and negative signals I and -I of the complex baseband signal,
The positive and negative signals Q and -Q of the imaginary part are sequentially selected at a sampling frequency fS and subjected to D/A conversion, and components in a predetermined band are extracted to perform orthogonal modulation and D/A conversion. This orthogonal modulation and D/A converter circuit 12
This will be explained in detail later.

An IF signal having an intermediate frequency fIF (12.15 MHz) is obtained from the quadrature modulation and D/A converter circuit 12. This IF signal is supplied to the mixing circuit 14. From the PLL synthesizer 15 to the mixing circuit 14,
A local oscillation signal of frequency fsosc is supplied. The mixing circuit 14 mixes the IF signal and the local oscillation signal to form a transmission signal with a frequency of 800 MHz. This transmission signal is supplied to the power amplifier 16 and power amplified. The output of the power amplifier 16 is supplied to the antenna 17 via the switch circuit 4.

Next, the transmitting side in analog mode will be explained. In analog mode, when transmitting audio,
An audio signal is supplied to the input terminal 5. This audio signal is A
/D converter 6. The A/D converter 6 is supplied with a sampling clock having a frequency fA (fA = 8 kHz) from a terminal 7. A/D converter 6
Then, the audio signal from the input terminal 5 is digitized at a frequency of 8 kHz.

In the analog mode, the switch circuit 1 is set to the b side. Therefore, in the analog mode, this digital audio signal is supplied to the audio signal processing circuit 18 via the switch circuit 1. The audio signal processing circuit 18 performs processing such as pre-emphasis. The output of this audio signal processing circuit 18 is supplied to the a-side input terminal of the switch circuit 3.

[0027] When transmitting audio in analog mode,
The switch circuit 3 is set to the a side. Therefore, during audio transmission, the digital audio signal from the audio signal processing circuit 18 is supplied to the digital FM modulation circuit 22 via the switch circuit 3.

When transmitting wideband data in analog mode, data from input terminal 19 is supplied to wideband data processing circuit 20 . The wideband data processing circuit 20 is supplied with a clock having a frequency fWD (fWD=20 kHz) from a terminal 21. The output of this wideband data processing circuit 22 is
Supplied to the side input end.

When transmitting wideband data in analog mode, the switch circuit 3 is set to the b side. Therefore, during data transmission, output data from the wideband data processing circuit 20 is supplied to the digital FM modulation circuit 22 via the switch circuit 3.

The digital FM modulation circuit 22 has a terminal 2.
3 to the baseband carrier clock (f
AB=120kHz) is supplied. The digital FM modulation circuit 22 subjects the digital audio signal from the audio signal processing circuit 18 or the output data from the wideband data processing circuit 20 to FM modulation. The baseband carrier frequency fAB at this time is 120 kHz.

The output of the digital FM modulation circuit 22 is supplied to an n multiplier circuit 24 (n=81). n multiplier circuit 24
Then, the frequency of the output signal of the digital FM modulation circuit 22 is multiplied by n (n=81). Digital FM modulation circuit 22
The baseband carrier frequency of the output signal is 120kHz
Therefore, from the n multiplier circuit 24, the frequency 9.
A signal of 72 MHz (120 kHz×81=9.72 MHz) is output.

In the analog mode, the switch circuit 2 is set to the b side. Therefore, n multiplier circuit 2
The output of 4 is used for quadrature modulation and D/A via switch circuit 2.
The signal is supplied to the converter circuit 12. Quadrature modulation and D/A
From the converter circuit 12, an intermediate frequency fIF (12.
15MHz) IF signal is obtained. This IF signal is supplied to the mixing circuit 14. The mixing circuit 14 is supplied with a local oscillation signal of frequency fsosc from the PLL synthesizer 15. In the mixing circuit 14, the IF signal and the frequency fso
SC local oscillation signal is mixed, frequency 800MHz
A band transmission signal is formed. This transmission signal is supplied to the power amplifier 16 and power amplified. power amplifier 16
The output is supplied to the antenna 17 via the switch circuit 4.

As described above, in the digital automobile/mobile phone terminal to which the present invention is applied, the switch circuit 2 is switched on both in the digital mode and in the analog mode.
The baseband frequency of the signal output from is 9.72M
Commonly used in Hz. Therefore, the processing after the switch circuit 2 is the same in both the digital mode and the analog mode.

Next, the receiving side will be explained. The switch circuits 31 and 32 are switch circuits that can be switched between digital mode and analog mode on the receiving side. In digital mode, switch circuit 31
and 32 are set on the a side. When in analog mode,
Switch circuits 31 and 32 are set to the b side.

The switch circuit 33 is a switch that can be switched between receiving audio and wideband data in analog mode. When receiving audio, the switch circuit 33 is set to the a side. When receiving wideband data, the switch circuit 33 is set to the b side.

In the case of digital mode, antenna 1
The received output from 7 is supplied to the RF amplifier 35 via the switch circuit 4. The output of the RF amplifier 35 is supplied to a mixing circuit 36. The mixing circuit 36 is supplied with a local oscillation signal of frequency fROSC from the PLL synthesizer 15. In the mixing circuit 36, the received signal has a frequency of 12.5k.
It is converted into a Hz IF signal. This IF signal is supplied to the A/D and orthogonal demodulation circuit 37.

The A/D and orthogonal demodulation circuit 37 has a terminal 3.
A sampling clock of frequency fs (fS = 9.72 MHz) is supplied from 8. The A/D and orthogonal demodulation circuit 37 converts the 12.5kHz IF signal into a frequency 9
．． The real part signal I and the imaginary part signal Q of the complex baseband signal are demodulated by sampling with a 72 MHz sampling clock and sequentially selecting this sampled data with a 9.72 MHz sampling clock.

The output of the A/D and orthogonal demodulation circuit 37 is supplied to the switch circuit 31. In the digital mode, the switch circuit 31 is set to the a side, so the output of the A/D and orthogonal demodulation circuit 37 is converted to 1 through the switch circuit 31.
/m frequency dividing circuit 38 (m=100).

Since demodulated data with a transfer rate of 9.72 MHz is obtained from the A/D and orthogonal demodulation circuit 37, demodulated data with a transfer rate of 97.2 kHz is obtained from the 1/m frequency dividing circuit 38.
Transfer rate data can be obtained. The output of this 1/m frequency dividing circuit 38 is supplied to a DPSK demodulating circuit 39.

The DPSK demodulation circuit 39 is supplied with a baseband carrier wave having a frequency fDB (fDB=24.3kHz) from a terminal 52. A DPSK demodulation circuit 39 demodulates the received data. This demodulated signal is sent to the channel coder 4.
0.

The channel coder 40 decomposes the TDMA frame into audio data and control data. The output of channel coder 40 is supplied to codec 41.

The codec 41 decodes VSELP. The codec 41 decodes the transmitted audio signal. This decoded digital audio signal is supplied to the switch circuit 32.

In the digital mode, the switch circuit 32
is set to the a side, this decoded audio signal is supplied to the D/A converter 42 via the switch circuit 32. The D/A converter 42 is supplied with a clock having a frequency fA (fA = 8 kHz) from a terminal 43. A D/A converter 42 converts the digital audio signal into an analog audio signal. This analog audio signal is output from the output terminal 44.

In analog mode, the antenna 17
The received output from is supplied to a mixing circuit 36 via a switch circuit 4 and an RF amplifier 35. In the mixing circuit 36,
The received signal is converted to an IF signal with a frequency of 12.5kHz. This IF signal is supplied to the A/D and quadrature modulation circuit 37. The A/D and quadrature modulation circuit 37 digitizes the received signal.

The output of the A/D and quadrature modulation circuit 37 is supplied to the switch circuit 31. In the analog mode, the switch circuit 31 is set to the b side, so the output of the A/D and quadrature modulation circuit 37 is transmitted via the switch circuit 31.
The signal is supplied to a 1/n frequency divider circuit 45 (n=100). 1/
The n frequency divider circuit 45 obtains audio data or wideband data at a transfer rate of 120 kHz. 1
The output of the /n frequency dividing circuit 45 is sent to the digital FM demodulation circuit 46.
Supplied.

The digital FM demodulation circuit 46 has a terminal 4.
A carrier wave of frequency fAB (fAB=120 kHz) is supplied from 7. A digital FM demodulation circuit 46 demodulates the digital audio signal or wideband data. This demodulated data is supplied to the switch circuit 33.

In the analog mode, the switch circuit 33 is set to the a side during audio reproduction. therefore,
When playing audio in analog mode, the digital F
The digital audio signal demodulated by the M demodulation circuit 46 is supplied to the audio signal processing circuit 48 via the switch circuit 33.

The audio signal processing circuit 48 performs processing such as de-emphasis. The output of the audio signal processing circuit 48 is supplied to the b-side input terminal of the switch circuit 32. In analog mode, the switch circuit 32 is set to the b side. Therefore, the digital audio signal from the audio signal processing circuit 48 is transmitted to the D/A converter 42 via the switch circuit 32.
supplied to A D/A converter 42 converts the digital audio signal into an analog audio signal. This analog audio signal is output from the output terminal 44.

In analog mode, when wideband data is output, the switch circuit 33 is set to the b side. Therefore, when outputting wideband data in the analog mode, digital data demodulated by the digital FM demodulation circuit 46 is supplied to the wideband data processing circuit 49 via the switch circuit 33. The wideband data processing circuit 49 receives a frequency fW from a terminal 50.
A clock of D (fWD=20kHz) is supplied. Data from wideband data processing circuit 49 is output from output terminal 51.

In this manner, the automobile/mobile phone terminal shown in FIG. 2 digitizes the audio signal to be transmitted, and
A clock signal of frequency fA (fA = 8 kHz) is required to convert the received audio signal into an analog signal. Also, the frequency fDB (fD
B=97.2kHz) baseband signal is required. In addition, in order to perform orthogonal modulation or demodulation, the frequency fs
(fs = 9.72MHz) clock signal is required. Furthermore, a clock signal with a frequency fWD (fWD=20kHz) is required to process wideband data in analog mode. Furthermore, a baseband signal of frequency fAB (fAB=120kHz) in analog mode is required.

Each of these signals is formed based on the signal from the reference clock signal generation circuit 53. The reference clock signal generation circuit 53 generates a clock having a frequency of 19.94 MHz as a master clock signal. Each of the above signals is
The frequency is set to a relationship of 1/integer of 19.94 MHz. Therefore, each signal can be easily generated from this master clock signal with a frequency of 19.94 MHz.

b. Regarding quadrature modulation and D/A converter The present invention can be applied to quadrature modulation and D/A converter circuit 12. As described above, the orthogonal modulation and D/A converter circuit 12 converts the real part positive and negative signals I and -I and the imaginary part positive and negative signals Q and -Q at the sampling frequency fS. Orthogonal modulation is performed by sequentially selecting and performing D/A conversion and extracting components in a predetermined band. This orthogonal modulation and D/A converter circuit 12 will be described in detail.

FIG. 1 shows the configuration of the orthogonal modulation and D/A converter circuit 12. In FIG. 1, a real part signal I of a digital complex signal (I+jQ) is input to an input terminal 61.
is supplied. A digital complex signal (I
+jQ) imaginary part signal Q is supplied.

The real part signal I from the input terminal 61 is supplied to the input terminal 63A of the switch circuit 63, and is also supplied to the polarity inversion circuit 64. The polarity inversion circuit 64 inverts the polarity of the real part signal I to form a real part signal -I. This real part signal -I is supplied to the input terminal 63C of the switch circuit 63.

The imaginary part signal Q from the input terminal 62 is supplied to the input terminal 63B of the switch circuit 63, and is also supplied to the polarity inversion circuit 65. The polarity inversion circuit 65 inverts the polarity of the imaginary part signal Q to form an imaginary part signal -Q. This imaginary part signal -Q is supplied to the input terminal 63D of the switch circuit 63.

A switch control signal is generated in the switch circuit 63 from a switch control circuit 66 . The switch control circuit 66 receives the sampling frequency fS from a terminal 67.
clock is supplied. In the switch circuit 63, a signal I is supplied to input terminals 63A to 63D of the switch circuit 63.
, Q, -I, -Q are sequentially switched at the timing of the sampling frequency fS.

The output of the switch circuit 66 is supplied to a D/A converter 68. The D/A converter 68 is supplied with a clock having a sampling frequency fS from a terminal 67. A D/A converter 68 converts the output of the switch circuit 63 into an analog signal.

The output of the D/A converter 68 is supplied to a band pass filter 69. The bandpass filter 69 has a characteristic of passing a band of carrier frequency (intermediate frequency signal frequency) fIF. An orthogonal modulation signal is obtained from the output of the bandpass filter 69. This orthogonal modulated signal is taken out from the output terminal 70.

The sampling frequency fS and the carrier frequency fIF are set so that the following relationship is satisfied: fIF=fS (2n+1)/4 n=integer. In this example, the sampling frequency fS is 9.72MHz, and the carrier frequency f
The IF is set to 12.15MHz. Therefore, this relationship is satisfied as follows. 12.15MHz=9.72(2×2+1)/4

00
60] Sampling frequency fS and carrier frequency fIF
If the relationship with is set in this way, the complex signals I, Q, -
An orthogonal modulation signal can be obtained by sequentially switching I and -Q at the timing of the sampling frequency fS, performing D/A conversion, and extracting this through a bandpass filter having a frequency fIF.

That is, let us assume that complex signals I, Q, -I, -Q are sequentially sampled at 4N (N=integer) times the sampling frequency fS and subjected to D/A conversion. This is shown in Figure 3A
The complex signal (I+jQ) shown in FIG. 3B is converted into the signal ex shown in FIG.
Real part when frequency converted by p(j2π(fS /4)t) (Figure 3C) Re[(I+jQ)×exp(j2π(fS /4)t
)].

When this signal is converted into an analog signal, from the sampling theorem, fS ·
A quadrature modulated signal is obtained at a frequency of (2n+1)/4 n = integer. Out of these signal components, the bandpass filter 69 extracts
The desired signal components are extracted. Here, the bandpass filter 69 extracts a signal component of fS·(2·2+1)/4=(5/4)fS. Therefore, from the bandpass filter 69, an orthogonal transform output is obtained by orthogonally modulating the carrier wave of the frequency fIF with the digital complex signal (I+jQ) of the sampling frequency fS.

Note that in this example, the complex signals I, Q, -I
, -Q are selected sequentially, but the complex signals I, -Q, -I
, Q may be sequentially selected.

In this way, if the relationship between the sampling frequency fS and the carrier frequency fIF is fIF=fS (2n+1)/4, the complex signals I, Q, -I, -Q are sequentially switched at the timing of the sampling frequency fS. A quadrature modulation signal can be obtained by performing D/A conversion and extracting it through a bandpass filter of frequency fIF. Also,
The A/D and quadrature demodulator 37 in FIG. 2 can be realized by a circuit that performs the opposite operation.

[0065]

According to the present invention, one D/A converter 68, one bandpass filter 69, two sign inverting circuits 64, 65, a switch circuit 63, and a switch control circuit 66 are connected to each other in an orthogonal manner. A modulator can be configured and the circuit scale can be reduced. Further, an analog carrier wave generation circuit is not required. Therefore, the operation can be stabilized and the temperature characteristics can be improved.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of an embodiment of the present invention.

FIG. 2 is a block diagram of an example of an automobile/mobile phone terminal to which the present invention is applied.

FIG. 3 is a spectrum diagram used to explain one embodiment of the present invention.

FIG. 4 is a block diagram of an example of a conventional quadrature modulator.

[Explanation of symbols]

12 Quadrature modulation and D/A converter 63 Switch circuits 64, 65 Sign inversion circuit 66 Switch control circuit 68 D/A converter 69 Bandpass filter

Claims (1)

[Claims] 1. Inverting means for respectively inverting the real part and imaginary part of a digital complex signal; the real part and the imaginary part of the digital complex signal; and the real part and the imaginary part of the digital complex signal with the sign inverted. switch means for sequentially selecting and outputting the real part and imaginary part of the inputted digital complex signal and the real part and imaginary part of the sign-inverted digital complex signal in a predetermined order at a sampling frequency; It consists of a D/A converter that converts the output of the switching means into an analog signal, and a bandpass filter that extracts a frequency component of a carrier signal having a predetermined relationship with the sampling frequency from the output of the D/A converter, and A quadrature modulator that obtains a quadrature modulation signal from the output of a pass filter.