JPH04129304A - Operational amplifier - Google Patents

Abstract

PURPOSE:To drive a lower resistive load and to prevent a current flowing to a drive stage even at fluctuation of a power supply voltage by adopting a push-pull form for a mirror circuit in which a current of a drive stage is not fixed as a constant current but varied with an output voltage change. CONSTITUTION:When a potential of a noninverting input terminal 51 is higher than a potential of an inverting input terminal 52, a current flowing to P-channel MOS transistors(TRs) 1,4 via constant current sources 16,15 is less than a current flowing to P-channel MOS TRs 2,3. Thus, a current flowing to a P- channel MOD TR 12 is also increased and a potential at an output terminal 53 is further increased. Conversely, when the potential at the noninverting input terminal 52 is lower than the potential at the inverting input terminal 52, the current flowing to the TRs 1,4 is increased more than the current flowing to the TRs 2,3. Thus, the current flowing to the TR 12 is decreased and the potential at the output terminal 53 is further decreased.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to operational amplifiers.

[Conventional technology]

For example, as shown in FIG. 3, the input stage of a conventional operational amplifier consisting of an input stage and a drive stage includes a constant current source 43 and a P transistor whose source is connected to the constant current source 43, forming an input stage pair transistor. Channel type MO8) transistor 37,
38, and P-channel type MO8I-transistor 37, 38
The drive stage includes a constant current source 44 and an N-channel MOS transistor 42 whose drain is connected to the constant current source 44, and an N-channel MOS transistor 39, 40 connected to the drain side of the radiator 42 to form a load. It is composed of

In addition, as another conventional example, in order to improve the drive and sink ability for resistive loads, for example, as shown in FIG. 4, a constant current source 54 and a source are connected to the constant current source 54, P-channel type MOS transistors 46 and 47 constituting a stage pair transistor, and P-channel type M
An input stage consisting of an N-channel type MO transistor 48 49 connected to the drain side of the OS transistor 46 and 47 to form a load, a constant current source 55, and a source connected to the constant current source 55. P channel type MO8)
A transistor 50 , a P-channel MOS transistor 51 whose gate is connected to the source of the P-channel MOS transistor 50 , and an N-channel MOS transistor 5
3 and a drive stage comprised of 3 and 3.

[Problem to be solved by the invention]

The above-mentioned conventional operational amplifier shown in FIG. 3 has the disadvantage that when current is applied to a resistive load, the amount of current is limited by the current value determined by the current source, and it cannot handle low-resistance loads. In addition, in the above-described conventional operational amplifier shown in FIG. The disadvantage is that the flowing current fluctuates.

[Means to solve the problem]

The operational amplifier of the present invention includes at least two stages, an input stage and a drive stage, and includes first and second constant current sources each having one end connected to a first power source; A first circuit whose sources are commonly connected to the other end of the first constant current source, and whose gates are individually connected to a non-inverting input terminal and an inverting input terminal, respectively.
and a second first-class conductivity type field effect transistor, each of whose sources are commonly connected to the other end of the second constant current source, and whose gates are connected to the non-inverting input terminal and the inverting input terminal, respectively. Third and fourth first-type conductivity type field-effect transistors connected individually, their drains and gates are connected to the drain of the first first-type conductivity type field-effect transistor, and their sources are connected to a second power source. a first type second conductivity type field effect transistor connected to the second type conductivity type field effect transistor, a drain and a gate connected to the drain of the second type first type conductivity type field effect transistor, and a source connected to the second type first conductivity type field effect transistor;
a second type second conductivity type field effect transistor connected to the power supply of the third type conductivity type field effect transistor; a drain connected to the drain of the third type first conductivity type field effect transistor; and a gate connected to the second type field effect transistor;
a third type second conductivity type field effect transistor whose source is connected to the drain and gate of the second type conductivity type field effect transistor and whose source is connected to the second power source; a fourth conductivity type field effect transistor connected to the drain thereof, a gate connected to the drain and gate of the first second conductivity type field effect transistor, and a source connected to the second power source; a second type conductivity type field effect transistor, the input stage having a gate connected to the drain of the third type first conductivity type field effect transistor and the drain of the third type second conductivity type field effect transistor. a fifth second type conductivity type field effect transistor which is connected in common, and whose source is connected to the second power source and whose drain is connected to the output terminal; and a fifth type first conductivity type field effect transistor whose gate is connected to the fourth type first conductivity type field effect transistor. the drain of the effect transistor and the fourth
a sixth type second conductivity type field effect transistor whose drain is commonly connected to the drains of the second type conductivity type field effect transistors and whose source is connected to the second power source; a fifth first type conductivity type field effect transistor connected to the drain and output terminal of the type electrolytic transistor and having a source connected to the first power source; a sixth first-type conductivity type field-effect transistor connected to the drain of the field-effect transistor and the gate of the fifth first-type conductivity type field-effect transistor, and having a source connected to the first power source; Constructed for the drive stage.

Further, in the operational amplifier of the present invention, the operational amplifier includes at least two stages, an input stage and a drive stage, in which one end of the first and second constant currents is connected to a second power supply, respectively. a source, and first and second sources whose respective sources are commonly connected to the other end of the first constant current source and whose gates are individually connected to the non-inverting input terminal and the inverting input terminal, respectively. a dual conductivity type field effect transistor; a first first type conductivity type field effect transistor having a drain and a gate connected to the drain of the first second type conductivity type field effect transistor and a source connected to a first power supply; a field effect transistor; and a second first type conductivity type field effect transistor, the drain and the gate of which are connected to the drain of the second type second conductivity type field effect transistor, and the source is connected to the first power source. , a drain is connected to the drain of the third type second conductivity type field effect transistor, a gate is connected to the drain and gate of the second type first conductivity type field effect transistor,
a third type first conductivity type field effect transistor having a source connected to the first power source; and a drain connected to the drain of the fourth type second conductivity type field effect transistor;
a fourth first-type conductivity type field-effect transistor having a gate connected to the drain and gate of the first first-type conductivity type field-effect transistor and having a source connected to the first power source; In preparation for an input stage, a gate is commonly connected to the drain of the third type first conductivity type field effect transistor and the drain of the third type second conductivity type field effect transistor, and a source is connected to the first power source. and a fifth first-class conductivity type field-effect transistor whose drain is connected to the output terminal, and whose gate is connected to the drain of the fourth second-type conductivity type field-effect transistor and the fourth first-class conductivity a sixth type field effect transistor of the first type conductivity type, the drain of which is commonly connected to the drains of the type field effect transistors, and whose source is connected to the first power source; and the drain is the drain of the fifth type field effect transistor. and a fifth second type conductivity type field effect transistor connected to the output terminal and having a source connected to the second power source, and a drain and a gate of the sixth type first conductivity type field effect transistor. and a sixth type second conductivity type field effect transistor connected to the gate of the fifth type second conductivity type field effect transistor and having a source connected to the second power source, the drive stage further comprising: may be configured.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a circuit diagram showing a first embodiment of the present invention. As shown in FIG.
, 2.3 and 4, N-channel type MO transistors 5, 6.7 and 8) forming a load transistor; P-channel type MO transistor 10, forming a drive stage;
12 and N-channel type MO8) transistors 9 and 11, N-channel type MOS transistors 13 and 14 forming a phase compensation circuit, capacitors 17 and 18, and constant current source 15
．． 16.

Next, the operation will be explained with reference to FIG. First, when the potential of the non-inverting input terminal 51 becomes higher than the potential of the inverting input terminal 52, the current flowing to the P-channel MOS transistors 1 and 4 via the constant current sources 16 and 15, respectively, is type MO8) The current flowing through the transistors 2 and 3 is smaller than that flowing through the transistors 2 and 3. Therefore, N-channel type M
The potential at the common gate terminal of OS transistors 6.8 increases, but on the other hand, as described above, the current flowing through N-channel MOS transistor 8 decreases.

(P-channel type MO3) Since the current flows through the transistor 4), its drain potential becomes low.

Therefore, by using this point as the first stage output and the input terminal of the drive stage, the potential of the drive stage output terminal becomes high. On the other hand, at this time, the current flowing through the N-channel MOS transistor 3 is increasing (same as the current flowing through the P-channel MOS transistor 3), so its drain potential becomes higher, and the current flowing through the N-channel MOS transistor 9 increases. increases. Therefore, the current flowing through the P-channel type MO8I-transistor 12 also increases, and the potential of the output terminal 53 becomes even higher. Conversely, when the potential of the non-inverting input terminal 52 becomes lower than the potential of the inverting input terminal 52, the current flowing to the P-channel type MO8) transistors 1 and 4 flows to the P-channel type MO8) transistors 2.3. The amount increases compared to the current. Therefore, the N-channel MOS transistor 6
．． 8 decreases, but on the other hand, as mentioned above, the current flowing through N-channel MOS transistor 8 increases (P-channel MOS transistor 4).
Therefore, the drain potential becomes low, and the current flowing through the N-channel MOS transistor 9 decreases. Therefore, P channel type MOS transistor 1
The current flowing through the output terminal 53 decreases, and the potential at the output terminal 53 becomes even lower.

FIG. 2 is a circuit diagram showing a second embodiment of the present invention. As shown in FIG. 2, this embodiment uses an N-channel MOS transistor 1 forming an input stage pair transistor.
9.20.21 and 22 and P-channel MOS transistors 23, 24.25 forming load transistors
and 26, a P-channel MOS transistor 27.29 and an N-channel MOS transistor 28.30 forming a drive stage, a P-channel MOS transistor 31.32 and a capacitor 33.3 forming a phase compensation circuit.
4 and constant current sources 35 and 36.

Next, the operation will be explained with reference to FIG. First, when the potential of the non-inverting input terminal 54 becomes higher than the potential of the inverting input terminal 55, the current flowing to the N-channel MOS transistors 19 and 22 via the constant current sources 36 and 35, respectively, Type MOS transistor 20.2
The current flowing through 1 is larger than the current flowing through 1. Therefore, the potential at the common gate terminal of the P-channel MOS transistors 24 and 28 increases, but on the other hand, as described above,
The current flowing through the S transistor 2B is increasing (same as the current flowing through the N-channel MOS transistor 22)
Therefore, its drain potential becomes low. Therefore, by using this point as the first stage output and the input terminal of the drive stage,
The potential of the drive stage output terminal becomes high. On the other hand, at this time, the current flowing through the P-channel type MO8) transistor 25 is decreasing (same as the current flowing through the N-channel type MOS transistor 21), so its drain potential increases, and the current flowing through the P-channel type MO8) transistor 27 increases. The current decreases. Therefore, the current flowing through the N-channel MOS transistor 30 also decreases, and the potential at the output terminal 56 further increases.

Conversely, when the potential of the non-inverting input terminal 54 becomes lower than the potential of the inverting input terminal, the current flowing through the N-channel MOS transistors 19 and 22
) The current flowing through the transistors 20 and 21 is smaller than that of the current flowing through the transistors 20 and 21. Therefore, P-channel type MOS transistor 24.
The potential of the common gate terminal of the transistors 26 decreases, but on the other hand, as mentioned above, the current flowing through the P-channel MOS transistor 26 decreases (same as the current flowing through the N-channel MOS transistor 22). The drain potential becomes higher. Therefore, by using this point as the first stage output and the input terminal of the driving stage, the potential of the driving stage output terminal becomes low. On the other hand, at this time, the current flowing through the P-channel MOS transistor 25 is increasing (N-channel MOS
The same current as that flowing through the transistor 21) decreases its drain potential, and the current flowing through the P-channel type MO8) transistor 27 increases. Therefore, N-channel type M
The current flowing through the OS transistor 30 increases, and the potential of the output terminal 56 becomes further lower.

〔Effect of the invention〕

As explained above, the present invention is capable of driving a lower resistance load by adopting a push-pull format in which the current in the drive stage is varied in response to changes in the output voltage, without fixing it to a constant current. This has the effect of preventing current from flowing to the drive stage even when the power supply voltage fluctuates.

[Brief explanation of the drawing]

1 and 2 are circuit diagrams of first and second embodiments of the present invention, respectively, and FIGS. 3 and 4 are circuit diagrams of a conventional example. In the figure, 1 to 4, 10, 12.23 to 27.29,
31, 32.37.38.40-42.46, 47.5
0-52 Pf+*R type MOS transistor, 5-9.
11, 13, 14° 19-22. 28. 30. 3
9. 48. 49°53...N channel type MOS transistor, 15°1B, 35,3Ei, 43,44.
54.55... Constant current source, 17, 18, 33, 34,
45.56...Capacity.

Claims (1)

[Claims] 1. In an operational amplifier configured with at least two stages, an input stage and a drive stage, one end of which is connected to a first power source and a second constant current source, respectively. , a first and a second type of first type, each having a source commonly connected to the other end of the first constant current source, and a gate having a non-inverting input terminal and an inverting input terminal, respectively, individually connected; a conductive type field effect transistor; and a third and third conductive field effect transistor, each having its source commonly connected to the other end of the second constant current source and having its gate individually connected to the non-inverting input terminal and the inverting input terminal, respectively. a fourth first-type conductivity type field-effect transistor; a second type second conductivity type field effect transistor whose drain and gate are connected to the drain of the second type first conductivity type field effect transistor and whose source is connected to a second power source; a field effect transistor, a drain connected to the drain of the third type 1 conductivity type field effect transistor, a gate connected to the drain and gate of the second type 2 conductivity type field effect transistor, and a source connected to the drain of the third type 1 conductivity type field effect transistor; a third type second conductivity type field effect transistor connected to the second power source; a drain connected to the drain of the fourth type first conductivity type field effect transistor, and a gate connected to the first type field effect transistor; a fourth second-type conductivity type field-effect transistor connected to the drain and gate of the second-type conductivity type field-effect transistor and having a source connected to the second power source; Commonly connected to the drain of the third type 1 conductivity type field effect transistor and the drain of the third type 2 conductivity type field effect transistor, the source is connected to the second power supply, and the drain is connected to the output. a fifth second-type conductivity type field-effect transistor connected to the terminal; and a gate connected to the drain of the fourth first-type conductivity type field-effect transistor and the drain of the fourth second-type conductivity type field-effect transistor. a sixth type second conductivity type field effect transistor that is commonly connected and has a source connected to the second power source; a drain connected to the drain and output terminal of the fifth type second conductivity type electrolytic transistor; a fifth first-type conductivity type field-effect transistor whose source is connected to the first power source; An operational amplifier characterized in that the drive stage includes: a sixth type first conductivity type field effect transistor connected to a gate of the type conductivity type field effect transistor and having a source connected to the first power source. 2. In an operational amplifier configured with at least two stages, an input stage and a drive stage, first and second constant current sources each having one end connected to a second power supply, and each source having first and second second-type conductivity type field effect transistors that are commonly connected to the other end of the first constant current source, and whose gates are individually connected to a non-inverting input terminal and an inverting input terminal, respectively; and a first type 1 conductivity type field effect transistor whose drain and gate are connected to the drain of the first type 2 conductivity type field effect transistor and whose source is connected to the first power supply; a second type first conductivity type field effect transistor whose gate is connected to the drain of the second type second conductivity type field effect transistor and whose source is connected to the first power source; A first conductivity type field effect transistor connected to the drain of the second type conductivity type field effect transistor, a gate connected to the drain and gate of the second type first conductivity type field effect transistor, and a source connected to the first power source. 3, a first type conductivity type field effect transistor having a drain connected to the drain of the fourth second type conductivity type field effect transistor, and having a gate connected to the drain and gate of the first type first conductivity type field effect transistor; a fourth first-class conductivity type field-effect transistor whose source is connected to the first power supply; The drain of the transistor and the drain of the third type 2 conductivity type field effect transistor are connected in common, and the source is connected to the drain of the first type field effect transistor.
a fifth type first conductivity type field effect transistor whose drain is connected to the power supply of the fourth type second conductivity type field effect transistor and whose drain is connected to the output terminal; a sixth type field effect transistor of the first type conductivity type, which is commonly connected to the drains of the first type conductivity type field effect transistors, and whose source is connected to the first power source; and a drain of the fifth type first type conductivity type field effect transistor. a fifth second type conductivity type field effect transistor connected to the drain and output terminal of the field transistor and having a source connected to the second power source; and a drain and gate connected to the sixth type first conductivity type electric field transistor; a sixth type second conductivity type field effect transistor connected to the drain of the effect transistor and the gate of the fifth type second conductivity type field effect transistor, and whose source is connected to the second power source; An operational amplifier characterized by comprising two stages.