JP7538483B2 - Support glass substrate and laminated substrate using same - Google Patents

Description

The present invention relates to a supporting glass substrate and a laminated substrate using the same, and more specifically, to a supporting glass substrate used to support a processed substrate on which a semiconductor chip is molded in resin during the semiconductor package manufacturing process, and a laminated substrate using the same.

There is a demand for smaller and lighter portable electronic devices such as mobile phones, notebook personal computers, and PDAs (Personal Data Assistance). As a result, the mounting space for the semiconductor chips used in these electronic devices is severely limited, making high-density mounting of semiconductor chips an issue. In recent years, therefore, high-density mounting of semiconductor packages has been attempted using three-dimensional mounting technology, i.e., stacking semiconductor chips on top of each other and connecting each semiconductor chip with wiring.

In addition, conventional wafer-level packages (WLPs) are produced by forming bumps on a wafer and then dicing the wafer into individual pieces. However, conventional WLPs have the problem that it is difficult to increase the number of pins, and because the back surface of the semiconductor chip is exposed when it is mounted, it is prone to chipping of the semiconductor chip.

As a result, fan-out type WLP has been proposed as a new type of WLP. Fan-out type WLP makes it possible to increase the number of pins, and by protecting the edges of the semiconductor chip, it is possible to prevent chipping of the semiconductor chip.

There are two manufacturing methods for fan-out WLP: chip-first and chip-last. The chip-first method, for example, includes a process of molding multiple semiconductor chips with a resin encapsulant to form a processed substrate, wiring one surface of the processed substrate, and forming solder bumps. The chip-last method, for example, includes a process of placing a wiring layer on a support substrate, arranging multiple semiconductor chips, molding the substrate with a resin encapsulant to form a processed substrate, and forming solder bumps.

More recently, a semiconductor package called panel level packaging (PLP) has also been considered. In PLP, a rectangular support substrate rather than a wafer-shaped one is used to increase the number of semiconductor packages that can be produced from one support substrate while reducing manufacturing costs.

The manufacturing process for these semiconductor packages involves heat treatment at approximately 200°C, which can cause the encapsulant to deform and lead to warping of the processed substrate. If warping occurs in the processed substrate, it becomes difficult to achieve high-density wiring on one surface of the processed substrate, and it also becomes difficult to accurately form solder bumps.

In light of these circumstances, the use of a glass substrate to support the processed substrate has been considered in order to suppress warping of the processed substrate (see Patent Document 1).

The surface of a glass substrate is easy to smooth and has rigidity. Therefore, when a glass substrate is used as a support substrate, it is possible to firmly and accurately support the processed substrate. Furthermore, glass substrates are easily transparent to ultraviolet light, infrared light, and other light. Therefore, when a glass substrate is used as a support substrate, the processed substrate can be easily fixed by providing an adhesive layer such as an ultraviolet curing adhesive. Furthermore, the processed substrate can be easily separated by providing a peeling layer that absorbs infrared light. As another method, the processed substrate can be easily fixed and separated by providing an adhesive layer using an ultraviolet curing tape, etc.

JP 2015-78113 A

In fan-out WLP and PLP, multiple semiconductor chips are molded in a resin encapsulant to form a processed substrate, after which there are processes such as wiring one surface of the processed substrate and forming solder bumps.

These processes involve heat treatment at approximately 200 to 300°C, which may cause the encapsulant to deform and the dimensions of the processed substrate to change. If the dimensions of the processed substrate change, it will be difficult to form high-density wiring on one surface of the processed substrate, and it will also be difficult to form solder bumps accurately.

To suppress dimensional changes in the processed substrate, it is effective to use a glass substrate as the support substrate. However, even when a glass substrate is used, dimensional changes in the processed substrate can occur.

The present invention was developed in consideration of the above circumstances, and its technical objective is to contribute to high-density mounting of semiconductor packages by inventing a supporting glass substrate that is less likely to cause dimensional changes in the processed substrate.

As a result of repeated various experiments, the present inventors have found that the above technical problems can be solved by strictly regulating the thermal expansion coefficient of the supporting glass substrate and increasing the Young's modulus of the supporting glass substrate, and propose this as the present invention. That is, the supporting glass substrate of the present invention is characterized in that the average linear thermal expansion coefficient in the temperature range of 30 to 380° C. is 30×10 ⁻⁷ /° C. or more and 55×10 ⁻⁷ /° C. or less, and the Young's modulus is 80 GPa or more. Here, the "average linear thermal expansion coefficient in the temperature range of 30 to 380° C." can be measured with a dilatometer. The "Young's modulus" can be measured by a well-known resonance method.

In the supporting glass substrate of the present invention, the average linear thermal expansion coefficient in the temperature range of 30 to 380° C. is regulated to 30×10 ⁻⁷ /° C. or more and 55×10 ⁻⁷ /° C. or less. In this way, it becomes easier to match the thermal expansion coefficients of the processing substrate and the supporting glass substrate. When the thermal expansion coefficients of both are matched, it becomes easier to suppress dimensional changes (particularly warpage deformation) of the processing substrate during processing. As a result, it becomes possible to perform high-density wiring on one surface of the processing substrate, and it also becomes possible to accurately form solder bumps.

Furthermore, the Young's modulus of the supporting glass substrate of the present invention is restricted to 80 GPa or more. This improves the rigidity of the laminated substrate, making it easier to suppress dimensional changes (especially warpage) in the processed substrate, and makes it possible to firmly and accurately support the processed substrate.

The supporting glass substrate of the present invention preferably has a total thickness deviation (TTV) of less than 2.0 μm. This makes it easier to improve the accuracy of processing. In particular, wiring accuracy can be improved, enabling high-density wiring. Furthermore, the number of times the supporting glass substrate can be reused can be increased. Here, "total thickness deviation (TTV)" is the difference between the overall maximum thickness and the minimum thickness, and can be measured, for example, using SBW-331ML/d manufactured by Kobelco Research Institute, Ltd.

The supporting glass substrate of the present invention preferably contains, in mass %, as a glass composition, 50-66% SiO ₂ , 7-34% Al ₂ O ₃ , 0-8% B ₂ O ₃ , 0-22% MgO, 1-15% CaO, and 0-20% Y ₂ O ₃ + La _{2 O 3 + ZrO 2 . Here, "Y 2 O 3 + La 2 O 3 + ZrO 2 " refers to} the total amount of Y ₂ O ₃ , La ₂ O ₃ and ZrO ₂ .

The supporting glass substrate of the present invention is preferably used to support a processed substrate on which a semiconductor chip is molded in resin during the manufacturing process of a semiconductor package.

The laminated substrate of the present invention is a laminated substrate including at least a processed substrate and a supporting glass substrate for supporting the processed substrate, and it is preferable that the supporting glass substrate is the above-mentioned supporting glass substrate.

In addition, it is preferable that the processed substrate of the laminated substrate of the present invention is a processed substrate in which a semiconductor chip is molded in resin.

The method for manufacturing a semiconductor package of the present invention also includes a step of preparing a laminated substrate including at least a processing substrate and a supporting glass substrate for supporting the processing substrate, and a step of performing a processing process on the processing substrate, and it is preferable that the supporting glass substrate is the above-mentioned supporting glass substrate.

In addition, in the manufacturing method of the semiconductor package of the present invention, it is preferable that the processing step includes a step of wiring one surface of the processing substrate.

In addition, in the manufacturing method of the semiconductor package of the present invention, the processing step preferably includes a step of forming solder bumps on one surface of the processing substrate.

1 is a conceptual perspective view showing an example of a laminated substrate of the present invention. 1A to 1C are conceptual cross-sectional views showing the manufacturing process of a chip-first type of fan-out type WLP. 10A to 10C are conceptual cross-sectional views showing a process of thinning a processed substrate by using a supporting glass substrate as a back-grinding substrate.

In the supporting glass substrate of the present invention, the average linear thermal expansion coefficient in the temperature range of 30 to 380 ° C. is 30 × 10 ^-7 / ° C. or more and 55 × 10 ^-7 / ° C. or less, preferably 32 × 10 ^-7 / ° C. or more and 52 × 10 ^-7 / ° C. or less, preferably 33 × 10 ^-7 / ° C. or more and 49 × 10 ^-7 / ° C. or less, particularly preferably 34 × 10 ^-7 / ° C. or more and 44 × 10 ^-7 / ° C. or less. If the average linear thermal expansion coefficient in the temperature range of 30 to 380 ° C. is outside the above range, it becomes difficult to match the thermal expansion coefficients of the processing substrate and the supporting glass substrate. And, if the thermal expansion coefficients of both are inconsistent, the dimensional change (particularly warpage deformation) of the processing substrate during processing is likely to occur.

In the supporting glass substrate of the present invention, the Young's modulus is preferably 80 GPa or more, 85 GPa or more, 90 GPa or more, 95 GPa or more, and particularly 96 to 130 GPa. If the Young's modulus is too low, it becomes difficult to maintain the rigidity of the laminate, and dimensional changes (particularly warpage) of the processed substrate are likely to occur.

In the supporting glass substrate of the present invention, the total thickness deviation (TTV) is preferably less than 2.0 μm, 1.5 μm or less, 1.0 μm or less, and particularly 0.1 to 1.0 μm or less. If the total thickness deviation (TTV) is too large, the accuracy of the processing is likely to decrease. Furthermore, it becomes difficult to reuse the supporting glass substrate.

The entire surface of the support glass substrate of the present invention is preferably a polished surface. In this way, it is easy to regulate the total thickness deviation (TTV) to less than 2.0 μm, 1.5 μm or less, 1.0 μm or less, and particularly less than 1.0 μm. Various methods can be adopted as the polishing method, but a method in which both sides of the glass substrate are sandwiched between a pair of polishing pads and the glass substrate and the pair of polishing pads are rotated together while polishing the glass substrate is preferably performed. Furthermore, it is preferable that the pair of polishing pads have different outer diameters, and it is preferable to perform the polishing process so that a part of the glass substrate intermittently protrudes from the polishing pad during polishing. This makes it easier to reduce the total thickness deviation (TTV) and the amount of warping. In the polishing process, the polishing depth is not particularly limited, but the polishing depth is preferably 50 μm or less, 30 μm or less, 20 μm or less, and particularly 10 μm or less. The smaller the polishing depth, the higher the productivity of the support glass substrate.

The supporting glass substrate of the present invention more preferably contains, in mass %, SiO ₂ 50-66%, Al ₂ O ₃ 7-34%, B ₂ O ₃ 0-8%, MgO 0-22%, CaO 1-15%, Y ₂ O ₃ +La ₂ O ₃ +ZrO ₂ 0-20% as a glass composition. The reasons for limiting the content of each component as described above are as follows. In the description of the content of each component, % denotes mass % unless otherwise specified.

SiO ₂ is a component that forms a glass network. The content of SiO ₂ is preferably 50-66%, 51-65%, 52-64%, 53-63%, 54-62.5%, 56-62%, particularly 58-61%. If the content of SiO ₂ is too low, vitrification becomes difficult and weather resistance tends to decrease. Furthermore, the thermal expansion coefficient becomes too high. On the other hand, if the content of SiO ₂ is too high, meltability and moldability tend to decrease, and the thermal expansion coefficient becomes too low.

Al ₂ O ₃ is a component that enhances Young's modulus and weather resistance. The content of Al ₂ O ₃ is preferably 7 to 34%, 8 to 26%, 9 to 24%, 11 to 23%, 12 to 22%, 14 to 21%, and particularly 16 to 21%. If the content of Al ₂ O ₃ is too low, Young's modulus and weather resistance are likely to decrease. On the other hand, if the content of Al ₂ O ₃ is too high, meltability, moldability, and devitrification resistance are likely to decrease.

B ₂ O ₃ is a component that forms a glass network, but is also a component that reduces the Young's modulus and weather resistance. Therefore, the content of B ₂ O ₃ is preferably 0 to 8%, 0.1 to 7%, 1 to 6%, particularly preferably 3 to 5%.

MgO is a component that significantly increases Young's modulus and also reduces high-temperature viscosity, improving meltability and moldability. The MgO content is preferably 0-22%, 0.5-21%, 1-20.5%, 2-20%, 4-19.5%, 5-19%, 7-19%, 8-18%, 8.5-16%, 9-16%, 9-14%, and particularly 9-12%. If the MgO content is too low, it becomes difficult to achieve the above effects. On the other hand, if the MgO content is too high, devitrification resistance is easily reduced.

CaO is a component that reduces high-temperature viscosity and improves meltability and moldability. The CaO content is preferably 1-15%, 2-12%, 3-10%, and particularly 5-8%. If the CaO content is too low, it becomes difficult to obtain the above effects. On the other hand, if the CaO content is too high, devitrification resistance is easily reduced.

From the viewpoint of increasing the Young's modulus, the molar ratio MgO/(MgO+CaO+SrO+BaO) is preferably 0 or more, 0.1 or more, 0.2 or more, 0.3 or more, 0.4 or more, 0.5 or more, 0.6 or more, and particularly 0.7 or more. Note that "MgO/(MgO+CaO+SrO+BaO)" is the value obtained by dividing the MgO content by the combined amount of MgO, CaO, SrO, and BaO.

Y ₂ O ₃ , La ₂ O ₃ and ZrO ₂ are components that increase the Young's modulus. The total amount of Y ₂ O ₃ , La ₂ O ₃ and ZrO ₂ is preferably 0-20%, 0.1-18%, 0.5-16%, 1-15%, 1-14%, 1-12%, 1.2-10%, 1.3-8%, particularly 1.5-5%. If the total amount of Y ₂ O ₃ , La ₂ O ₃ and ZrO ₂ is too large, the devitrification resistance is likely to decrease. The content of _{Y 2} O ₃ is preferably 0-15%, 0.1-14%, 0.5-13%, 0.5-12%, 0.5-10%, 0.5-8%, 0.5-6%, particularly 1-4%. The content of La ₂ O ₃ is preferably 0-6%, 0-4%, particularly 0-2%. The content of ZrO ₂ is preferably 0-10%, 0.1-6%, 0.5-4%, particularly 1-3%. If the content of Y ₂ O ₃ is too high, the devitrification resistance is likely to decrease and the raw material cost is likely to increase. If the content of La ₂ O ₃ is too high, the devitrification resistance is likely to decrease and the raw material cost is likely to increase. If the content of ZrO ₂ is too high, the devitrification resistance is likely to decrease.

In addition to the above ingredients, the following ingredients may also be added:

SrO and BaO are components that reduce high-temperature viscosity and improve meltability and moldability. The amounts of SrO and BaO are 0-15%, 0.1-12%, and especially 0.5-10%, respectively.

ZnO is a component that reduces high-temperature viscosity and significantly increases melting properties. The ZnO content is preferably 0-7%, 0.1-5%, and particularly 0.5-3%. If the ZnO content is too low, it becomes difficult to obtain the above effects. If the ZnO content is too high, the glass becomes more susceptible to devitrification.

Li ₂ O, Na ₂ O and K ₂ O are components that lower the high-temperature viscosity and improve the meltability and moldability, but also increase the thermal expansion coefficient. In order to lower the high-temperature viscosity and improve the meltability and moldability while also increasing the thermal expansion coefficient, the total content of Li ₂ O, Na ₂ O and K ₂ O is preferably 0 to 15%, 0.01 to 10%, 0.05 to 8%, particularly 0.1 to 5%. The respective contents of Li ₂ O, Na ₂ O and K ₂ O are preferably 0 to 10%, 0.01 to 5%, 0.05 to 4%, particularly less than 0.1 to 3%. In order to reduce the thermal expansion coefficient, the total content of Li ₂ O, Na ₂ O and K ₂ O is preferably 0 to 15%, 0 to 10%, 0 to 5%, 0 to 1%, 0 to 0.1%, 0 to 0.05%, particularly preferably 0 to less than 0.01%. The respective contents of Li ₂ O, Na ₂ O and K ₂ O are preferably 0 to 15%, 0 to 10%, 0 to 5%, 0 to 1%, 0 to 0.1%, 0 to 0.05%, particularly preferably 0 to less than 0.01%.

_TiO2 is a component that enhances weather resistance, but also colors the glass. Therefore, the content of _TiO2 is preferably 0 to 0.5%, and particularly preferably 0 to less than 0.1%.

As a fining agent, one or more selected from the group consisting of SnO ₂ , Cl, SO ₃ and CeO ₂ (preferably SnO ₂ and SO ₃ ) may be added in an amount of 0.05 to 0.5%.

Fe ₂ O ₃ is a component that is inevitably mixed as an impurity in glass raw materials and is a coloring component. Therefore, the content of Fe ₂ O ₃ is preferably 0.5% or less, 0.001 to 0.1%, 0.005 to 0.07%, 0.008 to 0.03%, particularly 0.01 to 0.025%.

_{V2O5 , Cr2O3} , _CoO3 and NiO _are coloring _components . Therefore, the content of each of _V2O5 , _Cr2O3 , _CoO3 and NiO is preferably 0.1 _% or less, particularly preferably less than 0.01%.

From an environmental perspective, it is preferable that the glass composition does not substantially contain As ₂ O ₃ , Sb ₂ O ₃ , PbO, Bi ₂ O ₃ and F. Here, "substantially does not contain ..." means that the specified components are not actively added as glass components, but are allowed to be mixed in as impurities, and specifically means that the content of the specified components is less than 0.05%.

The supporting glass substrate of the present invention preferably has the following characteristics:

The strain point is preferably 580°C or higher, 620°C or higher, 650°C or higher, or 680°C or higher, and particularly 700 to 850°C. The higher the strain point, the easier it is to reduce the thermal shrinkage of the supporting glass substrate during the semiconductor package manufacturing process. As a result, it becomes easier to increase the precision of the processing. Note that "strain point" refers to a value measured based on the method of ASTM C336.

The liquidus temperature is preferably 1300°C or less, 1280°C or less, 1250°C or less, 1160°C or less, 1130°C or less, and particularly 1100°C or less. In this way, it becomes easier to form into a plate shape, so that the total thickness deviation (TTV) can be reduced to less than 2.0 μm, particularly less than 1.0 μm, without polishing the surface or with a small amount of polishing, and as a result, the manufacturing cost of the support glass substrate can be reduced. Furthermore, it becomes easier to prevent the occurrence of devitrification crystals during forming. Here, the "liquidus temperature" can be calculated by placing the glass powder that passes through a standard sieve 30 mesh (500 μm) and remains on the 50 mesh (300 μm) in a platinum boat, holding it in a temperature gradient furnace for 24 hours, and measuring the temperature at which crystals precipitate.

The liquidus viscosity is preferably 10 ^3.8 dPa·s or more, 10 ^4.0 dPa·s or more, 10 ^4.2 dPa·s or more, 10 ^4.4 dPa·s or more, particularly 10 ^4.6 dPa·s or more. In this way, it becomes easy to form into a plate shape, so that the total thickness deviation (TTV) can be reduced to less than 2.0 μm, particularly less than 1.0 μm, without polishing the surface or with a small amount of polishing, and as a result, the manufacturing cost of the supporting glass substrate can be reduced. Here, the "liquidus viscosity" can be measured by a platinum ball pulling method.

The temperature at 10 ^2.5 dPa·s is preferably 1550° C. or less, 1500° C. or less, 1480° C. or less, 1450° C. or less, particularly 1200 to 1400° C. or less. If the temperature at 10 ^2.5 dPa·s is high, the melting property decreases, and the manufacturing cost of the supporting glass substrate increases. Here, the "temperature at 10 ^2.5 dPa·s" can be measured by a platinum sphere pulling method.

The plate thickness is preferably 1.5 mm or less, 1.2 mm or less, 1.0 mm or less, and particularly 0.9 mm or less. On the other hand, if the plate thickness is too thin, the strength of the supporting glass substrate itself decreases, making it difficult for the supporting substrate to function. Therefore, the plate thickness of the supporting glass substrate is preferably 0.5 mm or more, 0.6 mm or more, and particularly more than 0.7 mm.

The amount of warping is preferably 60 μm or less, 55 μm or less, 50 μm or less, 1 to 45 μm, and particularly 5 to 40 μm. The smaller the amount of warping, the easier it is to improve the processing accuracy. In particular, wiring accuracy can be improved, making high-density wiring possible. In order to reduce the amount of warping, it is preferable to stack multiple glass substrates and perform heat treatment. The "amount of warping" refers to the sum of the absolute value of the maximum distance between the highest point and the least squares focal plane on the entire supporting glass substrate, and the absolute value of the minimum point and the least squares focal plane, and can be measured, for example, using SBW-331ML/d manufactured by Kobelco Research Institute, Ltd.

The supporting glass substrate of the present invention is preferably in the form of a wafer (approximately circular), with a diameter of 100 mm to 500 mm, and particularly preferably 150 mm to 450 mm, and a circularity (excluding the notch) of 1 mm or less, 0.1 mm or less, 0.05 mm or less, and particularly preferably 0.03 mm or less. This makes it easier to apply to the manufacturing process of semiconductor packages. Note that "circularity" is the value obtained by subtracting the minimum value from the maximum value of the outer shape of the wafer.

The supporting glass substrate of the present invention preferably has a notch portion (notch-shaped alignment portion), and more preferably the deep portion of the notch portion is substantially circular or substantially V-groove-shaped in plan view. This makes it easier to fix the position of the supporting glass substrate by abutting a positioning member such as a positioning pin against the notch portion of the supporting glass substrate. As a result, it becomes easier to align the supporting glass substrate with the processing substrate. In particular, forming a notch portion in the processing substrate and abutting a positioning member thereon makes it easier to align the entire laminate.

On the other hand, when a positioning member is brought into contact with the notch portion of the supporting glass substrate, stress tends to concentrate in the notch portion, and the supporting glass substrate tends to break starting from the notch portion. This tendency is particularly pronounced when the supporting glass substrate is curved by an external force. Therefore, it is preferable that all or part of the edge region where the surface of the notch portion intersects with the end face is chamfered. This makes it possible to effectively avoid breakage starting from the notch portion.

It is more preferable that 50% or more of the edge area where the surface of the notch portion and the end face intersect is chamfered, it is particularly preferable that 90% or more of the edge area where the surface of the notch portion and the end face intersect is chamfered, and it is most preferable that the entire edge area where the surface of the notch portion and the end face intersect is chamfered. The larger the area that is chamfered in the notch portion, the more likely it is that breakage originating from the notch portion will be reduced.

The chamfer width of the notch in the front surface direction (similarly the chamfer width in the back surface direction) is preferably 50 to 900 μm, 200 to 800 μm, 300 to 700 μm, 400 to 650 μm, and particularly 500 to 600 μm. If the chamfer width of the notch in the front surface direction is too small, the supporting glass substrate is likely to be damaged starting from the notch. On the other hand, if the chamfer width of the notch in the front surface direction is too large, the chamfering efficiency decreases, and the manufacturing costs of the supporting glass substrate are likely to rise.

The chamfer width of the notch portion in the plate thickness direction (total chamfer widths on the front and back surfaces) is preferably 5-80%, 20-75%, 30-70%, 35-65%, and particularly 40-60% of the plate thickness. If the chamfer width of the notch portion in the plate thickness direction is too small, the supported glass substrate is more likely to break starting from the notch portion. On the other hand, if the chamfer width of the notch portion in the plate thickness direction is too large, external forces are more likely to concentrate on the edge face of the notch portion, and the supported glass substrate is more likely to break starting from the edge face of the notch portion.

From the viewpoint of reducing the total thickness variation (TTV), it is preferable that the supporting glass substrate of the present invention has not been subjected to a chemical strengthening treatment. In other words, it is preferable that the surface does not have a compressive stress layer.

Various methods can be used to form the supporting glass substrate. For example, the slot-down method, roll-out method, redraw method, float method, ingot molding method, etc. can be used.

The laminated substrate of the present invention is a laminated substrate including at least a processed substrate and a supporting glass substrate for supporting the processed substrate, characterized in that the supporting glass substrate is the supporting glass substrate described above. Here, the technical features (preferable configurations and effects) of the laminated substrate of the present invention overlap with the technical features of the supporting glass substrate of the present invention. Therefore, in this specification, detailed description of the overlapping parts is omitted.

The laminated substrate of the present invention preferably has an adhesive layer between the processing substrate and the supporting glass substrate. The adhesive layer is preferably a resin, such as a thermosetting resin or a photocurable resin (particularly an ultraviolet-curable resin). It is also preferable that the adhesive layer has heat resistance sufficient to withstand the heat treatment in the semiconductor package manufacturing process. This makes it difficult for the adhesive layer to melt during the semiconductor package manufacturing process, and allows for increased processing accuracy.

The laminated substrate of the present invention preferably further has a release layer between the processed substrate and the supporting glass substrate, more specifically between the processed substrate and the adhesive layer, or between the supporting glass substrate and the adhesive layer. In this way, after the processed substrate is subjected to a predetermined processing treatment, it becomes easier to peel the processed substrate from the supporting glass substrate. From the viewpoint of productivity, peeling of the processed substrate is preferably performed by irradiating light such as laser light.

The peeling layer is composed of a material that undergoes "intralayer peeling" or "interfacial peeling" when irradiated with light such as laser light. In other words, when irradiated with light of a certain intensity, the interatomic or intermolecular bonding forces in atoms or molecules disappear or decrease, causing ablation or the like, resulting in peeling. In addition, when irradiated with light, the components contained in the peeling layer may turn into gas and be released, leading to separation, or the peeling layer may absorb light, turn into gas, and release the vapor, leading to separation.

In the laminated substrate of the present invention, it is preferable that the supporting glass substrate is larger than the processing substrate. This makes it difficult for the edge of the processing substrate to protrude from the supporting glass substrate even if the central positions of the processing substrate and the supporting glass substrate are slightly separated when they are supported.

The method for manufacturing a semiconductor package of the present invention includes a step of preparing a laminated substrate including at least a processing substrate and a supporting glass substrate for supporting the processing substrate, and a step of performing a processing process on the processing substrate, and is characterized in that the supporting glass substrate is the above-mentioned supporting glass substrate. Here, the technical features (preferable configurations and effects) of the method for manufacturing a semiconductor package of the present invention overlap with the technical features of the supporting glass substrate and the laminated substrate of the present invention. Therefore, in this specification, detailed description of the overlapping parts is omitted.

The method for manufacturing a semiconductor package of the present invention includes a step of preparing a laminated substrate including at least a processed substrate and a supporting glass substrate for supporting the processed substrate. The laminated substrate including at least a processed substrate and a supporting glass substrate for supporting the processed substrate has the above-mentioned material configuration. The above-mentioned molding method can be adopted as the molding method for the glass substrate.

The semiconductor package manufacturing method of the present invention preferably further includes a step of transporting the laminated substrate. This can improve the processing efficiency of the processing. Note that the "step of transporting the laminated substrate" and the "step of performing processing on the processed substrate" do not need to be performed separately, and may be performed simultaneously.

In the semiconductor package manufacturing method of the present invention, the processing is preferably a process for wiring one surface of the processed substrate, or a process for forming solder bumps on one surface of the processed substrate. In the semiconductor package manufacturing method of the present invention, the processed substrate is unlikely to change in dimensions during these processes, so these steps can be carried out appropriately.

In addition to the above, the processing may be any of the following: mechanical polishing of one surface of the processing substrate (usually the surface opposite the supporting glass substrate), dry etching of one surface of the processing substrate (usually the surface opposite the supporting glass substrate), and wet etching of one surface of the processing substrate (usually the surface opposite the supporting glass substrate). In addition, in the manufacturing method of the semiconductor package of the present invention, warping is unlikely to occur in the processing substrate, and the rigidity of the laminated substrate can be maintained. As a result, the above processing can be performed appropriately.

The present invention will be further explained with reference to the drawings.

FIG. 1 is a conceptual perspective view showing an example of a laminated substrate 1 of the present invention. In FIG. 1, the laminated substrate 1 includes a supporting glass substrate 10 and a processed substrate 11. The supporting glass substrate 10 is attached to the processed substrate 11 in order to prevent dimensional changes in the processed substrate 11. The supporting glass substrate 10 has an average linear thermal expansion coefficient of 32×10 ⁻⁷ /° C. or more and 55×10 ⁻⁷ /° C. or less in a temperature range of 30 to 380° C., and a Young's modulus of 80 GPa or more. In addition, a peeling layer 12 and an adhesive layer 13 are disposed between the supporting glass substrate 10 and the processed substrate 11. The peeling layer 12 is in contact with the supporting glass substrate 10, and the adhesive layer 13 is in contact with the processed substrate 11.

As can be seen from FIG. 1, the laminated substrate 1 is formed by stacking the supporting glass substrate 10, the peeling layer 12, the adhesive layer 13, and the processed substrate 11 in this order. The shape of the supporting glass substrate 10 is determined according to the processed substrate 11, but in FIG. 1, the shapes of the supporting glass substrate 10 and the processed substrate 11 are both wafer-shaped. In addition to amorphous silicon (a-Si), silicon oxide, silicate compounds, silicon nitride, aluminum nitride, titanium nitride, and the like are used for the peeling layer 12. The peeling layer 12 is formed by plasma CVD, spin coating using the sol-gel method, and the like. The adhesive layer 13 is made of resin, and is applied and formed by, for example, various printing methods, inkjet methods, spin coating methods, roll coating methods, and the like. After the supporting glass substrate 10 is peeled off from the processed substrate 11 by the peeling layer 12, the adhesive layer 13 is dissolved and removed by a solvent or the like.

2 is a conceptual cross-sectional view showing the manufacturing process of the chip-first type of fan-out type WLP. FIG. 2(a) shows a state in which an adhesive layer 21 is formed on one surface of a support member 20. If necessary, a peeling layer may be formed between the support member 20 and the adhesive layer 21. Next, as shown in FIG. 2(b), a plurality of semiconductor chips 22 are attached on the adhesive layer 21. At that time, the active side surface of the semiconductor chip 22 is brought into contact with the adhesive layer 21. Next, as shown in FIG. 2(c), the semiconductor chip 22 is molded with a resin sealant 23. The sealant 23 is made of a material that has little dimensional change after compression molding and little dimensional change when forming wiring. Next, as shown in FIG. 2(d) and (e), after separating the processing substrate 24 on which the semiconductor chip 22 is molded from the support member 20, it is bonded and fixed to the supporting glass substrate 26 via the adhesive layer 25. At that time, the surface of the processing substrate 24 opposite to the surface on which the semiconductor chip 22 is embedded is arranged on the supporting glass substrate 26 side. In this way, the laminated substrate 27 can be obtained. If necessary, a peeling layer may be formed between the adhesive layer 25 and the supporting glass substrate 26. Furthermore, after the obtained laminated substrate 27 is transported, as shown in FIG. 2(f), wiring 28 is formed on the surface of the processed substrate 24 on the side where the semiconductor chip 22 is embedded, and then a plurality of solder bumps 29 are formed. Finally, after the processed substrate 24 is separated from the supporting glass substrate 26, the processed substrate 24 is cut into individual semiconductor chips 22, and is subjected to the subsequent packaging process (FIG. 2(g)).

3 is a conceptual cross-sectional view showing a process of thinning a processed substrate using a supporting glass substrate as a back-grinding substrate. FIG. 3(a) shows a laminated substrate 30. The laminated substrate 30 is arranged by stacking a supporting glass substrate 31, a peeling layer 32, an adhesive layer 33, and a processed substrate (silicon wafer) 34 in this order. A plurality of semiconductor chips 35 are formed on the surface of the processed substrate that contacts the adhesive layer 33 by a photolithography method or the like. FIG. 3(b) shows a process of thinning the processed substrate 34 by a polishing device 36. In this process, the processed substrate 34 is mechanically polished and thinned to, for example, several tens of μm. FIG. 3(c) shows a process of irradiating the peeling layer 32 with ultraviolet light 37 through the supporting glass substrate 31. After this process, it becomes possible to separate the supporting glass substrate 31 as shown in FIG. 3(d). The separated supporting glass substrate 31 is reused as necessary. FIG. 3(e) shows a process of removing the adhesive layer 33 from the processed substrate 34. After this process, a thin processed substrate 34 can be obtained.

The present invention will be described below based on examples. Note that the following examples are merely illustrative. The present invention is not limited to the following examples in any way.

Tables 1 to 9 show examples of the present invention (samples No. 1 to 86) and a comparative example (sample No. 87).

First, a glass batch prepared by mixing glass raw materials to obtain the glass composition shown in the table was placed in a platinum crucible, and then melted, clarified, and homogenized at 1500 to 1700 ° C. for 24 hours. When melting the glass batch, a platinum stirrer was used to stir and homogenize the glass. Next, the molten glass was poured onto a carbon plate, formed into a plate shape, and then slowly cooled for 30 minutes at a temperature near the annealing point. For each of the obtained glass substrates, the density, the average linear thermal expansion coefficient CTE in the temperature range of 30 to 380 ° _{C. (30 to 380 ° C.} ), Young's modulus, strain point Ps, annealing point Ta, softening point Ts, temperature at high temperature viscosity of 10 ^4.0 dPa s, temperature at high temperature viscosity of 10 ^3.0 dPa s, and temperature at high temperature viscosity of 10 ^2.5 dPa s were evaluated. In addition, "N.A." in the table indicates not measured.

Density is measured using Archimedes' method.

The average coefficient of linear thermal expansion in the temperature range of 30 to 380° C., CTE _{30-380° C.} , is a value measured with a dilatometer.

Young's modulus refers to the value measured using the resonance method.

The strain point Ps, annealing point Ta, and softening point Ts are values measured based on the methods of ASTM C336 and C338.

The temperatures at high temperature viscosities of 10 ^4.0 dPa·s, 10 ^3.0 dPa·s, and 10 ^2.5 dPa·s are values measured by the platinum ball pull-up method.

As is clear from Tables 1 to 9, Samples Nos. 1 to 86 have an average linear thermal expansion coefficient CTE _{30-380°C in the temperature range of 30 to 380} °C of 33.2 x 10 ^{-7 /} °C to 48.0 x 10 ^-7 /°C and a Young's modulus of 80.0 to 101.2 GPa, and are therefore considered to be suitable as supporting glass substrates. On the other hand, Sample No. 87 has an average linear thermal expansion coefficient CTE _{30-380°C in the temperature range of 30 to 380°C} of 35 x 10 ^-7 /°C, but a Young's modulus of 76 GPa, and is therefore considered to be unsuitable as a supporting glass substrate.

Next, the glass substrates of Samples No. 1 to 86 were processed to a diameter of 300 mm and a thickness of 0.8 mm, and both surfaces were polished by a polishing device. Specifically, both surfaces of the glass substrate were sandwiched between a pair of polishing pads with different outer diameters, and both surfaces of the glass substrate were polished while rotating the glass substrate and the pair of polishing pads. During the polishing process, the glass substrate was controlled so that a part of the glass substrate occasionally protruded from the polishing pad. The polishing pads were made of urethane, the average particle size of the polishing slurry used during the polishing process was 2.5 μm, and the polishing speed was 15 m/min. The total thickness deviation (TTV) and the amount of warping of each of the polished glass substrates obtained were measured using SBW-331ML/d manufactured by Kobelco Research Institute Co., Ltd. As a result, the total thickness deviation (TTV) was 0.45 μm, and the amount of warping was 35 μm.

REFERENCE SIGNS LIST 1, 27, 30 Laminated substrate 10, 26, 31 Support glass substrate 11, 24, 34 Processed substrate 12, 32 Peel layer 13, 21, 25, 33 Adhesive layer 20 Support member 22, 35 Semiconductor chip 23 Sealing material 28 Wiring 29 Solder bump 36 Polishing device 37 Ultraviolet light

Claims (9)

A supporting glass substrate used for supporting a processed substrate having a semiconductor chip molded in a resin, the supporting glass substrate containing, in mass %, 50-66% SiO ₂ , 7-34% Al ₂ O ₃ , 0-8% B ₂ O ₃ , 0-22% MgO, 1-15% CaO, and 1-20 % Y ₂ O ₃ +La ₂ O ₃ +ZrO ₂ , an average linear thermal expansion coefficient in a temperature range of 30 to 380°C of 30×10 ^-7 /°C or more and 55×10 ^-7 /°C or less, and a Young's modulus of 80 GPa or more. The supporting glass substrate according to claim 1, characterized in that the total thickness variation (TTV) is less than 2.0 μm. The supporting glass substrate according to claim 1 or 2, characterized in that the glass composition contains, in mass %, 50 to 66% SiO ₂ , 7 to 34% Al ₂ O ₃ , 0 to 8% B ₂ O ₃ , 0 to 22% MgO, 1 to 15% CaO, and 1 to 15 % Y ₂ O ₃ . 4. The supporting glass substrate according to claim 1, which is used in a manufacturing process of a semiconductor package. A laminated substrate comprising at least a processed substrate and a supporting glass substrate for supporting the processed substrate, the supporting glass substrate being the supporting glass substrate according to any one of claims 1 to 4. The laminated substrate according to claim 5, characterized in that the processed substrate is a processed substrate in which a semiconductor chip is molded in resin. A step of preparing a laminated substrate including at least a processed substrate and a supporting glass substrate for supporting the processed substrate;
A method for manufacturing a semiconductor package, comprising: a step of performing a processing treatment on a processing substrate, and wherein the supporting glass substrate is the supporting glass substrate according to any one of claims 1 to 4. The method for manufacturing a semiconductor package according to claim 7, characterized in that the processing step includes a step of wiring one surface of the processing substrate. The method for manufacturing a semiconductor package according to claim 7 or 8, characterized in that the processing step includes a step of forming solder bumps on one surface of the processing substrate.