JP6504962B2 - Power semiconductor device - Google Patents

Description

  The present invention relates to a power semiconductor device used in all situations from power generation / transmission to efficient energy utilization / regeneration.

  Power modules (power semiconductor devices) are spreading to all products from industrial equipment to home appliances and information terminals, and high reliability is required for modules mounted on transportation equipment such as automobiles and railways, achieving miniaturization In order to do so, high heat dissipation is required. At the same time, it is also required to be a package form that can be applied to wide band gap semiconductors such as SiC semiconductors that are likely to become mainstream in the future, in terms of high operating temperature and excellent efficiency.

  A power semiconductor device generates a large amount of heat to handle a high voltage and a large current, and often uses a ceramic substrate excellent in thermal conductivity as an insulating substrate for the purpose of efficiently discharging heat. The ceramic substrate has a structure in which a conductor layer is attached to both sides of a base material such as alumina or AlN, and an aluminum conductor layer is often used for weight reduction as a power module used for transportation equipment such as automobiles. However, since aluminum causes recrystallization at around 200 ° C., there is a problem that coarsening of the aluminum crystal and cracking of grain boundaries are likely to occur by high temperature operation. The thermal deformation of the aluminum may cause voids in the solder of the die bonding portion, or may cause deformation or cracking of the power semiconductor element itself.

  In Patent Document 1, an intermediate plate having a protrusion is embedded in the solder of the die bonding portion of the power semiconductor device to secure the thickness of the solder of the die bonding portion to suppress the influence on the power semiconductor device due to the thermal stress. Methods have been proposed.

Unexamined-Japanese-Patent No. 2002-217364

  According to the method described in Patent Document 1, it is possible to suppress the influence of thermal deformation of the aluminum conductor layer by sandwiching the intermediate plate having the projections, but it becomes difficult for air bubbles generated during soldering to come off As a result, it remains as a void, which may cause thermal runaway due to thermal resistance.

  The present invention has been made to solve the above-described problems, and it is an object of the present invention to obtain a power semiconductor device in which voids remaining in a bonding material such as solder are suppressed.

  The present invention relates to a power semiconductor device in which an element fixing surface which is one surface of a semiconductor element is fixed to a substrate fixing surface which is one surface of a substrate by a bonding material. The intermediate plate is inserted such that the intermediate plate is inclined with respect to the surface and the surface facing the element fixing surface is inclined with respect to the element fixing surface.

  According to the present invention, by inserting the inclined intermediate plate, the thickness of the upper and lower bonding material layers of the intermediate plate becomes gradually thicker toward the outer periphery, and the air bubbles generated in the bonding material are discharged. It becomes easy and can suppress generation | occurrence | production of a void.

FIG. 1 is a side sectional view showing a schematic configuration of a power semiconductor device according to a first embodiment of the present invention. FIG. 1 is a top view showing a schematic configuration of a power semiconductor device according to a first embodiment of the present invention from which a direct potting sealing resin is removed. FIG. 1 is a cross-sectional view showing a configuration of an intermediate plate of a power semiconductor device according to a first embodiment of the present invention. FIG. 1 is a top view showing a configuration of an intermediate plate of a power semiconductor device according to a first embodiment of the present invention. FIG. 7 is a first view showing a manufacturing process of the power semiconductor device according to the first embodiment of the present invention. FIG. 7 is a second view showing the manufacturing process of the power semiconductor device according to the first embodiment of the present invention. FIG. 7 is a third diagram illustrating the manufacturing process of the power semiconductor device according to the first embodiment of the present invention. FIG. 14 is a fourth diagram showing the manufacturing process of the power semiconductor device according to the first embodiment of the present invention. FIG. 14 is a fifth diagram illustrating the manufacturing process of the power semiconductor device according to the first embodiment of the present invention. It is sectional drawing for demonstrating the effect of the middle plate of the semiconductor device for electric power of this invention. It is a perspective view which shows the structure of the intermediate plate of the semiconductor device for electric power by Embodiment 2 of this invention. FIG. 10 is a top view showing a configuration of an intermediate plate of the power semiconductor device according to Embodiment 2 of the present invention. It is side surface sectional drawing corresponding to CC position of FIG. 12 which shows schematic structure of the principal part of the semiconductor device for electric power by Embodiment 2 of this invention. It is side surface sectional drawing corresponding to the DD position of FIG. 12 which shows schematic structure of the principal part of the semiconductor device for electric power by Embodiment 2 of this invention. It is side surface sectional drawing which shows schematic structure of the semiconductor device for electric power by Embodiment 2 of this invention. It is side surface sectional drawing which shows schematic structure of the semiconductor device for electric power by Embodiment 3 of this invention.

Embodiment 1
FIG. 1 is a side sectional view showing a configuration of a power semiconductor device according to a first embodiment of the present invention, and FIG. 2 is a top view showing a direct potting sealing resin to be described later. Substrate 11 (made of AlN, 40 mm x 25 mm x thickness 0.635 mm, hereinafter also referred to as ceramic substrate 11) on which circuit conductor layer 13 is formed on the front surface and back surface conductor layer 12 (both aluminum and pattern thickness 0.4 mm) is formed on the rear surface. A diode 21 (15 mm × 15 mm × 0.3 mm thickness) and an IGBT (Insulated Gate Bipolar Transistor) 22 are bonded to the circuit conductor layer 13 of the circuit conductor layer 13 by a die bonding portion 31. The surface of the circuit conductor layer 13 to which the power semiconductor element is fixed is referred to as a substrate fixing surface. Further, the surface of the power semiconductor element to be bonded to the circuit conductor layer 13 is referred to as an element fixing surface. The die bonding portion 31 has a configuration in which an intermediate plate 90 is inserted into solder which is a bonding material. A case 51 (made of PPS resin, 48 mm × 28 mm × 12 mm high) is fixed to the ceramic substrate 11 using an adhesive 8 (made of silicone), and the inside of the case 51 is entirely sealed with a direct potting sealing resin 7 It has been stopped.

  In the case 51, two main terminals for connection to the outside (the width of the screw terminal portion at the top of the case is 10 mm) are arranged, and the tip of one main terminal 61 is about 2 mm from the ceramic substrate 11 in the case. It floats and is connected to the main circuit electrode 211 of the diode and the main circuit electrode 221 (source electrode) of the IGBT by the solder 32. The screw terminal 612, which is the other main terminal, is directly soldered to the circuit conductor layer 13 of the ceramic substrate 11 and connected to the drain electrode of the IGBT 22. The signal terminal 62 (width 1.5 mm) provided in the case 51 is connected to the control electrode 222 (gate electrode, temperature sensor electrode, etc.) of the IGBT 22 by the wire 4.

  3 and 4 are conceptual views of the intermediate plate 90 according to Embodiment 1 of the present invention. FIG. 3 is a cross-sectional view, and FIG. 4 is a top view. As shown in FIGS. 3 and 4, the intermediate plate 90 is a copper plate material (oxygen-free copper C1020, 15 mm × 15 mm × 0.2 mm), and the protrusions 91 and 92 are formed by pressing. The upper surface projection 91 is composed of 91H having a height of 0.2 mm and 91 L having a height of 0.1 mm, 91H being arranged on the right side and 91L being arranged on the left side. On the other hand, in the lower surface protrusion 92, 92H having a height of 0.2 mm is arranged on the left side, and 92L having a height of 0.1 mm is arranged on the right side. As described above, the intermediate plate 90 having a plurality of projections of different heights formed on one side and a plurality of projections of different heights formed on the other side is the main circuit electrode of the diode 21 or IGBT 22 which is a power semiconductor element. The intermediate plate 90 is installed obliquely to the substrate fixing surface of the ceramic substrate 11 and the element fixing surface of the power semiconductor element by being inserted into the bonding material for bonding the electrode and the ceramic substrate 11. Become.

  5-9 is a figure explaining the process of the power module by Embodiment 1. FIG. As shown in FIG. 5, a diode 21 (15 mm × 15 mm × thickness) is formed on a ceramic substrate 11 (made of AlN, 40 mm × 25 mm × 0.635 m thickness, 0.4 mm thick for the back surface conductor layer 12 and the circuit conductor layer 13). And an IGBT (Insulated Gate Bipolar Transistor) 22 is mounted by soldering. At this time, two pieces of solder 30 having a thickness of 0.15 mm are mounted on both sides of the intermediate plate 90 and soldered using a reflow furnace to form a solder die bonding portion 31 as shown in FIG. In this manner, in the solder die bond portion 31, in the solder which is the bonding material, the surface facing the substrate fixing surface of the intermediate plate 90 is inclined to the substrate fixing surface, and the surface facing the element fixing surface is device fixing The structure is inserted at an angle to the surface.

  Next, as shown in FIG. 7, the case 51 (made of PPS resin, 48 mm × 28 mm × 12 mm in height) is fixed to the ceramic substrate 11 using the adhesive 8 (made of silicone), and the gap is filled to seal the direct potting seal. Leakage of the stop resin 7 is prevented. As shown in FIG. 8, a main terminal 61 having a screw terminal 611 formed on the outer periphery of the case is insert molded in the case 51, and is used as a source electrode and a drain electrode of a power semiconductor device such as a diode 21 or IGBT 22. It is connected by a solder 32 to an electrode through which current flows. Further, the signal electrode 62 formed in the case is electrically connected to the gate electrode of the IGBT 22, temperature sensor electrode, etc. by a wire (φ 0.15 mm made of aluminum) 4 respectively. Finally, as shown in FIG. 9, direct potting sealing resin 7 is poured in a heated state at 60 ° C., vacuum degassing and heating (100 ° C., 1.5 hours → 140 ° C., 1.5 hours) It is cured to complete the sealing, and the power module is completed.

  As shown in FIG. 6, the intermediate plate 90 is present in the solder die bond portion 31 with a slope due to the effect of the protrusions having different heights. In FIG. 6, the solder between the power semiconductor element and the middle plate is thinner on the left and thicker on the right. On the other hand, the solder between the middle plate and the ceramic substrate is thicker on the left and thinner on the right. As described above, it is considered that when the thickness of the solder is continuously changing and the thicker one is in contact with the outside, air bubbles generated in the solder are easily discharged to the outside.

  The discharge mechanism, that is, the movement principle of the void in the solder will be described. According to the literature “Experiment on bubble behavior in a horizontal narrow rectangular flow path” (The Proceedings of the Japan Society of Mechanical Engineers, Volume B, vol. 61, No. 581, 1995, pp. 201-207) The gas in the liquid may move to the larger cross section of the liquid by the action of surface tension. FIG. 10 is a diagram showing the behavior of voids in the solder of varying thickness, showing the solder 30 between the intermediate plate 90 and the circuit conductor layer 13 of the ceramic substrate 11. The solder 30 has a thickness gradually increasing from the right to the left, and when the vaporization component is released from the solder or the metallized layer of the power semiconductor element, a void is generated and a plurality of voids are connected to increase the intermediate plate The void 390 has a flat shape by being sandwiched between 90 and the circuit conductor layer 13. Eventually, the void 390 moves to a larger solder thickness to become a near spherical void 391 so that it can be shaped close to a small surface area sphere. When a plurality of voids 391 gather, they become flat in the end and eventually move. It is possible to reduce the void by repeatedly discharging the void to the outside. At this time, by using the reduced pressure reflow furnace, not only the void becomes smaller at the time of pressure recovery but also the above movement becomes easy because the void becomes larger at the time of pressure reduction. The same thing happens between the power semiconductor element and the intermediate plate 90, although the right and left are reversed, and the void is discharged to the right.

  Here, copper is used as the intermediate plate 90, but when the material of the circuit conductor layer 13 which is the substrate fixing surface is aluminum, the melting point is higher than that of aluminum, the hardness is high, and solderability can be ensured. The same effect can be obtained with metals, alloys such as Kovar or 42 alloy, or titanium and ceramic plates plated with nickel and gold. When the material of the circuit conductor layer 13 is copper, the heat resistance can be further improved by using a material having a higher melting point and a higher hardness as the material of the intermediate plate 90, but the same copper as the circuit conductor layer 13 Even in the case, the effect of reducing the void can be obtained. Further, in order to reduce the thermal stress generated between the substrate fixing surface and the semiconductor element, the linear expansion coefficient of the intermediate plate 90 is preferably a material having a smaller linear expansion coefficient than the material of the substrate fixing surface.

  The method of forming the projections 91 and the projections 92 is not limited to the press processing, and the same effect can be obtained even if the projections are formed by forming the projections by wire bonding or bending a part of the intermediate plate.

  The material of the ceramic substrate is not limited to AlN, and the same effect can be obtained with ceramic materials such as alumina and SiN. Furthermore, when heat dissipation is not required to a large extent, it is also possible to use a glass epoxy substrate or the like. In addition, by using a metal substrate having both functions of a base plate and a ceramic substrate as the substrate, the number of parts can be reduced, and weight reduction and miniaturization can be achieved. The material of the case is not limited to PPS, and LCP (liquid crystal polymer) or the like can be used. In addition, although the diode and IGBT have been shown to have a module configuration with one pair of 1 in 1, even if there are two pairs of 2 in 1 and 6 pairs of 6 in 1, by arranging the signal terminal on the metal plate to be the main terminal The same effect is obtained. In addition, although the main terminal 61 of the copper plate is used to connect to the power semiconductor element using solder, the same is true even if the screw terminal 611 and the power semiconductor element are connected by wire bonding. An effect is obtained. Further, although a wire bond made of aluminum is used here, the same effect can be obtained by using a copper wire, an aluminum-coated copper wire, or a gold wire. The same effect can be obtained by using a ribbon bond or by using a bus bar or the like for ultrasonically bonding a metal plate. Further, as to the direct potting sealing resin, the same effect can be obtained even if it is of a type in which it is poured and cured at room temperature. For example, silicone gel or epoxy resin can be used.

  In the above, although the thing using solder as a joining material which connects a semiconductor element for electric power and a ceramic substrate was explained, the conductive adhesive which made Ag filler disperse in an epoxy resin, and Ag nano powder which carries out low temperature baking of nanoparticles. Even in the case of using Cu nanopowder or the like, the same effect as that of the solder can be expected when a void occurs.

Second Embodiment
11 to 14 are conceptual diagrams showing the configuration of the intermediate plate of the power semiconductor device according to the second embodiment. FIG. 11 is a perspective view, and FIG. 12 is a top view. As shown in FIGS. 11 and 12, the intermediate plate 95 is a copper plate material (oxygen-free copper C1020, 15 mm × 15 mm × 0.2 mm), and is pressed to connect the center of the mountain fold (diagonal) and valley fold (each side) ) Are alternately formed every 45 degrees. Mountain folds and valley folds need to be formed alternately, but they need not necessarily be formed every 45 degrees; for example, they may be formed more than four, such as every 30 degrees .

  13 and 14 are enlarged views of a solder die bonding portion of the power module according to the second embodiment. 13 shows a C-C cross section of FIG. 12, and FIG. 14 shows a D-D cross section. As shown in FIGS. 11 to 14, in the intermediate plate 95 according to the second embodiment, mountain folds and valley folds are alternately formed radially from the central portion to the peripheral portion of the plate material, and It has a shape having a plurality of inclined planes. Further, as shown in FIGS. 13 and 14, in the intermediate plate 95 of the second embodiment, as in the intermediate plate 90 of the first embodiment, the surface facing the substrate fixing surface is inclined relative to the substrate fixing surface. The element is inserted into the bonding material so that the surface facing the element fixing surface is inclined with respect to the element fixing surface.

  In the cross section of FIG. 13, the air bubbles generated between the power semiconductor element 21 and the intermediate plate 95 move to the outer peripheral portion with a large solder thickness and are discharged. On the other hand, air bubbles generated between the intermediate plate 95 and the ceramic substrate 11 once gather at the center, but in the cross section rotated 45 degrees as shown in the cross section of FIG. Because the thickness of the solder is larger, the bubbles collected in the center are discharged to the outside soon. That is, air bubbles generated in the upper and lower solder layers of the intermediate plate are discharged to the outside through one of the paths. Slightly small air bubbles may remain in the center of the lower part of the intermediate plate, but they are considered to be almost negligible as thermal resistance because they are far from the surface of the power semiconductor element 21 from which heat is generated.

  Here, copper is used as the intermediate plate 95, but if the material of the circuit conductor layer 13 which is the substrate fixing surface is aluminum, the melting point is higher than that of aluminum, the hardness is high, and solderability can be ensured. The same effect can be obtained with metals, alloys such as Kovar or 42 alloy, or titanium and ceramic plates plated with nickel and gold. When the material of the circuit conductor layer 13 is copper, the heat resistance can be further improved by using a material having a higher melting point and a higher hardness as the material of the intermediate plate 90, but the same copper as the circuit conductor layer 13 Even in the case, the effect of reducing the void can be obtained. Further, in order to reduce the thermal stress generated between the substrate fixing surface and the semiconductor element, it is preferable that the intermediate plate have a linear expansion coefficient smaller than that of the material of the substrate fixing surface.

  FIG. 15 is a cross-sectional view showing the configuration of the power semiconductor device according to the second embodiment. The method of manufacturing the power semiconductor device according to the second embodiment is the same as the method of manufacturing the power semiconductor device according to the first embodiment. A diode 21 (15 mm × 15 mm × 0.3 mm thickness) and an IGBT 22 on a ceramic substrate 11 (AIN 40 mm × 25 mm × 0.635 m thickness, 0.4 mm thick pattern of the back surface conductor layer 12 and the circuit conductor layer 13) Is mounted by solder. At this time, two pieces of solder having a thickness of 0.15 mm are mounted so as to sandwich the intermediate plate 95, and soldered using a reflow furnace to form the solder die bonding portion 31.

  Next, the case 51 (made of PPS resin, 48 mm × 28 mm × 12 mm high) is fixed to the ceramic substrate 11 using the adhesive 8 (made of silicone), and the gap is filled to leak the direct potting sealing resin 7. It is preventing. In the case 51, a main terminal 61 having a screw terminal 611 formed on the outer periphery of the case is insert-molded, and an electrode through which a large current flows such as a source electrode and a drain electrode of a power semiconductor element such as a diode 21 or IGBT 22 It is connected by solder 32. Further, the signal terminal 62 formed in the case 51 is electrically connected to the gate electrode of the IGBT, the temperature sensor electrode, and the like by a wire (φ 0.15 mm made of aluminum) 4. Finally, direct potting sealing resin 7 is poured in a heated state at 60 ° C., vacuum degassing and heating (100 ° C., 1.5 hours → 140 ° C., 1.5 hours) to cure and seal Complete and complete the power module.

  The material of the ceramic substrate is not limited to AlN, and the same effect can be obtained with ceramic materials such as alumina and SiN. Furthermore, when heat dissipation is not required to a large extent, it is also possible to use a glass epoxy substrate or the like. In addition, by using a metal substrate having both functions of a base plate and a ceramic substrate as the substrate, the number of parts can be reduced, and weight reduction and miniaturization can be achieved. The material of the case is not limited to PPS, and LCP (liquid crystal polymer) or the like can be used. Also, although the module configuration in which the diode and the IGBT are 1 pair of 1 in 1 is shown, even if it is 2 pairs of 2 in 1 and 6 pairs of 6 in 1, similar signal can be arranged by arranging the signal terminal on the metal plate as the main terminal. An effect is obtained. In addition, although the main terminal 61 of the copper plate is used to connect to the power semiconductor element using solder, the same effect can be obtained by connecting the screw terminal 611 and the power semiconductor element by wire bonding. . Further, although a wire bond made of aluminum is used here, the same effect can be obtained by using a copper wire, an aluminum-coated copper wire, or a gold wire. The same effect can be obtained by using a ribbon bond or by using a bus bar or the like for ultrasonically bonding a metal plate. Further, as to the direct potting sealing resin, the same effect can be obtained even if it is of a type in which it is poured and cured at room temperature.

  In the above, although the thing which used the solder for the joining material which connects the semiconductor element for electric powers and a ceramic substrate was demonstrated, the conductive adhesive which disperse | distributed Ag filler to the epoxy resin, Ag nano powder which carries out low temperature baking of nanoparticles. Even in the case of using Cu nanopowder or the like, the same effect as that of the solder can be expected when a void occurs.

Third Embodiment
FIG. 16 is a cross sectional view showing a schematic configuration of the power semiconductor device according to the third embodiment. A diode 21 (15 mm × 15 mm × 0.3 mm thickness) and an IGBT 22 on a ceramic substrate 11 (made of AlN, 40 mm × 25 mm × 0.635 mm thickness, 0.4 mm thickness pattern of the back surface conductor layer 12 and the circuit conductor layer 13) Is mounted by solder. At this time, two pieces of solder 30 having a thickness of 0.15 mm are mounted so as to sandwich the intermediate plate 90, and soldered using a reflow furnace to form the solder die bonding portion 31. Here, it goes without saying that the intermediate plate may be the intermediate plate 95 shown in the second embodiment.

  Next, the main lead frame 63 and the signal terminal lead frame 64 are positioned on the ceramic substrate, and the main lead frame 63 is an electrode and solder 32 through which a large current flows such as a source electrode and a drain electrode of a power semiconductor element such as a diode 21 or IGBT 22. Connected by Further, the signal terminal lead frame 64 is electrically connected to the gate electrode of the IGBT, the temperature sensor electrode, etc. by the wire (φ 0.15 mm made of aluminum) 4 respectively.

  Finally, transfer mold sealing resin 74 is poured into a mold and cured to complete sealing, and the power module is completed. Although a transfer mold resin is used as the sealing resin here, the same effect can be obtained by using a low pressure forming resin.

  As described above, the intermediate plate described in the first and second embodiments may be applied to a power semiconductor device insulated and sealed by a transfer mold sealing resin or a low voltage forming resin without using a case. it can. It goes without saying that the air bubbles generated in the bonding material are easily discharged as in the first embodiment and the second embodiment, and the generation of the void can be suppressed.

  The present invention is high when applied to a power semiconductor device for mounting a power semiconductor device using, for example, silicon carbide (SiC), which is a wide band gap semiconductor material capable of high temperature operation, as a power semiconductor device. This is particularly effective because a circuit of current density can be formed. Other wide band gap semiconductor materials include gallium nitride-based materials and diamond.

  The present invention is not limited to the configurations and operations of the respective embodiments described above, and the respective embodiments may be combined or the respective embodiments may be appropriately modified or omitted within the scope of the present invention. It is possible.

11 ceramic substrate (substrate), 12 back conductor layer, 13 circuit conductor layer, 21 diode (power semiconductor element), 22 IGBT (power semiconductor element), 30 solder, 31 solder die bond portion, 32 solder joint portion, 4 aluminum Wire bond, 51 case, 61 main terminal, 611, 612 screw terminal, 62 signal terminal, 63 main lead frame, 64 signal terminal lead frame, 7 direct potting sealing resin, 74 transfer mold sealing resin, 8 adhesive, 90, 95 Intermediate plate

Claims (9)

In a power semiconductor device in which an element fixing surface which is one surface of a power semiconductor element is fixed to a substrate fixing surface which is one surface of a substrate by a bonding material,
A plurality of projections of different heights are formed on one side of the bonding material, and an intermediate plate having a plurality of projections of different heights formed on the other side is inserted, and the intermediate plate is fixed to the substrate fixing surface A power semiconductor device characterized in that the facing surface is inclined with respect to the substrate fixing surface, and the surface of the intermediate plate facing the element fixing surface is inclined with respect to the element fixing surface. In a power semiconductor device in which an element fixing surface which is one surface of a power semiconductor element is fixed to a substrate fixing surface which is one surface of a substrate by a bonding material,
In the bonding material , mountain folds and valley folds are alternately formed radially from the central portion to the peripheral portion of the plate material, and an intermediate plate having a shape having a plurality of planes inclined with respect to the substrate fixing surface is inserted. A surface of the intermediate plate facing the substrate fixing surface is inclined with respect to the substrate fixing surface, and a surface of the intermediate plate facing the element fixing surface is inclined with respect to the element fixing surface. Power semiconductor device characterized in that. The power semiconductor device according to claim 1 or 2, wherein the bonding material is solder. The power semiconductor device according to any one of claims 1 to 3 , wherein at least a surface of the intermediate plate is formed of a metal material. The power semiconductor device according to claim 4 , wherein a material of the substrate fixing surface is aluminum, and the intermediate plate is formed of a material having a melting point higher than that of aluminum. The power semiconductor device according to claim 4 , wherein a material of the substrate fixing surface is aluminum, and the intermediate plate is formed of a material having a hardness higher than that of aluminum. 5. The power semiconductor device according to claim 4 , wherein the intermediate plate is formed of a material having a smaller linear expansion coefficient than a material of the substrate fixing surface. The power semiconductor device according to any one of claims 1 to 7 , wherein the power semiconductor element is formed of a wide band gap semiconductor. 9. The power semiconductor device according to claim 8 , wherein the wide band gap semiconductor is a semiconductor of silicon carbide, gallium nitride based material or diamond.