JP6574157B2 - Stretchable single crystal silicon for high performance electronics on rubber substrates - Google Patents

Description

Background of the Invention

  [001] Since the first printed pure polymer transistor was demonstrated in 1994, tremendous interest has been directed to a new class of potential electronic systems with flexible integrated electronic devices on plastic substrates. It was. (Garnier, F., Hajlauui, R., Yassar, A., and Srlvasta, P., “Science”, Vol. 265, pp. 1684-1686) In recent years, considerable research has been conducted on conductors for flexible plastic electronic devices. It has been directed to develop processable materials that will be new solutions for dielectric and semiconductor devices. However, advances in the field of electronics are not only the development of processable materials for new solutions, but also new device component geometries, efficient device and device component processing methods, and high resolution patterning applicable to plastic substrates. It is also promoted by technology. Such materials, device configurations and fabrication methods are expected to play an indispensable role in new types of flexible integrated electronic devices, systems and circuits that are rapidly emerging.

  [002] Interest in the field of flexible electronics arises from several important advantages brought about by this technology. First, the mechanical durability of the plastic substrate material provides an electronic device that is independent of damage and / or electronic performance degradation due to mechanical stress. Second, the inherent flexibility of these substrate materials allows them to be integrated into many shapes that result in many useful device configurations that are not possible with conventional fragile silicon-based electronic devices. Finally, the combination of processable component materials and plastic substrates as a solution enables fabrication by continuous high-speed printing technology that can produce electronic devices over large substrate areas at low cost.

  [003] However, the design and fabrication of flexible electronic devices that exhibit good electronic performance presents a number of important challenges. First, well-developed conventional silicon-based electronic devices are not compatible with most plastic materials. For example, traditional high quality inorganic semiconductor components such as single crystal silicon or germanium semiconductors are typically processed by growing thin films at temperatures well above the melting or pyrolysis temperature of most plastic materials (above 1000 ° C.). Is done. In addition, most inorganic semiconductors are essentially insoluble in convenient solvents that allow solution-based processing and delivery. Second, many amorphous silicon, organic or hybrid organic-inorganic semiconductors are adapted to be incorporated into plastic substrates and can be processed at relatively low temperatures, but these materials allow for good electronic performance It has no electronic properties that can provide an integrated electronic device. For example, thin film transistors having semiconductor elements made of these materials exhibit field effect mobility that is approximately three orders of magnitude less than complementary single crystal silicon-based devices. As a result of these constraints, at present, flexible electronic devices are limited to specific applications that do not require high performance such as switching elements for light-emitting diodes and switching elements for active matrix flat panel displays with non-luminescent pixels. .

  [004] Recently, progress has been made in extending the electronic performance capabilities of integrated electronic devices on plastic substrates to expand their applicability to a wider range of electronic applications. For example, new thin film transistor (TFT) designs have emerged that are compatible with processing on plastic substrate materials and that exhibit significantly higher device performance characteristics than thin film transistors having amorphous silicon, organic or hybrid organic-inorganic semiconductor elements. One type of high performance flexible electronic device is based on a polycrystalline silicon thin film semiconductor device fabricated by pulsed laser annealing of an amorphous silicon thin film. Although this type of flexible electronic device provides advanced device electronic performance characteristics, the use of pulsed laser annealing limits the ease and flexibility of fabricating such devices, resulting in significant cost increases. Another promising new class of high performance flexible electronic devices used solution-processable nanoscale materials such as nanowires, nanoribbons, nanoparticles and carbon nanotubes as active functional components in many macroelectronic and microelectronic devices It is a device.

[005] Discrete single crystal nanowires or nanoribbons have been evaluated as a possible means of providing printable electronic devices on plastic substrates that exhibit advanced device performance characteristics. Duan et al. Describe thin film transistor designs with multiple selectively oriented single crystal silicon nanowires or CdS nanoribbons as semiconductor channels (Duan, X., Niu, C., Sahl, V., Chen, J , Parce, J., Empedocles, S. and Goldman, J., “Nature” Vol. 425, pages 274-278). The authors have found that single crystal silicon nanowires or CdS nanoribbons having a thickness of 150 nanometers or less are dispersed in a solution and assembled on the surface of the substrate using a flow-directed placement method to produce thin film transistors. A fabrication process that is said to be compatible with solution processing on plastic substrates is reported. Optical micrographs provided by the authors suggest that the disclosed fabrication process creates single layer nanowires or nanoribbons spaced approximately 500 to about 1000 nanometers in a generally parallel direction. The authors have reported a relatively high intrinsic field effect mobility for individual nanowires or nanoribbons (≈119 cm ² V ⁻¹ s ⁻¹ ), but recently, the overall device field effect mobility is Duan. Is calculated as “approximately 2 orders of magnitude smaller than the intrinsic field effect mobility value reported by M. et al.” (Mitzi, DB, Kosbar, LL, Murray, CE, Copel, M. Afzali). , A., “Nature” Vol. 428, pp. 299-303). This device field effect mobility is several orders of magnitude smaller than the device field effect mobility of conventional single crystal inorganic thin film transistors, but this is a practical problem of alignment using the method and device configuration disclosed by Duan et al. It is thought to be due to discrete nanowires or nanoribbons that are in packaging and electrical contact.

[006] The use of nanocrystal solutions as precursors for polycrystalline inorganic semiconductor thin films has also been investigated as a possible means of providing printable electronic devices on plastic substrates that exhibit advanced device performance characteristics. Ridley et al. Discloses a solution processing fabrication method in which solution cadmium selenide nanocrystals having dimensions of 2 nanometers are processed at a plastic compatible temperature to provide a semiconductor device for a field effect transistor. (Ridley, BA, Nivi, B. and Jacobson, J.M., "Science" Vol. 286, p. 746-749, (1999)) The authors reported that low temperatures in cadmium selenide nanocrystal solutions. Report how particle growth gives single crystal regions containing hundreds of nanocrystals. Ridley et al. Report improved electronic properties for comparable devices with organic semiconductor elements, but the device mobility achieved by these approaches (≈1 cm ² V ⁻¹ s ⁻¹ ) is The device field effect mobility of the conventional single crystal inorganic thin film transistor is several orders of magnitude smaller. The limitation of field effect mobility achieved by Ridley et al. Device morphology and fabrication methods appears to arise from electrical contacts established between individual nanoparticles. In particular, the use of organic end groups to stabilize the nanocrystal solution and prevent agglomeration establishes the good electrical contact required to provide high device field effect mobility between adjacent nanoparticles. May also interfere.

  [007] Although Duan et al. And Ridley et al. Provide a method for fabricating thin film transistors on plastic substrates, the described device configurations are transistors comprising mechanically rigid device components such as electrodes, semiconductors and / or dielectrics. It is. Choosing a plastic substrate with good mechanical properties provides an electronic device that can perform in a bent or distorted orientation, but such deformation can reduce mechanical strain on individual rigid transistor device components. Is expected to occur. This mechanical strain can cause damage to individual components, for example by cracks, and can reduce or prevent electrical contact between device components.

  [008] In addition, plastic substrate-based electronic systems developed by Duan et al., Ridley et al. And others are required for many critical device applications including flexible sensor arrays, electronic paper, and wearable electronic devices. It is unclear whether it provides mechanical extensibility. While these groups demonstrate electronic devices that have the ability to withstand deformations due to bending, these plastic substrate-based systems can be used without noticeable damage, mechanical failure or significant degradation in device performance. It is not likely to stretch. Therefore, these systems are unlikely to be able to deform due to expansion or compression, or to deform conformally to undulating surfaces such as curved surfaces with high radii of curvature.

  [009] As noted above, advances in the field of flexible electronics are expected to play a very important role in many important emerging and existing technologies. However, the success of these applications of flexible electronics technology has led to new materials, device configurations, and devices for creating integrated electronic circuits that exhibit good electronic, mechanical, and optical properties in bent, deformed and curved shapes. It relies heavily on the continued development of commercially viable routes. In particular, high performance, mechanically extensible materials and device configurations need to exhibit useful electronic and mechanical properties in a stretched or contracted shape.

  [010] The present invention provides stretchable semiconductors, stretchable electronic devices, device components and circuits. As used herein, the term “stretchable” refers to materials, structures, devices, and device components that can withstand strain without fracture or mechanical failure. The stretchable semiconductor and electronic devices of the present invention are stretchable and thus can be stretched and / or compressed to at least some extent without damage, mechanical failure, or significant degradation of device performance. The stretchable semiconductors and electronic circuits of the present invention, which are preferred for some applications, are stretchable and flexible so that they can be significantly stretched, bent, curved or otherwise deformed along one or more axes. is there.

  [011] Useful stretchable semiconductor and electronic devices of the present invention can be stretched, compressed, distorted and / or expanded without mechanical failure. In addition, the stretchable semiconductors and electronic circuits of the present invention exhibit good electronic performance even when subjected to large strains such as strains of about 0.5% or more, preferably 1%, more preferably 2%. . Flexible stretchable semiconductors, stretchable electronic devices, device components and circuits exhibit good electronic performance even in bent, curved and / or deformed states. The stretchable semiconductor elements, stretchable electronic devices, device components and circuits of the present invention provide a wide range of device applications and devices to provide useful electronic properties and mechanical durability in bent, stretched, compressed or deformed device orientations. Suitable for device form.

  [012] The stretchable and / or flexible semiconductors of the present invention may optionally be printable, and may also be other structures, materials and / or devices such as dielectric materials and layers, electrodes and other semiconductor materials and layers. A composite semiconductor element having a semiconductor structure optionally connected to the component may optionally be provided. The present invention provides system level integration such as transistors, diodes, light emitting diodes (LEDs), organic light emitting diodes (OLEDs), lasers, micro and nano electromechanical devices, micro and nano fluidic devices, memory devices, and complementary logic circuits. It includes a wide range of stretchable and / or flexible electronic and / or optoelectronic devices with stretchable and / or flexible semiconductors, including but not limited to circuitry.

  [013] In one aspect, the present invention provides a stretchable semiconductor element that provides useful functional properties in a bent, expanded, compressed, curved and / or deformed state. In this specification, the expressions “semiconductor element” and “semiconductor structure” are used synonymously in this description, and in a broad sense, refer to any semiconductor material, composition, or structure, and include high-quality single crystals and polycrystalline semiconductors. Non-semiconductor components such as semiconductor materials made by high temperature processing, doped semiconductor materials, organic and inorganic semiconductors and one or more additional semiconductor components and / or dielectric layers or materials and / or conductor layers or materials Explicitly includes composite semiconductor materials and structures.

  [014] The stretchable semiconductor element of the present invention comprises a flexible substrate having a support surface and a semiconductor structure having a curved inner surface, eg, a curved inner surface provided by a curved form of the semiconductor structure. . In this embodiment, at least a portion of the curved inner surface of the semiconductor structure is bonded to the support surface of the flexible substrate. An exemplary semiconductor structure having a curved inner surface useful in the present invention comprises a curved structure. In the context of this description, a “curved structure” refers to a structure having a curved shape that is generated by applying a force. The curved structure in the present invention can have one or more folded regions, convex regions, and / or concave regions. Curved structures useful in the present invention are provided, for example, in a coiled form, a wrinkled form, a buckled form and / or a wavy (ie, corrugated) form.

  [015] Curved structures such as stretchable curved semiconductor structures and electronic circuits having a curved inner surface can be bonded to flexible substrates such as polymers and / or elastic substrates, with the curved structures being distorted . In certain embodiments, a curved structure, such as a curved ribbon structure, has a strain of about 30% or less, in some preferred embodiments for strains of about 10% or less, and / or in some preferred embodiments for some applications. Some have received distortions of less than 10%. In some embodiments, a curved structure, such as a curved ribbon structure, is subjected to a strain selected from a range of about 1% to about 30%.

  [016] In a useful embodiment, a semiconductor structure having a curved inner surface includes a transportable semiconductor element that is at least partially coupled to a supporting flexible substrate. In the context of the present description, a “transportable semiconductor element” is a semiconductor structure that can be transported from a donor surface to a receiving surface, for example, by deposition techniques, printing techniques, patterning techniques and / or other material transfer methods. Transportable semiconductor elements, compositions and devices useful in the present method include, but are not limited to, printable semiconductor elements.

  [017] Useful flexible substrates include, but are not limited to, polymer substrates, plastic substrates, and / or elastic substrates. In one embodiment, for example, the present invention includes a transportable and optionally printable semiconductor element that can be transported and bonded to a pre-strained elastic substrate. Useful transport methods in this aspect of the invention include printing techniques such as contact printing or solution printing. Subsequently, the elastic substrate is relaxed to cause distortion on the transportable and possibly printable semiconductor element, for example, to form a curved inner surface by bending and / or buckling of the semiconductor element.

  [018] In one embodiment, a semiconductor device having a curved surface is fabricated (eg, as described above), and subsequently from an elastic substrate used to generate the curved inner surface to another flexible substrate. It is transferred and bonded to this other flexible substrate. Useful embodiments of this aspect of the invention include ribbons, wires, strips, disks, platelets, blocks, posts with curved inner surfaces that are wrinkled, buckled and / or corrugated. Or a transportable and optionally printable semiconductor structure including a cylinder. However, the present invention includes a stretchable semiconductor in which the semiconductor element is not applied to the flexible substrate by printing means and / or the semiconductor element is not printable.

  [019] The present invention includes a stretchable semiconductor comprising a semiconductor element having a curved inner surface supported by a flexible substrate. Alternatively, the present invention includes a stretchable semiconductor including a plurality of stretchable semiconductor elements having a curved inner surface supported by a single flexible substrate. Embodiments of the present invention include an array or pattern of stretchable semiconductor elements having a curved inner surface supported by a single flexible substrate. In some cases, the array or pattern of stretchable semiconductor elements has a well-defined and pre-selected physical dimension, arrangement, and relative spatial orientation.

  [020] The present invention includes one or more stretchable semiconductor structures and additional integrated device components such as electrical contacts, electrodes, conductor layers, dielectric layers, and / or additional semiconductor layers (eg, doped layers, Also includes stretchable electronic devices, device components and / or circuits comprising PN junctions). In this embodiment, the stretchable semiconductor structure and additional integrated device components are operably coupled to provide selected device functionality, but may be in electrical contact or isolated from each other. In useful embodiments, at least some or all additional integrated device components (and stretchable semiconductors) have a curved inner surface supported by the support surface of the flexible substrate, eg, coiled, corrugated, buckled And / or a curved structure, which is a curved structure having a wrinkled form. The additional integrated device component and the curved inner surface of the stretchable semiconductor can have approximately the same or different profile. The present invention includes embodiments in which stretchable device components are interconnected by metal interconnects or corrugated, wrinkled, curved and / or buckled metal interconnects that exhibit intrinsic stretchability. .

  [021] In some embodiments, the curved inner surface form of the additional integrated device component is provided by the overall curved structure of the electronic device, such as a coiled, corrugated, buckled and / or wrinkled form. In these embodiments, even when subjected to large strains, the curved structure ensures that these devices remain conductive or insulative with the semiconductor element in a stretched, compressed and / or curved form. It becomes possible to show electronic performance. The stretchable electronic circuit can be fabricated using techniques similar to those used to fabricate stretchable semiconductor elements as described herein. In one embodiment, for example, stretchable device components that include stretchable semiconductor elements are individually fabricated and then interconnected. Alternatively, a semiconductor-containing device is fabricated in a planar form, and the resulting planar device is subsequently processed to provide an overall device curved structure having a curved inner surface of some or all device components.

  [022] The present invention includes a stretchable electronic device comprising a single electronic device having a curved inner surface supported by a single flexible substrate. Alternatively, the present invention includes a stretchable semiconductor array comprising a plurality of stretchable electronic devices or device components each having a curved inner surface supported by a single flexible substrate. In some cases, the stretchable electronic device of the device array of the present invention has a well-defined, pre-selected physical dimension, arrangement, and relative spatial orientation.

  [023] In some embodiments of the invention, the curved inner surface of a semiconductor structure or electronic device is provided by a curved structure. The curved structure and the curved inner surface of the semiconductor and / or electronic device of the present invention have at least one convex region, at least one concave region, or a combination of at least one convex region and at least one concave region. Can have any profile that provides stretchability and / or flexibility, including but not limited to profile profiles characterized by: Outline profiles useful in the present invention include outline profiles that vary in one or two spatial dimensions. Using a curved structure with an inner surface with an external profile that exhibits periodic or aperiodic variation in more than one spatial dimension can be stretched, compressed, bent or otherwise deformed in multiple directions including orthogonal directions Useful for providing flexible stretchable semiconductor and / or electronic devices.

  [024] Useful embodiments are provided by curved semiconductor structures and / or electronic devices having a configuration that includes a plurality of convex and concave regions, for example, an alternating pattern of convex and concave regions provided in a corrugated form Includes a curved inner surface. In some embodiments, the curved inner surface of the stretchable and / or flexible semiconductor element or electronic device, or possibly the entire cross-sectional component, has an outer profile characterized by a substantially periodic or a non-periodic wave. In the context of this description, a periodic wave includes, but is not limited to, any two-dimensional or three-dimensional waveform including one or more sine waves, square waves, Aries functions, Gaussian waveforms, Lorentz waveforms, or combinations thereof. In another embodiment, the curved inner surface of the semiconductor element or electronic device, or possibly the entire cross-sectional component, has an outer profile consisting of a plurality of aperiodic bucklings having a relatively large amplitude and width. In another embodiment, the curved inner surface of the semiconductor element or electronic device, or possibly the entire cross-sectional component, has an outer profile consisting of both a periodic wave and a plurality of non-periodic buckling.

  [025] In one embodiment, the stretchable semiconductor element and / or electronic device of the present invention has a curved ribbon structure having a periodic or non-periodic corrugated shape that extends along at least a portion of its length, optionally along its width. Etc. are provided. The present invention includes a curved structure including a curved ribbon structure, for example, having a sinusoidal form with a periodicity between about 1 micron and 100 microns and an amplitude between about 50 nanometers and about 5 microns. Yes. The curved structures may be provided in other periodic waveform forms such as a square wave and / or a Gaussian wave, such as an axis extending along at least a portion of the length and / or width of these structures. Stretchable flexible semiconductor elements and stretchable electronic devices with a curved ribbon structure are expandable and compressible along an axis extending along the length of the semiconductor ribbon extending along the direction of the first corrugation of the curved inner surface Bendable and / or deformable, and optionally expandable and compressible along one or more axes, such as an axis extending along other corrugated directions of the curved structure and curved inner surface Can be bendable and / or deformable.

  [026] In some embodiments, the morphology of the semiconductor structure and electronic device of this aspect of the invention may change when subjected to mechanical stress or force. For example, the periodicity and / or amplitude of curved semiconductor structures and electronic devices having a corrugated or buckled configuration can vary depending on the applied mechanical stress and / or force. In certain embodiments, the ability to change this shape causes the stretched semiconductor structure and electronic device to expand and compress without significant mechanical damage, fracture or electronic properties and / or substantial degradation of electronic device performance. Provide the ability to bend, deform, and / or curve.

  [027] Bonding the curved inner surface of the semiconductor structure and / or stretchable electronic device to the support surface continuously (ie, bonding at all points (eg, about 90%) along the curved inner surface). Can do. Alternatively, the curved inner surface of the semiconductor structure and / or the stretchable electronic device can be discontinuously coupled to the supporting surface, and the curved inner surface becomes a supporting surface at selected points along the curved inner surface. Combined. The invention includes embodiments in which the inner surface of the semiconductor structure and electronic device is coupled to a flexible substrate at discrete points, and the inner surface is in a curved form between discrete points of coupling between the inner surface and the flexible substrate. The present invention includes a curved semiconductor structure and an electronic device having an inner surface coupled to a flexible substrate at discrete points, wherein the discrete points of coupling are separated from each other by buckling regions that are not directly coupled to the flexible substrate.

  [028] In some stretchable semiconductors and stretchable electronic devices of the present invention, only the inner surface of the semiconductor structure or electronic device is given a curved shape. Alternatively, the present invention provides a stretchable structure in which the entire cross-sectional component of the curved semiconductor structure or electronic device is provided in a curved form such as a corrugated, wrinkled, buckled or coiled form. Includes semiconductors and stretchable electronic devices. In these embodiments, the curved feature extends across the entire thickness of at least a portion of the semiconductor structure or electronic device. For example, the stretchable semiconductor of the present invention includes a curved semiconductor ribbon or strip having a corrugated, wrinkled, buckled, or coiled configuration. The invention also includes configurations and electronic devices in which the entire semiconductor structure or electronic device or at least a majority of the semiconductor structure or electronic device is provided in a curved form, such as a wavy, wrinkled or curved form.

  [029] In some embodiments, the corrugations, buckling and / or stretchable forms provide a way to mechanically adjust the useful properties of the compositions, materials and devices of the present invention. For example, semiconductor mobility and contact characteristics are at least partially dependent on strain. The spatially varying strains of the present invention are useful for adjusting material and device properties in a useful manner. As another example, the exponential characteristics vary spatially (through the elasto-optic effect) due to spatially varying strains in the waveguide, which can be advantageously used as different types of grating couplers.

  [030] Bonding of the elastic semiconductor structure and / or the inner surface of the electronic device to the outer surface of the flexible substrate is subject to stretching and / or compressive displacement without mechanical failure or significant degradation of electronic properties and / or performance Using any configuration, structure or coupling scheme that can provide a mechanically useful system capable of bending displacement without possible mechanical failure or possibly significant degradation of electronic properties and / or performance Can be given. Useful bonds between semiconductor structures and / or electronic devices and flexible substrates result in mechanically robust structures that exhibit beneficial electronic properties in various stretched, compressed and / or bent forms or deformed states. In one embodiment of this aspect of the invention, the bond between at least a portion of the inner surface of the semiconductor structure and / or electronic device and the outer surface of the flexible substrate is between the semiconductor structure or electronic device and the outer surface of the flexible substrate. Given covalently and / or non-covalently. Exemplary bonding schemes useful in these structures include the use of van der Waals interactions, dipole interactions and / or hydrogen bonding interactions between the semiconductor structure or electronic device and the outer surface of the flexible substrate. It is. The invention also includes embodiments in which the bond is provided by an adhesive or laminate layer, coating or thin film provided between the semiconductor structure or electronic device and the outer surface of the flexible substrate. Useful adhesive layers include, but are not limited to, metal layers, polymer layers, partially polymerized polymer precursor layers, and composite material layers. The present invention facilitates bonding with a semiconductor element or an electronic device using a flexible substrate having a chemically modified outer surface, such as a flexible substrate such as a polymer substrate having a plurality of hydroxyl groups on the outer surface. It also includes. The present invention includes flexible semiconductors and electronic circuits in which the semiconductor structure or electronic circuit is wholly or partially encapsulated by an encapsulating layer or coating, such as a polymer layer.

  [031] The physical dimensions and composition of the semiconductor structure or electronic device will at least partially affect the overall mechanical and electronic properties of the stretchable semiconductor element of the present invention. As used herein, the term thin refers to a structure having a thickness of about 100 microns or less, preferably about 50 microns or less, depending on the application. Using thin semiconductor structures or electronic devices such as thin semiconductor ribbons, platelets and strips or thin film transistors, in some embodiments, stretches, shrinks and / or shrinks without damage, mechanical failure or significant electronic property degradation. Or it is important for facilitating the formation of a curved inner surface, such as a corrugated, coiled or curved curved inner surface, which gives a bendable form. The use of thin semiconductor structures such as thin printable semiconductor structures or electronic devices is particularly useful for stretchable semiconductors and stretchable electronic devices that include fragile semiconductor materials such as single crystal and / or polycrystalline inorganic semiconductors. In one useful embodiment, the semiconductor structure or electronic circuit has a width selected over a range from about 1 micron to 1 centimeter and a thickness selected over a range from about 50 nanometers to about 50 microns.

  [032] The composition and physical dimensions of the supporting flexible substrate may also affect, at least in part, the overall mechanical and electronic properties of the stretchable semiconductor elements and stretchable electronic devices of the present invention. Useful flexible substrates include, but are not limited to, flexible substrates having a thickness selected over a range from about 0.1 millimeters to about 100 microns. In one useful embodiment, the flexible substrate comprises a polydimethylsiloxane PDMS layer and has a thickness selected over a range from about 0.1 millimeters to about 10 millimeters.

  [033] The present invention also includes a partially processed stretchable semiconductor element or a partially processed stretchable semiconductor circuit. In one embodiment, for example, the invention includes a Si ribbon having a pn diode device thereon. The Si ribbon is provided in a corrugated form and is optionally provided on the PDMS substrate. Interconnects are provided between these (insulated) diodes so that the diode output (eg photocurrent) is amplified, for example by metal deposition with a shadow mask. In one embodiment, a plurality of spaced stretchable transistors are fabricated on the elastomer. The individual transistors are wired in some way (eg deposition with a shadow mask) to make other useful circuits, eg a circuit consisting of a plurality of transistors connected in a particular way. For these cases, the interconnect metal wires are also stretchable, so we obtain a fully stretchable circuit on the elastomer.

  [034] In another aspect, the present invention provides (1) providing a transportable semiconductor structure having an inner surface, and (2) providing an elastic substrate having an outer surface and prestrained in an expanded state. (3) coupling at least a portion of the inner surface of the transportable semiconductor structure to the outer surface of the expanded pre-strained elastic substrate; and (4) relaxing the elastic substrate to at least partially relaxed state. A method of manufacturing a stretchable semiconductor device comprising: bending a semiconductor structure by loosening an elastic substrate, thereby generating a stretchable semiconductor device. In an embodiment of this aspect of the invention, the pre-strained elastic substrate is inflated along a first axis, and possibly along a second axis arranged orthogonal to the first axis. There are also things. In one useful embodiment, the transportable semiconductor element provided on the pre-strained elastic substrate is a printable semiconductor element.

  [035] In another aspect, the present invention provides (1) providing a transportable electronic circuit having an inner surface; and (2) providing an elastic substrate having an outer surface and pre-strained in an expanded state. And (3) coupling at least a portion of the inner surface of the transportable electronic circuit to the outer surface of the expanded pre-strained elastic substrate; and (4) relaxing the elastic substrate to at least partially relaxed state. A method of manufacturing a stretchable electronic circuit comprising: bending an elastic substrate to curve an inner surface of the electronic circuit, thereby generating a stretchable electronic circuit. In one useful embodiment, the transportable electronic circuit provided on the pre-strained elastic substrate is a printable electronic circuit such as an electronic circuit that can be transported with a printing technique such as dry transfer contact printing. In some embodiments, one or more semiconductor elements, such as semiconductor elements that can be transported and optionally printed by electronic circuits, dielectric elements, electrodes, conductor elements including superconducting elements, and doped semiconductor elements Some include a plurality of integrated device components including, but not limited to:

  [036] In some cases, the method of this aspect of the present invention is a method that at least partially retains a curved inner surface and / or a bent structure of a semiconductor element or electronic circuit, such as a stretchable semiconductor or stretchable electronic circuit A step of transferring the substrate from the supporting elastic substrate to the receiving substrate. The semiconductor structure or electronic circuit is transferred to a flexible receiving substrate such as a polymer receiving substrate or a receiving substrate comprising paper, metal or semiconductor. In this embodiment, a stretchable semiconductor or stretchable electronic device can be obtained by a wide range of means including, but not limited to, the use of adhesion and / or laminate layers, thin films and / or coatings such as adhesive layers (eg, polyimide adhesive layers). Can be bonded to a receiving substrate, such as a flexible polymer receiving substrate. Alternatively, the flexible polymer receiving substrate may be formed by a hydrogen bond, a covalent bond, a dipole interaction and a van der Waals interaction between the transferred stretch semiconductor or stretchable electronic device and the receiving substrate. Or the like to the receiving substrate.

  [037] In one embodiment, after making curved semiconductor structures and / or electronic circuits having corrugated, buckled, wrinkled or coiled forms supported by an elastic substrate, these structures are suitable adhesive layers or coatings. Is transferred to another substrate. In one embodiment, for example, a corrugated photovoltaic device is made on an elastic substrate and then transferred onto a metal foil using, for example, polyimide as an adhesive layer. An electrical connection is established between the photovoltaic device and the underlying metal foil (which can act as one of the collector electrodes by patterning, etching, metal deposition, etc. to form through holes to expose the metal surface) The The wavy surface of the photovoltaic device in this form can be utilized for more advanced light traps (or reduced light reflection). In order to obtain better antireflection results, we can further process this corrugated surface, for example by making the surface roughness much smaller than the wavelength of the corrugated semiconductor. This means that partially or fully processed wavy / curved semiconductors / circuits can be transferred onto other substrates (not limited to PDMS) and used with higher performance by adding further processing if necessary. It is possible.

  [038] Optionally, the method of the present invention can further comprise encapsulating, sealing or laminating the stretchable semiconductor or stretchable electronic device. In this context, the encapsulation step includes the case of a thin-layer buckling structure, geometry and configuration in which the encapsulating material is provided under the raised region of the buckling and completely embeds all sides of the buckling structure. The encapsulating step also includes providing an encapsulating layer, such as a polymer layer, on the raised and non-raised contours of the curved semiconductor structure or electronic circuit. In one embodiment, a prepolymer, such as a PDMS prepolymer, is molded and cured on a stretchable semiconductor or stretchable electronic device. To increase the mechanical stability and robustness of the stretchable semiconductor and electronic devices of the present invention, an encapsulation or encapsulation process step is useful for some applications. The present invention includes encapsulated, sealed and / or laminated stretchable semiconductor and electronic devices that exhibit good mechanical and electronic performance in a stretched, compressed, curved and / or bent form.

[039] In some cases, the method of this aspect of the invention provides a semiconductor element, device component, and / or functional device, a donor such as a polymer substrate (eg, a two-dimensional ultrathin polymer substrate) or an inorganic substrate (eg, SiO ₂ ) Assembling on a substrate. In this embodiment, the structure assembled on the donor substrate is then transferred to a pre-strained elastomer substrate to form a stretchable material, device or device component. In one embodiment, an electronic device having a transistor, transistor array or transistor is first assembled on a donor substrate, for example by printing techniques using printable semiconductor elements. The entire device and / or device array is then transferred to a pre-strained elastic substrate, for example by contact printing, to form a stretchable waveform and / or buckling system. This approach is useful for creating device interconnects and full circuit fabrication on thin non-elastomeric materials (such as polyimide or benzocyclobutene or PET) prior to transfer to a stretchable elastomeric support. Useful. In this type of system, an aperiodic 2D waveform or buckling structure is obtained in a combined transistor / polymer film / elastomer substrate system.

  [040] A method of pre-straining an elastic substrate useful in the present method includes bending and rolling an elastic substrate using, for example, a mechanical stage, before and / or during contact and bonding to a semiconductor structure and / or electronic device. Including bending and swelling steps. A particularly useful means of prestraining the elastic substrate in multiple directions is to thermally expand the elastic substrate by raising the temperature of the elastic substrate before and / or during contact and bonding to the semiconductor structure and / or electronic device. Including that. In these embodiments, relaxation of the elastic substrate is achieved by lowering the temperature of the elastic substrate after contacting and bonding to a transportable and optionally printable printable semiconductor structure or electronic device. In some methods, pre-strain may be applied by introducing about 1% to about 30% strain on the elastic substrate.

  [041] In the context of this description, the expression "elastic substrate" refers to a substrate that can stretch or deform without substantially permanent deformation and return to its original shape. The elastic substrate usually undergoes almost elastic deformation. Exemplary elastic substrates useful in the present invention include, but are not limited to, elastomers and elastomer composites or mixtures, polymers and copolymers that exhibit elasticity. In one method, the elastomeric substrate is pre-strained by a mechanism that causes the elastic substrate to expand along one or more major axes. For example, pre-strain can be applied by expanding the elastic substrate along the first axis. However, the present invention also includes a method in which the elastic substrate is expanded along a plurality of axes, for example by expansion along first and second axes arranged orthogonal to each other. Means for pre-straining the elastic substrate by the inflating mechanism useful in the method include bending, rolling, bending, planarizing, expanding or other deformation of the elastic substrate. The present invention also includes means for imparting pre-strain by raising the temperature of the elastic substrate, thereby providing thermal expansion of the elastic substrate.

  [042] The method of the present invention can also make stretchable elements, devices and device components from materials other than semiconductor materials. The present invention includes a method in which non-semiconductor structures such as insulators, superconductors, and metalloids are transferred and bonded to a pre-strained elastic substrate. The elastic substrate is at least partially relaxed to form a stretchable non-semiconductor structure having a curved inner surface, such as a non-semiconductor structure having a corrugated and / or buckled profile. This aspect of the invention includes stretchable non-semiconductor structures having curved structures such as inner and possibly outer surfaces provided in coiled, wrinkled, buckled and / or corrugated forms.

  [043] Flexible substrates useful in the stretchable semiconductor, electronic devices and / or device components of the present invention include, but are not limited to, polymer substrates and / or plastic substrates. Stretchable semiconductor has a printable semiconductor structure, such as one or more transportable and optionally printable semiconductor elements, supported by an elastic substrate that has been pre-strained to form a curved inner surface during fabrication including. Alternatively, the stretchable semiconductor comprises one or more transportable semiconductor structures, such as printable semiconductor elements, supported by a flexible substrate different from the elastic substrate that has been pre-strained to form a curved inner surface during fabrication. Includes configuration. For example, the present invention includes a stretchable semiconductor in which a semiconductor structure having a curved inner surface is transferred from an elastic substrate to a different flexible substrate.

2 is an atomic force micrograph showing the stretchable semiconductor structure of the present invention. 2 shows an atomic force micrograph that is an enlarged view of a semiconductor structure having a curved inner surface. Figure 2 shows an atomic force micrograph of an array of stretchable semiconductor structures of the present invention. 2 shows an optical micrograph of the stretchable semiconductor structure of the present invention. FIG. 4 shows an atomic force micrograph of a stretchable semiconductor structure of the present invention having a semiconductor structure bonded to a flexible substrate having a three-dimensional relief pattern on its support surface. FIG. 3 shows a flow diagram illustrating an exemplary method for making a stretchable semiconductor element of the present invention. 2 shows an image of an array of stretchable semiconductors arranged in the longitudinal direction having a corrugated curved inner surface supported by a flexible rubber substrate. A cross-sectional image of a stretchable semiconductor element of the present invention in which a semiconductor structure 776 is supported by a flexible substrate 777 is shown. As shown in FIG. 8, the printable semiconductor structure 776 has an inner surface with a periodic wave profile. FIG. 4 shows a flow diagram illustrating an exemplary method of making a stretchable thin film transistor array. Figure 2 shows an optical micrograph of a stretched thin film transistor array in a relaxed and stretched form. 1 is a schematic diagram of a process for building a stretchable single crystal Si device on an elastomeric substrate. The first step (upper frame) involves conventional lithographic processing of thin (20-320 nm thick) elements of single crystal Si or completed monolithic devices (ie, transistors, diodes, etc.) This is followed by etching the top Si and SiO ₂ layers. After these procedures, the ribbon structure is supported by the underlying wafer but not bonded (upper frame). By bringing a pre-strained elastomeric substrate (PDMS) into contact with the ribbon, a bond occurs between these materials (center frame). The PDMS returns to its unstrained state (unstressed length L) by peeling the PDMS while the ribbon is still bonded to its surface and then releasing the prestrain. This relaxation results in a well-controlled and highly periodic stretch corrugated structure in the ribbon (lower frame). A is a magnified optical image of an array of wavy single crystal Si ribbons on PDMS (width = 20 μm, spacing = 20 μm, thickness = 100 nm). B is a scanning electron micrograph of the four wavy Si ribbons from the array shown in FIG. Wave structures have a highly uniform wavelength and amplitude across the array. C is the wave height of the surface height (upper frame) and Si Raman peak (lower frame) as a function of position along the wavy Si ribbon on PDMS, measured with AFM and Raman microscope, respectively. The line shows a sinusoidal approximation of the data. D is the amplitude (upper frame) and wavelength (lower frame) of the wavy Si ribbon as a function of Si thickness for a given level of PDMS pre-strain. The line corresponds to the calculated value without approximating the parameter. Buckling wavelength as a function of temperature. The reason why the wavelength is slightly shortened as the temperature rises is due to the thermal contraction of PDMS, and a short wavelength can be obtained for a sample adjusted at a high temperature. Peak silicon strain as a function of silicon thickness for pre-strain values of ~ 0.9%. The red symbol corresponds to the bending strain calculated using wavelength and amplitude based on an equation describing the buckling process. The black symbols correspond to similar calculated values except that they use wavelengths and amplitudes measured by AFM. Atomic force micrograph (left frame) and concavo-convex profile (right frame, line approximates experimental data to sine curve) of wavy single crystal Si ribbon (width = 20 μm, thickness = 100 nm) on PDMS substrate. The top, center, and bottom correspond to the shape when PDMS is -7% (compressed), 0% (unperturbed), and 4.7% (stretched) along the ribbon length, respectively. . Average amplitude (black) and wavelength change (red) (upper frame) of wavy Si ribbons as a function of strain applied to the PDMS substrate. Different substrates were used for stretching (circle) and compression (square) for wavelength measurement. Peak Si strain (lower frame) as a function of applied strain. Lines in these graphs represent calculated values without free approximation. A top cut AFM image of a corrugated silicon ribbon on PDMS and a line cut evaluated at an angle to the length of the ribbon. Silicon ribbon strain as a function of applied strain. The red symbol corresponds to the strain calculated by numerical integration of the outer length using the wavelength and amplitude extracted using the equations describing the buckling process. The black symbol corresponds to the distortion measured from the surface to horizontal distance ratio in the AFM surface profile along the wavy Si ribbon. A is an optical image of a stretchable single crystal Sip-n diode on a PDMS substrate with applied strains of -11% (top), 0% (center), and 11% (bottom). The aluminum region corresponds to a thin (20 nm) Al electrode, and the pink and green regions of Si correspond to n (boron) and p (phosphorus) doped regions. B is the current density as a function of bias voltage for a stretchable Sipn diode, measured at various levels of applied strain. The curves labeled “Bright” and “Dark” correspond to devices exposed to ambient light or devices shielded from light, respectively. The solid curve shows the modeling result. C is the current-voltage characteristic of the stretchable Schottky barrier SiMOSFET measured at −9.9%, 0%, and 9.9% strain (the gate voltage was varied from 0V to −5V in 1V increments). Peak silicon strain as a function of applied strain. The blue line is based on the accordion bellows model, and black is an approximation for small strains that also follow the buckling mechanism. Electrical measurements of wavy pn diodes, before (before cycle) and after ~ 100 cycles of compression (up to ~ 5% strain), extension (up to ~ 15% strain), and release in three different devices Three different devices (# 1, # 2 and # 3) are evaluated (after the cycle). This data does not show a systematic change in device characteristics. The level of variation observed by the inventors is comparable to the level when a single device is repeatedly probed without changing the applied strain, and is likely due to slight differences in probe contact. Optical image (upper frame) of Schottky barrier MOSFET in unperturbed state (center), compressed state (top) and stretched state (bottom). Schematic diagram of the device (lower frame). Transfer curves measured at different applied strains in a “wavy” silicon Schottky barrier MOSFET. FIG. 5 is a diagram showing steps of creating a “buckled” “wavy” GaAs ribbon on a PDMS substrate. The lower left frame shows a thin SiO ₂ deposit on the surface of the ribbon to strengthen the bond with PDMS. This combination forms the wavy geometry shown in the right center frame. Weak van der Waals couplings (and moderate to high levels of pre-strain) result in a buckling geometry as shown in the upper right frame. Image of wavy GaAs ribbon on PDMS substrate formed with ~ 1.9% prestrain caused by thermal expansion. Optical (A), SEM (B), 3D AFM (C) and top AFM (D) images of the same sample. The SEM image was obtained by tilting the sample stage at 45 ° between the sample surface and the detection direction. (Points on the ribbon appear to be residues from the sacrificial AlAs layer) (E, F) are surface height profiles plotted along the blue and green lines shown in (D), respectively. A is an optical micrograph of a wavy GaAs ribbon formed with a pre-strain of 7.8%, strongly bonded to PDMS and collected with different applied strains. The left and right blue bars in the structure highlight specific peaks. Variations in the distance between these bars indicate the dependence of the wavelength on the applied strain. B, wavelength change as a function of strain applied to the wavy GaAs ribbon shown in FIG. 24A, plotted in black, similar data red for the sample A system after implantation in PDMS. Image of GaAs ribbon integrated with ohmic (source and drain) and Schottky (gate) contacts to form a complete MOSFET. (A) Optical microscope image of a wavy ribbon formed using 1.9% pre-strain and strong coupling with PDMS, indicating that periodic waves are only formed in sections without electrodes (gray). (B) Optical and (C) SEM images of buckled ribbons formed using ~ 7% pre-strain and weak bond with PDMS. (D) Optical images of the two buckling devices shown in (B) after stretching until flat. (E) After embedded in PDMS, shown in (B) with different strains applied externally (5.83% compressive strain from top to bottom, no added strain, 5.83% stretch strain) A set of optical images of individual ribbon devices. A is an optical image of a GaAs ribbon MESFET on a PDMS stamp with different distortions made in a PDMS substrate. The strain applied to the PDMS stamp before the device was transferred onto its surface was 4.7%. B is a comparison of IV curves before and after 4.7% stretch strain was added to the system for the device shown in FIG. It is an image in the different expansion ratio of the stretchable silicon semiconductor of this invention which shows stretchability in two dimensions. It is an image in the different expansion ratio of the stretchable silicon semiconductor of this invention which shows stretchability in two dimensions. It is an image in the different expansion ratio of the stretchable silicon semiconductor of this invention which shows stretchability in two dimensions. It is an image of three different structural forms of the stretchable semiconductor of the present invention showing stretchability in two dimensions. It is an image of three different structural forms of the stretchable semiconductor of the present invention showing stretchability in two dimensions. It is an image of three different structural forms of the stretchable semiconductor of the present invention showing stretchability in two dimensions. It is an image of the stretchable semiconductor of the present invention produced by pre-straining an elastic substrate by thermal expansion. It is an image of the stretchable semiconductor of the present invention produced by pre-straining an elastic substrate by thermal expansion. It is an image of the stretchable semiconductor of the present invention produced by pre-straining an elastic substrate by thermal expansion. It is an image of the stretchable semiconductor of the present invention produced by pre-straining an elastic substrate by thermal expansion. 2 shows an optical image of a stretchable semiconductor that exhibits stretchability in two dimensions under varying stretching and compression conditions. 2 shows an optical image of a two-dimensional stretchable semiconductor produced by applying a pre-strain to an elastic substrate by thermal expansion. It is an experimental result regarding the mechanical characteristic of the stretchable semiconductor shown to FIG. 31A. It is an experimental result regarding the mechanical characteristic of the stretchable semiconductor shown to FIG. 31A.

  [075] Referring to the drawings, like numerals indicate like elements and the same number appearing in more than one drawing indicates the same element. In addition, the following definitions apply below.

  [076] "Printable" refers to an integrated functional device that can be transferred, assembled, patterned, organized and / or integrated onto or into a material, structure, device component and / or substrate. In one embodiment of the present invention, printable materials, elements, device components and devices are transferred, assembled, patterned, organized and / or integrated onto or into a printed substrate by solution printing or dry transfer contact printing. Is possible.

  [077] A "printable semiconductor element" of the present invention comprises a semiconductor structure that can be assembled and / or integrated on a substrate surface, for example, by using dry transfer contact printing and / or solution printing methods. . In one embodiment, the printable semiconductor element of the present invention is a single monocrystalline, polycrystalline or microcrystalline inorganic semiconductor structure. In this context of this description, a single structure is a monolithic element with mechanically connected features. The semiconductor device of the present invention may be undoped or doped, may have a spatial distribution of selected dopants, and is doped with a plurality of different dopant materials including P and N type dopants. May be. The present invention includes at least one microstructured printable semiconductor element having a cross-sectional dimension of about 1 micron or greater and at least one nanostructured printable semiconductor element having a cross-sectional dimension of about 1 micron or less. Printable semiconductor devices useful in many applications include devices resulting from “top-down” processing of high purity bulk materials, such as high purity crystalline semiconductor wafers produced using conventional high temperature processing techniques. In one embodiment, the printable semiconductor element of the present invention is operably connected to at least one additional device component or structure, such as a conductive layer, dielectric layer, electrode, additional semiconductor structure, or any combination thereof. And a composite structure having the formed semiconductor. In one embodiment, the printable semiconductor element of the present invention comprises a stretchable semiconductor element and / or a non-uniform semiconductor element.

  [078] "Cross-sectional dimension" refers to the cross-sectional dimension of a device, device component or material. Cross-sectional dimensions include width, thickness, radius and diameter. For example, a semiconductor element having a ribbon shape is characterized by one length and two cross-sectional dimensions, thickness and width. For example, a printable semiconductor element having a cylindrical shape is characterized by a length and a cross-sectional dimension diameter (or radius).

  [079] A "supported by a substrate" is a structure that is at least partially on the substrate surface, or at least partially on one or more intermediate structures disposed between the structure and the substrate surface. Point to. The term “supported by a substrate” may refer to a structure that is partially or completely embedded within the substrate.

  [080] "Solution printing" is intended to refer to a process in which one or more structures, such as printable semiconductor elements, are dispersed in a carrier medium and fed together into selected areas of the substrate surface. ing. In an exemplary solution printing method, delivery of the structure to selected areas of the substrate surface is accomplished by a method that is independent of the morphology and / or physical properties of the substrate surface being patterned. Solution printing methods that can be used in the present invention include, but are not limited to, inkjet printing, thermal transfer printing, and capillary printing.

  [081] "Oriented substantially longitudinally" refers to an orientation such that the longitudinal axis of a population of elements such as printable semiconductor elements is oriented substantially parallel to a selected alignment axis. In the context of this definition, substantially parallel to a selected axis refers to an orientation within 10 degrees of a perfectly parallel orientation, and more preferably an orientation within 5 degrees of a completely parallel orientation.

  [082] "Stretch" refers to the ability of a material, structure, device or device component to deform without breaking. In an exemplary embodiment, the stretchable material, structure, device or device component is greater than about 0.5% without crushing, preferably greater than about 1% without crushing depending on the application, more preferably crushing depending on the application. Without deformation, it can be deformed by more than about 3%.

  [083] The terms "flexible" and "bendable" are used interchangeably in this description, and the material, structure, device, or device component has significant strain, such as strain that characterizes the failure point of the material, structure, device, or device component. This means that it can be deformed into a curved surface shape without any shape change that causes the. In an exemplary embodiment, the flexible material, structure, device or device component causes a strain of about 5% or more, preferably about 1% or more depending on the application, more preferably about 0.5% or more depending on the application. And can be transformed into a curved shape.

  [084] The term "buckling" refers to a physical deformation that occurs in response to compressive strain caused by bending a thin element, structure, and / or device out of the plane of the element, structure, and / or device. Point to. The present invention includes stretchable semiconductors, devices, and components having one or more surfaces with an outer profile that includes one or more buckles.

[085] "Semiconductor" refers to any material that is an insulator at a cryogenic temperature but has a substantial electrical conductivity at a temperature of about 300 Kelvin. In this description, the use of the term semiconductor is intended to be consistent with the use of this term in microelectronics and electronic device technology. Semiconductors useful in the present invention include single semiconductors such as silicon, germanium and diamond, group IV compound semiconductors such as SiC and SiGe, AlSb, AlAs, AIn, AlP, BN, GaSb, GaAs, GaN, GaP, InSb, InAs, InN and InP such as group III-V compound _{semiconductor, Al x Ga 1-x As} III-V group ternary semiconductor alloy, such as, CaSe, CdS, CdTe, ZnO , ZnSe, ZnS, and II-IV group semiconductors such as ZnTe In addition, an IV-VI group semiconductor such as I-VII group semiconductor CuCl, PbS, PbTe and SnS, a layer semiconductor such as PbI ₂ , MoS ₂ and GaSe, and an oxide semiconductor such as CuO and Cu ₂ O may be included. The term semiconductor is an intrinsic semiconductor doped with one or more selected materials, including semiconductors with p-type and n-type doped materials, that provide useful electronic properties useful for a given application or device. And exogenous semiconductors. The term semiconductor includes composite materials comprising a mixture of semiconductors and / or dopants. Specific semiconductor materials useful in some applications of the present invention include Si, Ge, SiC, AlP, AlAs, AlSb, GaN, GaP, GaAs, GaSb, InP, InAs, GaSb, InP, InAs, InSb, ZnO. ZnSe, ZnTe, CdS, CdSe, ZnSe, ZnTe, CdS, CdSe, CdTe, HgS, PbS, PbSe, PbTe, AlGaAs, AlInAs, AlInP, GaAsP, GaInAs, GaInP, AlGaAsSb, AlGaInP, and GaInP. It is not limited to this. Porous silicon semiconductors are useful for applications of the present invention in the field of sensors and light emitting materials such as light emitting diodes (LEDs) and solid state lasers. The impurities of the semiconductor material are atoms, elements, ions and / or molecules other than the semiconductor material itself or any dopant provided to the semiconductor material. Impurities are undesirable materials present in semiconductor materials that can negatively affect the electronic properties of the semiconductor materials, including but not limited to metals including oxygen, carbon and heavy metals. Heavy metal impurities include, but are not limited to, the group of elements between copper and lead on the periodic table, calcium, sodium, and all their ions, compounds and / or complexes.

  [086] "Plastic" is any synthetic or naturally occurring material or combination of materials that can be molded or embossed and cured upon heating, generally into the desired shape. Exemplary plastics useful in the devices and methods of the present invention include, but are not limited to, polymers, resins and cellulose derivatives. In this description, the term plastic is one with one or more additives such as structure promoters, fillers, fibers, plasticizers, stabilizers or additives that provide the desired chemical or physical properties. It is intended to include composite plastic materials including the above plastics.

[087] "Dielectric" and "dielectric material" are used interchangeably in this description and refer to a substance that has a high resistance to current. Useful dielectric materials _{SiO 2, Ta 2 O 5,} TiO 2, ZrO 2, Y 2 O 3, SiN 4, STO, BST, PLZT, PMN, and PZT include, but are not limited thereto.

  [088] "Polymer" refers to a molecule composed of multiple repeating chemical groups, commonly referred to as monomers. Polymers are often characterized by a high molecular weight. The polymers that can be used in the present invention may be organic or inorganic polymers, and may be in an amorphous, semi-amorphous, crystalline or partially crystalline state. The polymer may include monomers having the same chemical composition, or may include a plurality of monomers having different chemical compositions, such as copolymers. Crosslinked polymers having linking monomers are particularly useful for some applications of the present invention. Polymers useful in the methods, devices and device components of the present invention include, but are not limited to, plastics, elastomers, thermoplastic elastomers, elastoplastic materials, thermostats, thermoplastic materials and acrylates. Exemplary polymers include acetal polymer, biodegradable polymer, cellulose polymer, fluoropolymer, nylon, polyacrylonitrile polymer, polyamideimide polymer, polyimide, polyarylate, polybenzimidazole, polybutylene, polycarbonate, polyester, polyetherimide, Polyacetylene, polyethylene copolymer and modified polyethylene, polyketone, polymethyl methacrylate, polymethylpentene, polyphenylene oxide and polyphenylene sulfide, polyphthalamide, polypropylene, polyurethane, styrenic resin, sulfone base resin, vinyl base resin or any of these A combination is included, but is not limited to this.

  [089] "Elastomer" refers to a polymeric material that is stretchable or deformable and capable of returning to its original shape without substantial permanent deformation. Elastomers usually undergo nearly elastic deformation. The elastic substrate useful in the present invention includes at least partially one or more elastomers. Exemplary elastomers useful in the present invention may include polymers, copolymers, composites and mixtures of polymers and copolymers. Elastomeric layer refers to a layer comprising at least one elastomer. The elastomeric layer may include dopants and other non-elastomeric materials. Elastomers useful in the present invention include styrenic materials, olefinic materials, polyolefins, polyurethane thermoplastic elastomers, polyamides, synthetic rubbers, PDMS, polybutadiene, polyisobutylene, polystyrene butadiene styrene, polyurethanes, polychloroprene and silicones. It is not limited to this.

[090] "Good electronic performance" and "high performance" are used interchangeably in this description and provide field effect mobility, threshold voltage that provides the desired functionality such as electronic signal switching and / or amplification. , Devices and device components having electronic properties such as on-off ratio. Exemplary transportable and optionally printable semiconductor elements of the present invention that exhibit good electronic performance are 100 cm ² V ⁻¹ s ⁻¹ or higher, preferably 300 cm ² V ⁻¹ s ⁻¹ or higher, depending on the application. Specific field effect mobility. Good exemplary transistor of the present invention illustrating the electronic performance, 100cm ² V ^-1 s ^-1 or more, preferably more than 300cm ² V ^-1 s ^-1 by the application, more preferably for some applications 800 cm ² V It can have an intrinsic field effect mobility of ⁻¹ s ⁻¹ or higher. Exemplary transistors of the present invention that exhibit good electronic performance can have a threshold voltage less than about 5 volts and / or an on-off ratio greater than about 1 × 10 ⁴ .

  [091] "Large area" refers to an area, such as the area of a receiving surface of a substrate used to fabricate devices that are approximately 36 inches square or larger.

  [092] "Device field effect mobility" refers to the field effect mobility of an electronic device, such as a transistor, calculated using output current data corresponding to the electronic device.

[093] "Young's modulus" is a mechanical property of a material, device or layer and refers to the ratio of stress to strain for a given substance. Young's modulus can be given by the following equation.

Here, E is Young's modulus, L ₀ is the equilibrium length, ΔL is the length change under applied stress, F is the applied force, and A is the area where the force is applied. The Young's modulus can also be expressed as a lame constant by the following equation.

Here, λ and μ are lame constants. High Young's modulus (ie, “high modulus”) and low Young's modulus (ie, “low modulus”) are relative descriptors of the magnitude of Young's modulus for a given material, layer or device. In the present invention, the high Young's modulus is preferably about 10 times greater than the low Young's modulus depending on the application, more preferably about 100 times for other applications, and even more preferably 1000 times greater for other applications.

  [094] In the following description, numerous specific details of the devices, device components, and methods of the invention are set forth in order to fully describe the precise nature of the invention. However, it will be apparent to one skilled in the art that the present invention may be practiced without these specific details.

  [095] The present invention provides stretchable semiconductors and electronic circuits that can obtain good performance when stretched, compressed, bent, or otherwise deformed. Furthermore, the stretchable semiconductors and electronic circuits of the present invention can be adapted to a wide range of device configurations to provide fully flexible electronic and optoelectronic devices.

  [096] FIG. 1 is an atomic force micrograph showing the stretchable semiconductor structure of the present invention. The stretchable semiconductor element 700 includes a flexible substrate 705 such as a polymer and / or elastic substrate having a support surface 710 and a curved semiconductor structure 715 having a curved inner surface 720. In this embodiment, at least a portion of the curved inner surface 720 of the curved semiconductor structure 715 is coupled to the support surface 710 of the flexible substrate 705. The curved inner surface 720 may be coupled to the support surface 710 at selected points along the inner surface 720 or at all points along the inner surface 720. The exemplary structure shown in FIG. 1 comprises a single crystal silicon curved ribbon having a width equal to about 100 microns and a thickness equal to about 100 nanometers. The flexible substrate shown in FIG. 1 is a PDMS substrate having a thickness of about 1 millimeter. The curved inner surface 720 includes substantially periodic waves that extend along the length of the ribbon. As shown in FIG. 1, the wave amplitude is about 500 nanometers and the peak spacing is approximately 20 microns. FIG. 2 shows an atomic force micrograph that is an enlarged view of a curved semiconductor structure 715 having a curved inner surface 720. FIG. 3 shows an atomic force micrograph of an array of stretchable semiconductor structures of the present invention. Analysis of the atomic force micrograph of FIG. 3 shows that the curved semiconductor structure is compressed by about 0.27%. FIG. 4 shows an optical micrograph of the stretchable semiconductor structure of the present invention.

  [097] The outer profile of the curved inner surface 720 allows the curved semiconductor structure 715 to expand and contract along the deformation axis 730 without undergoing significant mechanical strain. This outer profile also allows the semiconductor structure to bend, bend or deform in directions other than along the deformation axis 730 without performance loss caused by significant mechanical damage or distortion. The curved surface of the semiconductor structure of the present invention has good mechanical properties such as stretchability, flexibility and / or bendability, and / or good field effect mobility when bent, stretched or deformed Can have any profile that provides a good electronic performance. Exemplary profile profiles include a wide variety of convex and / or concave regions and a wide variety including sine waves, Gaussian waves, Aries functions, square waves, Lorentz waves, periodic waves, non-periodic waves, or any combination thereof. The waveform can be characterized. Waveforms that can be used in the present invention can be changed for two or three physical dimensions.

  [098] FIG. 5 is an atomic force micrograph showing a stretchable semiconductor structure of the present invention having a curved semiconductor structure 715 bonded to a flexible substrate 705 having a three-dimensional relief pattern on its support surface 710. This three-dimensional concavo-convex pattern is composed of a concave region 750 and a convex shape 760. As shown in FIG. 5, the curved semiconductor structure 715 is coupled to the support surface 710 within the recessed area 750 and on the raised shape 760.

  [099] FIG. 6 is a flow diagram illustrating an exemplary method of creating a stretchable semiconductor structure of the present invention. In this exemplary method, a pre-strained substrate is provided in an expanded state. Pre-strain can be achieved by any means known in the art including, but not limited to, rolling and / or pre-bending of the elastic substrate. The pre-strain can also be achieved by thermal means such as thermal expansion caused by raising the temperature of the elastic substrate. The advantage of pre-strain by thermal means is that expansion along a plurality of different axes, such as orthogonal axes, can be achieved.

  [0100] An exemplary elastic substrate that can be used in this method of the invention is a PDMS substrate having a thickness equal to about 1 millimeter. The pre-strain of the elastic substrate can be caused by expansion along one axis or by expansion along multiple axes. As shown in FIG. 6, at least a portion of the inner surface of the printable semiconductor element is bonded to the outer surface of the elastic substrate that is pre-strained in the expanded state. Bond formation can be accomplished by covalent bonding between the inner surfaces of the semiconductor surface, by van der Waals forces, with an adhesive, or any combination thereof. In an exemplary embodiment where the elastic substrate is a PDMS substrate, the support surface of the PDMS substrate is chemically modified to have a plurality of hydroxyl groups extending from the surface to facilitate covalent bonding with the silicon semiconductor structure. . Referring to FIG. 6, after the pre-strained elastic substrate and the semiconductor structure are coupled, the elastic substrate is relaxed to at least partially relaxed state. In this embodiment, the inner surface of the semiconductor structure is curved by the relaxation of the elastic substrate, thereby generating a semiconductor element having a curved inner surface.

  [0101] As shown in FIG. 6, the fabrication method optionally includes a second transfer step and an optional coupling step, wherein a transportable semiconductor element 715 having a curved inner surface 720 is formed from an elastic substrate. It is transferred to another substrate, preferably a flexible substrate such as a polymer substrate. This second transfer step can be accomplished by bringing the exposed surface of the semiconductor structure 715 having a curved inner surface 720 into contact with the receiving surface of another substrate that is bonded to the exposed surface of the semiconductor element 715. Bond formation to other substrates can include at least partially maintain the curved structure of the semiconductor substrate, including covalent bonds, bond formation by van der Waals forces, dipole interaction, London forces and / or hydrogen bonds It is achieved by means of The invention also includes the use of adhesive layers, coatings and / or thin films provided between the exposed and receiving surfaces of the transportable semiconductor structure.

  [0102] The stretchable semiconductor elements of the present invention can be effectively incorporated into many functional devices and device components such as transistors, diodes, lasers, MEMS, NEMS, LEDs and OLEDS. The stretchable semiconductor element of the present invention has certain functional advantages over conventional rigid inorganic semiconductors. First, because the stretchable semiconductor element is flexible, it is less susceptible to structural damage caused by bending, bending and / or deformation than conventional rigid inorganic semiconductors. Secondly, because the curved semiconductor structure has a slightly mechanical distortion such that it has a curved inner surface, the stretchable semiconductor element of the present invention has a higher intrinsic field effect transfer than conventional rigid inorganic semiconductors. Degree can be shown. Finally, since the stretchable semiconductor element can freely stretch according to the device temperature cycle, good thermal characteristics may be obtained.

  [0103] FIG. 7 shows an image of an array of stretchable semiconductors having a wavy morphology arranged in the longitudinal direction. As shown in FIG. 7, a semiconductor ribbon is provided in a periodic wave form and is supported by one flexible rubber substrate.

  [0104] FIG. 8 shows a cross-sectional image of a stretchable semiconductor element of the present invention in which a semiconductor structure 776 is supported by a flexible substrate 777. As shown in FIG. 8, the semiconductor structure 776 has an inner surface with a periodic wave profile. As also shown in FIG. 8, the periodic wave form extends through the entire cross-sectional dimension of the semiconductor structure 776.

  [0105] The present invention also provides stretchable electronic circuits, devices and device arrays capable of good performance when stretched, bent or deformed. Like the stretchable semiconductor element described above, the present invention comprises a stretchable circuit comprising a device having an inner surface such as a curved inner surface showing a wave structure, a flexible substrate having a support surface in contact with a device array or circuit, and Provide electronic devices. In this structural arrangement, at least a portion of the curved inner surface of the device, device array or circuit structure is bonded to the support surface of the flexible substrate. The device, device array or circuit of this aspect of the invention is a multi-component element comprising a plurality of integrated device components such as semiconductors, dielectrics, electrodes, doped semiconductors and conductors. In an exemplary embodiment, at least a portion of the flexible circuit, device, and device array having a net thickness of less than about 10 microns comprises a plurality of integrated device components having a periodic wave curve structure.

  [0106] In a useful embodiment of the present invention, a free standing electronic circuit or device comprising a plurality of interconnected components is provided. The inner surface of the electronic circuit or device is brought into contact with at least a part of the elastic substrate that has been pre-strained in the expanded state. Pre-strain can be achieved by any means known in the art including, but not limited to, rolling and / or pre-bending of an elastic substrate, and can be achieved by expansion along a single axis or by multiple axes. It can also be caused by expansion along. Bond formation can be achieved directly by covalent bonding or van der Waals forces of an elastic substrate pre-strained with at least a portion of the inner surface of the electronic circuit or device, or by using an adhesive or an intermediate adhesive layer. . After bonding the pre-strained elastic substrate to the electronic circuit or device, the elastic substrate is relaxed to an at least partially relaxed state, thereby bending the inner surface of the semiconductor structure. The inner surface of the electronic circuit or device is curved to produce a curved inner surface, which in some useful embodiments has a periodic or aperiodic wave morphology. The invention includes embodiments in which all components comprising an electronic device or circuit are in a periodic or non-periodic wave form.

  [0107] Periodic or non-periodic wave forms of stretchable electronic circuits, devices and device arrays cause them to conform to stretched or curved forms without causing significant distortion to the individual components of the circuit or device. This aspect of the present invention provides useful electronic behavior of stretchable electronic circuits, devices and device arrays when in a curved, stretched or deformed state. The period of the periodic wave form formed by the method is: (i) the net thickness of a group of integrated components comprising a circuit or device and (ii) the mechanical properties of the material comprising the integrated device component such as Young's modulus and bending stiffness It may vary with.

  [0108] FIG. 9A is a flow diagram illustrating an exemplary method of making a stretchable thin film transistor array. As shown in FIG. 9A, a self-supporting printable thin film transistor array is provided using the techniques of the present invention. The thin film transistor array is transferred to the PDMS substrate by a dry transfer contact printing method with the inner surface of the transistor exposed. The exposed inner surface is then contacted with a pre-strained PDMS layer that is cured at room temperature in an expanded state. Subsequent complete curing of the prestrained PDMS layer couples the inner surface of the transistor to the prestrained PDMS layer. The pre-strained PDMS layer is cooled and at least partially relaxed. The relaxation of the PDMS layer introduces a periodic wave structure to the transistors in the array, thereby making them stretchable. The inset of FIG. 9A is an atomic photomicrograph of a stretchable thin film transistor array created by this method. This atomic photomicrograph shows a periodic wave structure that provides good electronic performance in the stretched or deformed state.

  [0109] FIG. 9B shows an optical micrograph of a stretchable thin film transistor array in a relaxed and stretched configuration. When the array is stretched to produce about 20% net strain on the array, the thin film transistor is not crushed or damaged. The transition from the relaxed form to the distorted form was observed as a reversible process. FIG. 9B also shows a plot of drain current versus drain voltage for several potentials applied to the gate electrode, where the stretchable thin film transistor performs well in both relaxed and stretched configurations.

[Example 1] Stretchable single crystal silicon for high performance electronics on a rubber substrate
[0110] The inventors have produced stretchable silicon consisting of sub-micron single crystal devices with a micro-scale periodic wavy geometry configuration. When supported by an elastic substrate, this “wavy” silicon can reversibly stretch to large strain levels without damaging the silicon. The wave amplitude and period change to absorb this deformation, thereby avoiding substantial distortion of the silicon itself. Fully formed, high-performance "wavy" metal oxide semiconductor field effect transistor that can be stretched to similar high strain levels by dielectrics, dopant patterns, electrodes, and other elements directly integrated with silicon , Pn diodes, and other electronic circuit devices.

  [0111] Advances in electronics are primarily driven by efforts to increase circuit operating speed and integration density, reduce circuit power consumption, and enable large area coverage for display systems. A relatively recent direction is to develop methods and materials that allow high performance circuits to be formed on unprecedented substrates: flexible plastic substrates for paper displays and optical scanners, focal planes Unique form factors such as spherical curved surface supports for arrays and comfortable skins for embedded robot sensors. Many electronic materials can provide good flexibility when processed into a thin film shape and placed on a thin substrate sheet or in a neutral mechanical plane of a substrate stack. In these cases, the strain produced in the active material during bending may be well below the normal level (~ 1%) required to cause crushing. Full stretchability is an even more difficult property, but with a device that can bend, stretch or reach the ultimate level of bending during operation, or a support with a complex curved shape Required for devices that can be wound into the same shape. In these systems, circuit-level distortions can exceed the fracture limit of almost all known electronic materials, especially those that are properly developed for existing applications. This problem can be avoided to some extent in circuits that interconnect electronic components (such as transistors) supported by rigid insulated islands using stretchable conductors. Although ideal for applications achievable with active electronics with relatively low coverage, this approach can provide promising results. We report a different approach in which stretchability is achieved directly in high quality single crystal Si thin films with periodic “wave” -like geometry on the micrometer scale. These structures absorb large compression and extension strains by changes in wave amplitude and wavelength rather than the potential fracture strain of the material itself. By integrating such a stretchable wavy Si element with a dielectric, a dopant pattern, and a metal thin film, a high-performance, stretchable electronic device can be obtained.

[0112] FIG. 10 shows a procedure for making a wavy single crystal Si ribbon on an elastomer (rubber) substrate. The first step (upper frame) includes photolithography to define a resist layer on a silicon on insulator (SOI) wafer, followed by etching to remove the exposed portion of the top Si. After removing the resist with acetone, the buried SiO ₂ layer is then etched with concentrated hydrofluoric acid to separate the ribbon from the underlying Si substrate. Both ends of the ribbon are connected to the wafer so as not to be washed off with the etching solution. The width (5-50 μm) and length (-15 mm) of the resist line define the ribbon dimensions. The thickness of the top Si on the SOI wafer (20-320 nm) defines the ribbon thickness. In the next step (center frame), a flat elastomeric substrate ((polydimethylsiloxane) (PDMS) 1-3 mm thick) is elastically stretched and brought into conformal contact with the ribbon. By peeling off the PDMS, the ribbon is lifted off the wafer and remains attached to the PDMS surface. By releasing the strain (ie, pre-strain) of PDMS, the surface deforms and clearly defined waves are formed on the Si and PDMS surfaces (A and B in FIG. 11). The asperity profile is sinusoidal (upper frame, FIG. 11C), periodicity between 5-50 μm and amplitude between 100 nm-1.5 μm depending on Si thickness and level of pre-strain in PDMS. have. For any system, the wave period and amplitude are uniform within ˜5% over a large area (˜cm ² ). The flat form of PDMS between ribbons and the absence of correlated phase in adjacent ribbon waves suggests that the ribbons are not mechanically strongly coupled. C (lower frame) in FIG. 11 shows a micro-Raman measurement of the Si peak, measured as a function of distance along one of the wavy ribbons. This result gives insight into the stress distribution.

[0113] The behavior in such a static wavy configuration is consistent with a nonlinear analysis of the initial buckling geometry in a uniform thin film high modulus layer on a semi-infinite low modulus support.

here,

Is the critical value of buckling, buckling strain ε _pre is the pre-strain level, λ ₀ is the wavelength, and A ₀ is the amplitude. The Poisson's ratio is ν, the Young's modulus is E, and the subscript indicates the characteristics of Si or PDMS. The thickness of Si is h. This process captures many features of the fabricated wavy structure. For example, D in FIG. 11 shows that both the wavelength and amplitude are linearly dependent on the Si thickness if the predistortion value is fixed (˜0.9% for these data). The wavelength does not depend on the level of predistortion (FIG. 12). Further, the measured values were obtained by calculating mechanical properties (E _Si = 130 GPa, E _PDMS = 2 MPa, ν _Si = 0.27, ν _PDMS = 0.48) using Si and PDMS literature values (28, 29). Amplitudes and wavelengths within 10% (maximum deviation) of. By “ribbon distortion” calculated from the ratio of the effective length of the ribbon (determined from the wavelength) to its actual length (determined from the surface distance measured by an atomic force microscope (AFM)), ˜3 For pre-distortion up to .5%, a value approximately equal to that in PDMS is obtained. The peak (ie, maximum) strain in Si itself (which we call Si strain) is the presence of waves and the critical strain (˜0.03% for the case considered here) is bending. When the distortion is small compared to the related peak distortion, it can be estimated from the ribbon thickness and the radius of curvature at the wave extreme value according to κh / 2 where κ is the curvature. For the data in FIG. 11, the peak Si strain is ˜0.36 (± 0.08%), which is less than ½ of the ribbon strain. This Si strain is the same for all ribbon thicknesses and any pre-strain (FIG. 13). The mechanical advantage that the resulting peak Si strain is substantially less than the ribbon strain is very important to achieve stretchability. Buckling thin films have also been observed in metals and dielectrics deposited or spin cast on PDMS (as opposed to pre-formed and transferred single crystal elements and devices as described herein). .

  [0114] The dynamic response of the corrugated structure to compressive and tensile strain applied to the fabricated elastomeric substrate is most important for stretchable electronic devices. To elucidate the mechanism of this process, we measured the geometry of the wavy Si ribbon as a force was applied to the PDMS to compress or stretch parallel to the length of the ribbon. This force causes distortion both in the direction along the ribbon and in the orthogonal direction due to the Poisson effect. Orthogonal distortion results in PDMS deformation primarily in the region between the ribbons. On the other hand, strain along the ribbon is absorbed by changes in this wave structure. The three-dimensional height image and surface profile of FIG. 14A shows a representative state that is compressed, unperturbed, and stretched (collected from slightly different locations on the sample). In these and other cases, during deformation, the ribbon maintains its sinusoidal shape (the right hand panel line of FIG. 14A) shape, but as defined by the area between the ribbons (FIG. 15), Half is below the unperturbed position on the PDMS surface. FIG. 14B shows the wavelength and amplitude for the strain applied in the compression direction (negative direction) and extension direction (positive direction) for the unperturbed state (zero). This data corresponds to an average AFM measurement collected point by point from a large number (> 50) of ribbons. The applied strain was determined from the measured change in the distance between both ends of the PDMS substrate. Direct surface measurement by AFM shows that the strain applied for the case considered here is equal to the ribbon strain (FIG. 16), as well as the closed curve integral estimated from the sinusoidal waveform. (A small amplitude (<5 nm) wave that persists with a pre-strain-extension strain greater than the critical strain can result from a slight slip of Si during the initial buckling process. Calculated in this small (zero) amplitude state. The peak Si strain and ribbon strain underestimated the effective value.) This result shows that there are two physically different responses of the wavy ribbon to the applied strain. In the stretched state, the waves unintuitively develop. The wavelength does not change appreciably with the applied strain, which is consistent with the prebuckling mechanism. Instead, the change in amplitude absorbs the distortion. In this case, the Si strain decreases as the PDMS is stretched and reaches ˜0% when the applied strain is equal to the pre-strain. On the other hand, in the compressed state, the wavelength decreases and the amplitude increases as the applied strain increases. This mechanical response resembles an accordion bellows and is qualitatively different from the stretched behavior. During compression, the radius of curvature decreases at the peaks and valleys of the wave, so the Si strain increases with the applied strain. However, as shown in FIG. 14B, both the increase rate and the magnitude of the Si strain are very low compared to the ribbon strain. These mechanisms allow stretchability.

[0115] The total response in the state of strain consistent with the wavy geometry can be described quantitatively by an equation that depends on its value λ ₀ in the initial buckling state, where the wavelength λ follows the following equation and the _applied strain ε _applied It is.

This stretch / compression asymmetry can result, for example, from a slight reversible separation between the PDMS and Si raised areas formed during compression. For this case, similar to a system that does not exhibit this asymmetric behavior, the wave amplitude A is given by one equation that is valid at lower distortion (<10-15%) for both stretching and compression.

Here, A ₀ is a value corresponding to the initial buckling state. As shown in FIG. 14A, these equations provide quantitative agreement with experiments without parameter approximation. If the wave nature that absorbs the stretch / compression strain persists, the peak Si strain is dominated by the bending term and is given by:

This agrees well with the distortion measured from the curvature of FIG. 14B (see also FIG. 18). Such analytical formulas help define the range of applied strain that the system can hold without destroying the Si. For a pre-strain of 0.9%, if the Si failure strain is ˜2% (for either compression or expansion), this range is −27% to −% 29. The level of pre-strain is controlled to balance the desired degree of compression and stretch deformability by this strain range (ie, approximately 30%). For example, a pre-strain of 3.5% (the maximum value considered by the inventors) gives a range of -24% to 5.5%. Such calculations assume that the strain applied at the ultimate level of deformation is equal to the ribbon strain. Experimentally, PDMS outside the ribbon ends and between the ribbons can absorb the strain, so often exceeds these estimates and the added strain is not completely transferred to the ribbon.

[0116] We started with an additional step at the beginning of the fabrication procedure (FIG. 10, upper frame) to define the pattern of dopants in Si, thin film metal contacts, and dielectric layers using conventional processing techniques. Inclusion created a functional and stretchable device. Two- and three-terminal devices, diodes, and transistors, each made in this way, provide a high degree of functionality to the basic components for the circuit. A double transfer process where the integrated ribbon device is first lifted from the SOI and transferred onto the underlying PDMS slab and then transferred to the pre-strained PDMS substrate is a corrugated with exposed metal contacts for the probe Generated a device. 17A and 17B show optical images and electrical responses of stretchable pn junction diodes with various levels of strain on PDMS. The inventors have observed no systematic variations in device electrical properties to within the range of data distribution during stretching or compression. The deviation of the curve is mainly due to variations in the quality of the probe contacts. As expected, these pn junction diodes can be used as photodetectors or photovoltaic devices (in reverse bias conditions) besides their use as normal rectifying devices. The photocurrent density is ˜35 mA / cm ² with a reverse bias voltage of ˜−1V. With forward bias, the short circuit current density and open circuit voltage are ˜17 mA / cm ² and 0.2 V, respectively, resulting in a fill ratio of 0.3. The shape of the response is consistent with the modeling (solid curve in FIG. 17B). Device characteristics remain substantially unchanged even after ˜100 cycles of compression, expansion and release (FIG. 19). FIG. 17C shows a stretchable wavy Si Schottky barrier metal formed with a thin layer (40 nm) of thermal SiO ₂ as the gate dielectric integrated in the same procedure as used for the pn diode. The current-voltage characteristics of an oxide semiconductor field effect transistor (MOSFET) are shown (33). Device parameters (linear mobility ~ 100 cm ² / Vs (prone to contact limitation), threshold voltage ~ -3V) extracted from electrical measurements of this wave transistor are formed on the SOI wafer under the same processing conditions. Comparable to the device parameters (FIGS. 20 and 21). Like pn diodes, these wave transistors can be reversibly stretched and compressed to large levels of distortion without damaging the device or substantially changing its electrical properties. In both the diode and the transistor, the deformation of the PDMS to the outside of both ends of the device makes the device (ribbon) strain smaller than the added strain. The overall stretchability is obtained from the combined effect of device stretchability and this type of PDMS deformation. With greater compressive strain than discussed here, the PDMS tended to bend to make the probe difficult. At higher tensile strain, depending on the Si thickness, ribbon length, and bond strength between Si and PDMS, the ribbon will either break or slip and remain intact.

[0117] These stretchable SiMOSFETs and pn diodes are only two of the many types of corrugated electronic devices that can be formed. The completed circuit sheet or thin Si plate can also be constructed in uniaxial or biaxial stretchable wavy geometry. In addition to the mechanical characteristics peculiar to wavy diodes, what happens in many semiconductors, by combining strain with electronic characteristics, we design device structures that take advantage of periodic fluctuations in mechanically adjustable strain, and have unique electronic characteristics Opportunities to achieve a response may be obtained. These and other areas are likely for future research.
Materials and methods

[0118] Sample preparation: silicon-on-insulator (SOI) wafers, Si substrate (Soitec Inc.) on SiO ₂ (thickness 145 nm, 145 nm, 200 nm, 400 nm, 400 nm or 1 [mu] m) on Si (thickness 20, 50, 100, 205, 290 or 320 nm). In some cases, we used Si (thickness ~ 2.5 μm) and SiO ₂ (thickness ~ 1.5 μm) SOI wafers on Si (Shin-Etsu Chemical). In all cases, the top Si layer had a resistivity of 5-20 Ωcm and was doped with boron (p-type) or phosphorus (n-type). The top Si layer of these SOI wafers is patterned by photolithography resist (AZ 5124 photoresist, Karl Suss MJB-3 contact mask aligner) and reactive ion etching (RIE) to form a Si ribbon (5-50 μm wide, 15 mm long). ) (Plasma thermal RIE, SF6 40 sccm, 50 mTorr, 100 W). The SiO2 layer is removed by undercut etching in HF (49%), but the etching time mainly depends on the width of the Si ribbon. The lateral etching rate is usually 2 to 3 μm / min. A slab of (polydimethylsiloxane) (PDMS) elastomer (Sylgard 184, Dow Corning) mixes base and hardener in a weight ratio of 10: 1 and cures at 70 ° C. for more than 2 hours or at room temperature for more than 12 hours. It was prepared by.

[0119] These flat slabs of PDMS (thickness 1 to 3 mm) are conformally contacted with the Si of the etched SOI wafer to create a wavy structure. Any method that results in controlled expansion of the PDMS can be used prior to this contact (followed by shrinkage after separation from the wafer). We examined three different approaches. In the first approach, mechanical rolling of PDMS after contacting the SOI substrate caused pre-strain. Although wavy structures can also be made in this way, they tend to have non-uniform wave periods and amplitudes. In the second approach, PDMS (coefficient of thermal expansion = 3.1 × 10 ⁻⁴ K ⁻¹ ) is heated to a temperature between 30 ° C. and 180 ° C. before contact, and cooled after separation from SOI, A wavy Si structure having excellent uniformity over a large area was generated by a highly reproducible method. Using this method, we were able to control the pre-strain level in PDMS very accurately by changing the temperature (FIG. 12). The third method used PDMS stretched on a mechanical stage prior to contact with SOI and was physically released after separation. Like the thermal approach, this method allows for good uniformity and reproducibility, but it is difficult to fine tune the predistortion level compared to the thermal method.

[0120] For devices such as pn junction diodes and transistors, metal layers (Al, Cr, Au) that have been electron beam evaporated (Temescal BJD1800) and photolithographically patterned (by etching or liftoff) serve as contacts and gate electrodes . Silicon ribbons were doped using spin-on dopant (SOD) (B-75X for p-type, USA Honeywell, P509 for n-type, Filmtronics, USA). The SOD material is first spin coated (4000 rpm, 20 s) on a pre-patterned SOI wafer. A silicon dioxide layer (300 nm) prepared by plasma enhanced chemical vapor deposition (PECVD) (plasma heat) was used as a mask for SOD. After heating at 950 ° C. for 10 seconds, both SOD and the masking layer on the SOI wafer were etched away using 6: 1 buffered oxide etchant (BOE). For the transistor device, the gate dielectric was provided with thermally grown silicon dioxide (to a thickness between 25 nm and 45 nm by dry oxidation using a high purity oxygen flow in the furnace at 1100 ° C. for 10-20 minutes). . After completing all device processing steps on SOI, Si ribbons (usually 50μm wide, 15 mm long) having an integrated device structure covered by a photoresist (AZ5214 or Shipley S1818), the underlying SiO ₂ HF etching The device layer was protected during After removing the photoresist layer with oxygen plasma, a flat PDMS (70 ° C., over 4 hours) slab with no pre-strain was used to separate the ribbon device from the SOI substrate in a flat geometry. A partially cured PDMS slab (more than 12 hours at room temperature after mixing of base and hardener) is contacted with a Si ribbon device on fully cured PDMS. After curing of the partially cured PDMS slab is completed (by heating at 70 ° C.), the device is transferred from the original PDMS slab to the new PDMS slab by removing the slab. Predistortion occurs due to the shrinkage associated with cooling to room temperature, as the undulating device results from separation and release. An electrode is exposed for the probe.

[0121] Measurement : Wave characteristics (wavelength, amplitude) were precisely measured using an atomic force microscope (AFM) (DI-3100, Veeco). From the acquired image, a partial profile along the wavy Si was measured and statistically analyzed. A self-made stretch stage was used with AFM and a semiconductor parameter analyzer (Agilent, 5155C) to measure the mechanical and electrical response of wavy Si / PDMS. Raman measurements were performed using 632.8 nm light from a He-Ne laser on a HR 800 spectrophotometric analyzer from Jobin Yvon. The Raman spectrum was measured based on the Si Raman peak intensity by adjusting the focal point so as to maintain the focal position on the upper surface of Si at intervals of 1 μm along the wavy Si. The position of the peak wave number is specified by approximating the measured spectrum with a Lorentz function. Since the peak wavenumber is slightly dependent on the focal position of the microscope, the results of the Raman measurement only give a qualitative insight into the stress distribution.

[0122] Calculation of external length, ribbon strain and silicon strain : The experimental results show that for the range of materials and geometries considered here, wavy Si is a simple sine function: y = Asin (kx) (k = 2π / Λ) can be expressed accurately. So the external length is

Can be calculated as The ribbon distortion of wavy Si is

It calculated using. Peak silicon strain occurs in wave peaks and valleys,

It is possible to calculate using Where h is the thickness of Si, R _c is the radius of curvature at the peak or valley,

Where n is an integer and y "is the second derivative of y with respect to x. Using this sinusoidal approximation for the actual shape, the silicon peak distortion is

Given by. FIG. 12 shows the wavelength as a function of temperature causing pre-strain. As shown in FIG. 13, since the wave amplitude and wavelength are linearly dependent on the thickness (A to h, λ to h), the peak strain does not depend on the Si thickness h. FIG. 15 shows that the wavy structure includes an upward and downward displacement that is approximately equal to the level of the PDMS surface between the ribbons. For the system considered here, the silicon ribbon strain is equal to the added strain (FIG. 16).

[0123] Accordion bellows model: When the silicon can be separated from PDMS in a compressed state, the system is dominated by the accordion bellows mechanism rather than the buckling mechanism. In the bellows case, the wavelength for the _applied compressive strain ε _applied is λ ₀ (1 + ε _applied ), where λ ₀ is the wavelength of the unstrained form as described by equation (2). Since the outer length of the silicon ribbon is approximately the same before and after the compressive strain, we can use the following relationship to determine the wave amplitude A:

This equation is an asymptotic solution for A ₀ / λ ₀ << 1

Have For small compression distortions, this equation is reduced to equation (3). This is also applicable when the Si cannot be separated from the PDMS and the system follows a buckling mechanism. The peak silicon strain is given by:

For relatively small compression strains, this equation is almost the same as equation (4). Peak silicon strain has a similar functional form for both bellows and buckling models, as well as wave amplitude, at the limits of relatively small applied strains. FIG. 18 shows the peak distortion calculated according to the above equation and according to equation (4).

[0124] Device characteristics : A semiconductor parameter analyzer (Agilent, 5155C) and a conventional probe station were used to electrically characterize the wavy pn junction diodes and transistors. The optical response of the pn diode was measured under an irradiation intensity of ˜1 W / cm ² measured with a light intensity measuring device (Ophir Optronics, laser power meter AN / 2). We measured the device during and after stretching and compression using a mechanical stage. As a means to study the reversibility of the process, we performed 3 cycles around ~ 100 cycles of compression (up to ~ 5% strain), extension (up to ~ 15% strain), and release in ambient light. Different pn diodes were measured. FIG. 19 shows the result. Figures 20 and 21 show images, schematics and device measurements from the wavy transistor.

[Example 2] Buckling ribbon of GaAs for high performance electronics on elastomer substrate
[0125] Single crystal GaAs ribbons with thicknesses in the submicron range and distinct "wavy" and / or "buckling" geometries are made. The resulting structure exhibits reversible extensibility and compressibility up to> 10% strain, which is more than 10 times greater than that of GaAs itself, embedded on or in the surface of the elastomeric substrate. By incorporating ohmic and Schottky contacts on GaAs ribbons having these structures, high performance stretchable electronic devices (eg, metal-semiconductor field effect transistors) can be achieved. This type of electronic system, either alone or in combination with similarly designed silicon, dielectric and / or metallic materials, operates at high frequencies with the ability to conform to stretch, extreme flexibility or complex curved surfaces Can be used to form circuits for applications that require

[0126] Performance capability in conventional microelectronics is measured primarily in terms of speed, power efficiency, and integration level. Advances in other, more recent electronics formats are instead driven by the ability to achieve integration on unprecedented substrates (eg, low cost plastics, foils, paper) or cover large areas. The For example, a new form of X-ray medical diagnosis can be achieved with a large area imaging device that wraps the body in a conformation and digitally images the desired tissue. Lightweight, wall-sized displays or sensors that can be deployed on various surfaces and surface shapes provide new technology for architectural design. A variety of materials, including small organic molecules, polymers, amorphous silicon, polycrystalline silicon, single crystal silicon nanowires and microstructured ribbons, serve as semiconductor channels for types of thin-film electronics that have the potential to accommodate these and other applications Has been considered. These materials enable thin-film transistors that have a wide range of mobility (ie 10 ^{−5 to} 500 cm ² / V · s) and can be bent mechanically on a flexible substrate. For applications that require high-speed operation such as large-diameter interference synthetic aperture radar (InSAR) and high-frequency monitoring systems, semiconductors with higher mobility such as GaAs or InP are required. The fragility of single crystal compound semiconductors creates many fabrication challenges that must be overcome in order to fabricate high speed, flexible transistors therewith. We have established a practical approach for building metal semiconductor field effect transistors (MESFETs) on plastic substrates using printed GaAs wire arrays made from high quality bulk wafers. These devices exhibit f _T close to excellent mechanical flexibility and 2GHz even moderate-scale device (e.g. micron gate length). This example was designed with a special geometry that provides not only bendability, but also mechanical stretchability to strain levels well above the inherent yield point of GaAs itself (-2%) (-10%). Demonstrates GaAs ribbon-based MESFETs (as opposed to). The resulting type of stretchable high performance electronic system provides an extremely high level of bendability and the ability to be conformally incorporated into a curved surface. This GaAs system example demonstrates the “wavy” silicon described by the inventors (i) demonstrates the stretchability in GaAs, a material that is much more mechanically fragile than Si in practice. Introducing a new “buckling” geometry that can be used for stretchability with or separately from the “wavy” form of (iii), realizing a new kind of stretchable device (ie, the above MESFET) And (iv) progress in four important respects: demonstrating stretch with greater symmetry over a greater range than that achieved in silicon in compression / extension conditions.

[0127] FIG. 22 shows the steps of making a stretchable GaAs ribbon on an elastomeric substrate made of polydimethylsiloxane (PDMS). This ribbon is produced with multiple epitaxial layers from a high quality GaAs bulk wafer. The wafer was grown on a (100) semi-insulating GaAs (Si-GaAs) wafer with a 200 nm thick AlAs layer, then a 150 nm thick Si-GaAs layer and a 120 nm thick carrier concentration of 4 × 10 ¹⁷ cm ^−3. The silicon-doped n-type GaAs layers are prepared sequentially. The (011) crystal acts as a mask for chemical etching of a surface layer containing (GaAs and AlAs) with a pattern of photoresist lines defined parallel to the transition. By anisotropic etching with an aqueous etchant of H ₃ PO ₃ and H ₂ O ₂ , these top layers have individual lengths and directions defined by the photoresist and sidewalls forming acute angles with the wafer surface. Isolated on the bar. After the anisotropic etching, the photoresist is removed, the wafer is immersed in HF (2: 1 volume ratio between ethanol and 49% aqueous HF) ethanol solution to remove the AlAs layer, and a GaAs ribbon (n-GaAs / Si-GaAs) was isolated. By using ethanol instead of water for this step, cracks that can occur in brittle ribbons due to the action of capillary forces during drying are reduced. The low ethanol surface tension compared to water also minimizes the obstacles caused by drying in the spatial layout of the GaAs ribbon. In the next step, the wafer with the separated GaAs ribbon is brought into contact with the pre-stretched flat slab surface of the PDMS with the ribbon aligned along the direction of stretch. In this case, van der Waals forces dominate the interaction between PDMS and GaAs. If stronger interaction strength is needed, we deposit a thin layer of SiO ₂ on GaAs and UV light-induced ozone (ie, atmospheric oxygen products) just before contact with PDMS. Expose to. Ozone creates a -Si-OH groups on the surface of the PDMS, which reacts with SiO ₂ surface upon contact to form a crosslinked siloxane -Si-O-Si bonds. The deposited SiO ₂ becomes discontinuous at the edge of each ribbon due to its sidewall geometry. For any of the strong and weak bond formation procedures, all ribbons are transferred to the surface of the PDMS by peeling the PDMS from the mother wafer. By relaxing the pre-strain of PDMS, large buckling and / or sinusoidal wave structures are naturally formed along the ribbon. The geometry of the ribbon is strongly dependent on the pre-strain applied to the stamp (defined by ΔL / L), the interaction between the PDMS and the ribbon, and the bending stiffness of the ribbon. For the ribbons investigated here, a high sinusoidal “wave” with a relatively small wavelength and amplitude (FIG. 22, right center frame) with small distortion (<2%) for both strong and weak interactions. To produce. The geometry in these GaAs is similar to that reported for Si. Higher prestrain (eg, up to -15%) can be applied to create similar types of waves with strong bonding interactions between the ribbon and the substrate. In the case of weak interaction strength and large strain, a different type of geometry consisting of aperiodic “buckling” with relatively large amplitude and width (FIG. 22 upper right frame) is formed. In addition, our results show that for any type of structure (buckling and wave), the bending stiffness varies along its length (eg, due to thickness variations associated with the device structure). It shows that they can coexist in the ribbon.

[0128] FIG. 23 is a ribbon of 270 nm thickness (including n-GaAs and Si-GaAs), 100 μm wide (including the ribbon discussed in this example), formed with strong coupling between PDMS (˜5 mm thickness) and ribbon. Shows a plurality of photomicrographs of a wavy GaAs ribbon (having a width of 100 μm). This fabrication follows the procedure for strong bond formation using ₂ nm Ti and 28 nm SiO ₂ layers on GaAs. A ˜1.9% biaxial pre-strain (calculated from the thermal response of PDMS) is caused by thermal expansion (heating to 90 ° C. in an oven) in PDMS immediately before and during bond formation. This heating also accelerates the formation of interfacial siloxane bonds. The prestrain is relaxed by cooling the PDMS to room temperature (˜27 ° C.) after transferring the GaAs ribbon. Frames A, B, and C in FIG. 23 show images collected from the same sample with an optical microscope, a scanning electron microscope (SEM), and an atomic force microscope (AFM), respectively. This image shows the formation of a periodic wavy structure in a GaAs ribbon. This wave is quantitatively analyzed by evaluating line cuts from the AFM image (FIG. 23D) (FIGS. 23E and 23F). The outline parallel to the longitudinal direction of the ribbon clearly shows a periodic wavy profile consistent with a computational approximation to a sine wave (dotted line in FIG. 23E). This result is consistent with the nonlinear analysis of the initial buckling geometry in a uniform thin high elastic layer on a semi-infinite low elastic support. The peak-to-peak amplitude and wavelength associated with this function are determined to be 2.56 and 35.0 μm, respectively. Distortion calculated by the ratio of the horizontal distance (ie wavelength) between two adjacent peaks on the stamp and their actual peak-to-peak profile length (ie surface distance measured by AFM) Will give a value smaller than the pre-distortion in PDMS (ie 1.3%). This difference is due to the low stiffness of PDMS and the island effect associated with the length of the GaAs ribbon being shorter than the length of the PDMS substrate. The surface strain of the GaAs ribbon at the peaks and valleys (we call the maximum GaAs strain) is the thickness and curvature of the ribbon at the peaks or valleys of the wave according to κh / 2 where κ is the curvature. Estimated from the radius. In this evaluation, since PDMS can be treated as a semi-infinite support having a lower elastic modulus than GaAs (Young's modulus of GaAs: 85.5 GPa and Young's modulus of PDMS: 2 MPa), the strain in the PDMS stamp is directly affected by GaAs. Contributions are ignored. For the data in FIG. 23E, the maximum GaAs strain is ˜0.62%, which is less than ½ of the ribbon strain (ie 1.3%). This mechanical advantage provides the stretchability of GaAs ribbons with physics similar to that found for wavy Si.

  [0129] As shown in FIG. 23F, the peak and valley regions of the ribbon are respectively higher and lower than the surface profile level (the right part of the green curve) of the pre-distorted PDMS (ie, no ribbon region). This result shows that the PDMS under the GaAs has a wave-like profile as a result of the upward and downward forces applied to the PDMS by the ridge and valley GaAs ribbons, respectively. It is difficult to directly evaluate the precise geometry of PDMS near the wave peak. The present inventors suspect that in addition to the upward deformation, there is also a lateral constriction due to the Poisson effect. The wavy ribbon on the PDMS stamp can be stretched and compressed by adding strain to the PDMS (so-called added strain, displayed as plus for decompression and minus for compression, respectively). The insets in FIGS. 23A and 23B show an image of a ribbon that deforms to its original flat geometry when a relatively small stretch strain (ie, ˜1.5%) is applied. By further stretching, a large tensile strain is transferred to the flat GaAs ribbon, and when this excessive strain reaches the fracture strain of GaAs, the ribbon breaks. The compressive strain applied to the substrate reduces the wavelength of the wavy ribbon and increases the amplitude. When the bending strain at the peaks (and valleys) exceeds the fracture strain, fracture occurs in the compressed state. This variation in wavelength as a function of strain is consistent with that previously observed in silicon and is different from the prediction of wavelength invariance derived from the ideal model.

[0130] The stretchability of wavy GaAs ribbons can be improved by using a mechanical stage (as opposed to thermal expansion) to increase the pre-strain applied to PDMS. For example, by transferring a GaAs ribbon with a SiO ₂ layer onto the surface of a PDMS stamp with a pre-strain of 7.8%, a wavy ribbon without observable cracks in GaAs was generated (A in FIG. 24). The peak bending strain in this case is estimated to be ~ 1.2%, which is lower than the fracture strain of GaAs (~ 2%). As with this low distortion case, the wavy ribbon moves in an accordion as the system is stretched and compressed (wavelength and amplitude change to absorb the added distortion). As shown in FIG. 24A, the wavelength increases according to the tensile strain until the ribbon becomes flat, and decreases with the compressive strain until the ribbon breaks. These deformations are completely reversible and do not contain any measurable slip of GaAs on PDMS. In contrast to the slightly asymmetric behavior observed in Si ribbons with weak bonds and very low prestrain, the wavelength varies linearly with applied strain in both compression and extension states (FIG. 24). (See black line and symbol in B).

  [0131] In practical applications, it is useful to encapsulate GaAs ribbons and devices in such a way as to maintain their stretchability. As a simple demonstration of one possibility, we molded and cured a PDMS prepolymer on a sample such as that shown in FIG. 24A to embed a ribbon in PDMS. The embedded system exhibits similar mechanical behavior to that of the non-embedded, ie, the wavelength increases when the system is stretched and decreases when the system is compressed (red line and symbol in FIG. 24B). Shrinkage due to curing of the second layer of PDMS produced some modest amount of additional strain (˜1%). This distortion slightly reduced the wavelength of the wavy ribbon, thus slightly expanding the stretch range. FIG. 24B shows this difference. Overall, a system produced with ˜7.8% pre-strain can be stretched and compressed up to ˜10% strain without observable damage to GaAs.

[0132] The wavy GaAs ribbon on the PDMS substrate can be used to make high performance electronic devices such as MESFETs whose electrodes are formed by metallization and processing on the wafer prior to transfer to PDMS. These metal layers change the bending stiffness of the ribbon in a spatially dependent manner. FIG. 25A shows a GaAs ribbon integrated with ohmic stripes (source and drain electrodes) and Schottky contacts (gate electrodes) after transfer to a PDMS substrate with ˜1.9% prestrain. An ohmic contact consisting of a metal stack comprising AuGe (70 nm) / Ni (10 nm) / Au (70 nm) anneals the wafer sequentially at a temperature elevated into the quartz tube with flowing N ₂ (ie at 450 ° C. for 1 minute), These ohmic segments formed on the original wafer by a lithographically defined mask have a length of 500 μm. The distance between two adjacent ohmic contacts is 500 μm (ie channel length). A Schottky contact having a length of 240 μm (gate length) is generated by directly depositing a 75 nm Cr layer and a 75 nm Au layer on a photolithography designed mask by electron beam evaporation. The electrodes are equal to GaAs ribbons, ie have a width of 100 μm, and their relatively large size facilitates the probe. The dimensions of the electrodes and semiconductor channels can be significantly reduced to achieve higher device performance. As shown in FIG. 25A, these stretchable GaAs MESFETS show a short-range periodic wave only in a region where there is no electrode. Due to the additional thickness primarily associated with metal, the absence of waves in relatively thick areas may contribute to their high bending stiffness. The periodic wave can be initialized in a relatively thick region with a pre-distortion greater than −3%. However, in these cases, the ribbon is prone to breakage at the edges of the metal electrode due to critical defects and / or high peak distortions near these edges. The failure mode limits stretchability.

  [0133] To circumvent this limitation, we reduced the strength of the interaction between MESFET and PDMS by eliminating siloxane bonds. For such samples,> 3% pre-strain produced a large aperiodic buckling with a relatively large width and amplitude by physically separating the ribbon from the PDMS surface. FIG. 25B shows this type of system prepared with a prestrain of −7%, where large buckling is formed in a relatively thin area of the device. The separation appears to extend slightly into a relatively thick section with ohmic stripes, as shown by the vertical lines. Contrast variations along the ribbon contribute to the passage associated with reflection and refraction of light through the curved GaAs segment. The SEM image (FIG. 25C) clearly shows the formation of arc buckling and flat unperturbed PDMS. These bucklings show an asymmetric profile (as shown by the red curve) with a tail to the measuring part with an ohmic contact. This asymmetry can contribute to unequal lengths of ohmic stripes and Schottky contacts (500 μm vs. 240 μm) for individual transistors. This type of buckled MESFET can stretch to its original flat state (FIG. 25D) with an applied strain between ˜6% and ˜7%. However, by compressing the system shown in FIG. 25B, the ribbon is continuously separated from the PDMS surface due to weak bonding, resulting in greater buckling. Embedding these devices in PDMS according to the procedure described above eliminates this type of uncontrolled behavior. FIG. 25B shows such a system, where the liquid PDMS precursor fills the gap below the buckling. Fully enclosed PDMS traps the ribbon to prevent its sliding and separation. The embedded device can be reversibly stretched and compressed up to ~ 6% without damaging the ribbon. When the embedded system is compressed by −5.83% (upper frame in FIG. 25E), a wave with less periodicity is formed in the region with the metal electrode as well as a new ripple in the buckling region. These new small wave formations combine with large buckling to increase compressibility. Stretching the system compresses and stretches the PDMS in a manner that allows some of these buckling to be flattened in the buckled region, thereby extending the protruding length of the ribbon (lower frame in FIG. 25E). . These results show the promise for devices with large buckling to achieve extensibility and compressibility available in combination with, or separately from, the wave-like approach, although the geometry is different from the wave. Suggests a good way.

  [0134] The performance of a buckling device can be evaluated by directly probing the current from the source to the drain. FIG. 26A shows a GaAs ribbon device fabricated on a wafer, lifted using a flat PDMS stamp, and transfer printed onto a PDMS substrate with a pre-strain of 4.7%. In this form, the metal electrode is exposed to air for the electrical probe. After the pre-stretched PDMS is relaxed to a strain of 3.4%, a less periodic wave is formed in the thin region of the MESFET (A in FIG. 26, second frame from the top). When the pre-stretched PDMS is completely relaxed, the small waves of the pure GaAs segments coalesce and become large buckled (A in FIG. 26, third frame from the top). The buckling devices can be stretched to their flat state with an applied strain of 4.7% (A in FIG. 26, lower frame). The IV curves of the same device with applied strains of 0.0% (A in FIG. 26, third frame from the top) and 4.7% (A in FIG. 26, bottom frame) are shown in red and black, respectively. Plotted at 26 B. This result shows that the current from the source to the drain of the buckled MESFET on the PDMS substrate can be adjusted sufficiently depending on the voltage applied to the gate, and that the added strain only has a small impact on device performance. It shows no.

  [0135] In summary, this example discloses an approach to forming "buckled" and "wavy" GaAs ribbons embedded on or within a PDMS elastomer substrate. The geometric form of these ribbons depends on the level of pre-strain used in the fabrication, the strength of interaction between the PDMS and the ribbon, and the thickness and type of material used. GaAs multilayer stack buckling and corrugated ribbons and fully formed MESFET devices can adjust their geometry in a way that can absorb the applied strains without transferring them to the material itself, thus providing a high level of compressibility / Shows extensibility. A wide range of others have been achieved by successfully achieving large levels of mechanical extensibility (and consequently other attractive mechanical properties such as extreme bendability) in intrinsically fragile materials such as GaAs. Similar strategies applicable to this kind of material are obtained.

[0136] The thermally induced pre-strain is due to the thermal expansion of the PDMS stamp and has a bulk linear thermal expansion coefficient of α _L = 3.1 × 10 ⁻⁴ μm / μm / ° C. On the other hand, the thermal expansion coefficient for GaAs is only 5.73 × 10 ⁻⁶ μm / μm / ° C. Thus, the pre-strain on PDMS (compared to the GaAs ribbon) for the sample prepared at 90 ° C. and cooled to 27 ° C. is Δα _L × ΔT = (3.1 × 10 ⁻⁴ −5.73 × 10 ^{− 6} ) x (90-27) = 1.9%.

[0137] Method: A GaAs wafer with a specially designed epitaxial layer was purchased from IQE, Bethlehem, PA. The lithography process used AZ photoresists, AZ5214 and AZ nLOF 2020, for positive and negative imaging, respectively. A GaAs wafer with a photoresist mask pattern was different from the etchant (4 mL H ₃ PO ₄ (85 wt%), 52 mL H ₂ O ₂ (30 wt%), and 48 mL deionized water) cooled in a cold water layer. Isotropic etching. The AlAs layer is dissolved with dilute HF solution (Fisher® Chemicals) in ethanol (volume ratio 1: 2). The sample with the released ribbon on the mother wafer is dried in a fume hood. The dried sample is placed in the chamber of an electron beam evaporator (Temescal FC-1800) and sequentially coated with layers of ₂ nm Ti and 28 nm SiO ₂ . Prior to removing the AlAs layer, the metal for the MESFET device is deposited by electron beam evaporation. A mixture of low elasticity PDMS (A: B = 1: 10, slygard 184, Dow Corning) was pre-modified with monolayer (tridecafluoro-1,1,2,2-tetrahydrooctyl) -1-trichlorosilane A ˜5 mm thick PDMS stamp is prepared by pouring onto a piece of silicon wafer, and then baked at 65 ° C. for 4 hours. To produce a strong bond, the stamp is exposed to UV light for 5 minutes. In the transfer process, the stamp is stretched (in an oven) by thermal expansion and / or mechanical force. The wafer with the released ribbon is then contacted for 5 minutes at the elevated temperature (depending on the required pre-strain) stacked on the surface of the stretched PDMS stamp. The mother wafer is peeled from the stamp and all ribbons are transferred to the stamp. The prestrain applied to the stamp is released by cooling to room temperature and / or removal of mechanical force, forming a wave profile along the ribbon. For mechanical evaluation, we use a specially designed stage to stretch and compress PDMS stamps with “wavy” and “buckled” GaAs ribbons.

[Example 3] Two-dimensional stretchable semiconductor
[0138] The present invention provides stretchable semiconductors and stretchable electronic devices that can stretch, compress and / or bend in multiple directions, including directions orthogonal to each other. The stretchable semiconductor and stretchable electronic devices of this aspect of the invention exhibit good mechanical and electronic properties and / or device performance when stretched and / or compressed in multiple directions.

  [0139] FIGS. 27A-C are images at different magnifications of a stretchable silicon semiconductor of the present invention that exhibits stretchability in two dimensions. The stretchable semiconductor shown in FIGS. 27A and 27B was prepared by applying prestrain to an elastic substrate by thermal expansion.

  [0140] FIGS. 28A-C are images of three different structural forms of stretchable semiconductors of the present invention that exhibit stretchability in two dimensions. As shown, the semiconductor structure of FIG. 28A exhibits an edge line wave form, the semiconductor structure of FIG. 28B exhibits a herringbone wave form, and the semiconductor structure of FIG. 28C exhibits a random wave form.

  [0141] FIGS. 29A-D are images of stretchable semiconductors of the present invention created by pre-straining an elastic substrate by thermal expansion.

  [0142] FIG. 30 is an optical image of a stretchable semiconductor exhibiting two-dimensional stretchability prepared by applying pre-strain to an elastic substrate by thermal expansion. FIG. 30 shows images corresponding to various expansion and compression conditions.

  [0143] FIG. 31A is an optical image of a stretchable semiconductor that is two-dimensionally stretchable and produced by applying pre-strain to the elastic substrate by thermal expansion. 31B and 31C show the experimental results regarding the mechanical properties of the stretchable semiconductor shown in FIG. 31A.

Reference 1. S. R. Forrest, Nature 428, 911 (2004).
2. For recent progress and reviews, see Proc. IEEE 93, Iss. 7 and 8 (2005).
3. J. et al. A. Rogers et al., Proc. Nat. Acad. Sci. USA 98, 4835 (2001).
4). H. O. Jacobs, A .; R. Tao, A .; Schwartz, D.C. H. Gracias, G. et al. M.M. Whitesides, Science 296, 323 (2002).
5. H. E. A. Huitema et al., Nature 414, 599 (2001).
6). C. D. Sheraw et al., Appl. Phys. Lett. 80, 1088 (2002).
7). Y. Chen et al., Nature 423, 136 (2003).
8). H. C. Jin, J .; R. Abelson, M.M. K. Erhardt, R.A. G. Nuzzo, J. et al. Vac. Sci. Techn. B 22,2548 (2004).
9. P. H. I. Hsu et al., IEEE Trans. Electron. Dev. 51, 371 (2004).
10. T.A. Someya et al., Proc. Nat. Acad. Sci. USA 101, 9966 (2004).
11. H. C. Lim et al., Sens. Act. A 119, 2005, 332 (2005).
12 J. et al. Vandeptute et al., US Patent 6,580,151 (2003).
13. T.A. Sekitani et al., Appl. Phys. Lett. 86, 2005, 073511 (2005).
14 E. Menard, R.M. G. Nuzo, J .; A. Rogers, Appl. Phys. Lett. 86, 2005, 093507 (2005).
15. H. Gleskova et al. Noncryst. Sol. 338, 732 (2004).
16. S. -H. Hur, O .; O. Park, J. et al. A. Rogers, Appl. Phys. Lett. 86, 243502 (2005).
17. X. F. Duan et al., Nature 425, 274 (2003).
18. Z. Suo, E .; Y. Ma, H .; Gleskova, S .; Wagner, Appl. Phys. Lett. 74, 1177 (1999).
19. Y. -L. Loo et al., Proc. Nat. Acad. Sci. USA 99, 10252 (2002).
20. T.A. Someya et al., Proc. Nat. Acad. Sci. USA 102, 12321 (2005).
21. S. P. Lacour, J. et al. Jones, S.M. Wagner, Z .; G. Suo, Proc. IEEE 93, 1459 (2005).
22. S. P. Lacour et al., Appl. Phys. Lett. 82, 2404 (2003).
23. D. S. Gray, J. et al. Tien, C.I. S. Chen, Adv. Mater. 16, 393 (2004).
24. R. Faez, W.M. A. Gazotti, M .; A. De Paul, Polymer 40, 5497 (1999).
25. C. A. Marquette, L.M. J. et al. Blum, Biosens. Bioelectron. 20, 197 (2004).
26. X. Chen, J. et al. W. Hutchinson, J. et al. Appl. Mech. 71, 597 (2004).
27. Z. Y. Huang, W.H. Hong, Z .; Suo, J .; Mech. Phys. Solids 53, 2101 (2005).
28. Properties of Silicon (An INSPEC publication, New York, 1988).
29. A. Bietsch, B.M. Michel, J.M. Appl. Phys. 88, 4310 (2000).
30. N. Bowden et al., Nature 146, 146 (1998).
31. W. T.A. S. Huck et al., Langmuir 16, 3497 (2000).
32. C. M.M. Stafford et al., Nat. Mater. 3, 545 (2004).
[1] R.M. H. Reuss, B.M. R. Chalamara, A .; Moussessian, M.M. G. Kane, A .; Kumar, D.A. C. Zhang, J. et al. A. Rogers, M.M. Hatalis, D.M. Temple, G .; Model, B.M. J. et al. Eliasson, M.M. J. et al. Estes, J. et al. Kunze, E .; S. Handy, E .; S. Harmon, D.H. B. Salzman, J .; M.M. Woodall, M.M. A. Alam, J .; Y. Murthy, S.M. C. Jacobsen, M .; Oliver, D.C. Markus, P.M. M.M. Campbell, E .; Snow, Proc. IEEE 2005, 93, 1239.
[2] K. Jain, M.M. Klosner, M.M. Zemel. S. Raghandan, Pro. IEEE 2005, 93, 1500.
[3] A. Nathan, B.M. -K. Park, Q.M. Ma, A .; Sazonov, J. et al. A. Rowlands, Microelectronics Reliability 2002, 42, 735.
[4] Reviews: a) H.R. Sirringhaus, Adv. Mater. 2005, 17, 2411. b) S.M. R. Forrest, Nature 2004, 428, 911. c) C.I. R. Newman, C.I. D. Frisbee, D.M. A. da Silva Filho, J.A. -L. Bredas, P.M. C. Ewbank, K.M. R. Mann, Chem. Mater. 2004, 16, 4436. d) H. E. Katz, Z .; Bao, S.M. Gilat, Acc. Chem. Res. 2001, 34, 359. e) H.M. E. Katz, Chem. Mater. 2004, 16, 4748. f) Y. Sun, Y. et al. Liu, D .; Zhu, J. et al. Mater. Chem. 2005, 15, 53.
[5] a) D.E. Knipp, R .; A. Street, A.M. Volkel, J. et al. Ho, J. et al. Appl. Phys. 2003, 93, 347. b) C.I. -W. Chu, S .; -H. Li, C.I. -W. Chen, V .; Shrotria, Y., et al. Yang, Appl. Phys. Lett. 2005, 87, 193508. c) B. S. Ong, Y .; Wu, P .; Liu, Proc. IEEE 2005, 93, 1412.
[6] a) G.G. H. Gelinck, H.C. E. A. Juitema, E .; Van Veenendaal, E.A. Canatore, L.M. Schrijnemarkers, J.A. B. P. H. Van der Putten, T.W. C. T.A. Geuns, M .; Benehakers, J.A. B. Giesbers, B.M. -H. Huisman, E .; J. et al. Meijer, E .; M.M. Benito, F.M. J. et al. Towslager, A.M. W. Marsman, B.M. J. et al. E. Van Rens, D.C. M.M. de Leeuw, Nat. Mater. 2004, 3, 106. b) J.M. A. Rogers, Z .; Bao, K .; Baldwin, A .; Dodabalapur, B.M. Crone, V.M. R. Raju, V.M. Kuck, H.C. Katz, K.K. Amundson, J.M. Ewing, P.M. Drzaic, Proc. Natl. Acad. Sci. USA 2001, 98, 4935. c) T.W. Someya, Y .; Kato, S .; Iba, Y. et al. Noguchi, T .; Sekitani, H .; Kawaguchi, T .; Sakurai, IEEE Trans. Electron Devices 2005, 52, 2502. d) T.W. Someya, Y .; Kato, T .; Sekitani, S .; Iba, Y. et al. Noguchi, Y .; Murase, H.M. Kawaguchi, T .; Sakurai, Proc. Natl. Acad. Sci. USA 2005, 102, 12321.
[7] single crystal a) V. C. Sundar, J .; Zaumsel, V.M. Podzorov, E .; Menard, R.M. L. Willett, T .; Someya, M .; E. Gershenson, J. et al. A. Rogers, Science 2004, 303, 1644. E. Menard, V.M. Podzoeov, S.M. -H. Hur, A .; Gaur, M .; E. Gershenson, J. et al. A. Rogers, Adv, Mater. 2004, 16, 2097. c) V. Podzorov, E .; Menard, J.M. A. Rogers, M.M. E. Gershenson, Phys. Rev. Lett. 2005, 95, 226601. d) W. -L. Chou, H.C. -L. Cheng, Adv. Func. Mater. 2004, 14, 811. e) M.M. Mas-Torrent, P.M. Hadley, N .; Crivillers, J.A. Veciana, C.I. Rovira, ChemPhysChem 2006, 7, 86.
[8] a) M.M. Halik, H .; Klauk, U .; Zschieschang, G.M. Schmid, C.I. Dehm, M.M. Schutz, S.M. Maisch, F.M. Effenberger, M.M. Brunnbauer, F.M. Stellacci, Nature 2004, 431, 963. b) M.M. -H. Yoon, H .; Yan, A .; Facetti, T .; J. et al. Marks, J. et al. Am. Chem. Soc. 2005, 127, 10388. c) Y. Jang, D.D. H. Kim, Y .; D. Park, J. et al. H. Cho, M .; Hwang, K .; Cho, Appl. Phys. Lett. 2006, 88, 072101.
[9] a) M.M. C. Hamilton, S.M. Martin, J.M. Kanicki, Chem. Mater. 2004, 16, 4699. b) M.M. J. et al. Deen, M.M. H. Kazemeini, Y. et al. M.M. Hadara, J .; Yu, G .; Vamvounis, S.M. Holdcroft, W.M. Woods, IEEE Trans. Electron Devices 2004, 51, 1892. c) K.K. Cheng, M.C. -H. Yang, W .; W. W. Chiu, C.I. -Y. Huang, J. et al. Chang, T.A. -F. Ying, Y. Yang, Macromol. Rapid Commun. 2005, 26, 247.
[10] a) E.E. Fortunato, L.M. Pereira, H.M. Aguas, I. et al. Ferreira, R.M. Martins, Proc. IEEE 2005, 93, 1281. b) A. Sazonov, D.M. Striachilev, C.I. -H. Lee, A.M. Nathan, Proc. IEEE 2005, 93, 1420. c) A. J. et al. Flewitt, w. I. Milne, Proc. IEEE 2005, 93, 1364. d) P.I. Servati, A .; Nathan, Proc. IEEE 2005, 93, 1257.
[11] a) C.I. -S. Yang, L .; L. Smith, C.I. B. Arthur, G .; N. Parsons, J .; Vac. Sci. Technol. B 2000, 18, 683. b) P.I. I. Hsu, H .; Gleskova, M .; Huang, Z .; Suo, S .; Wagner, J. et al. C. Sturm, J .; Non-Crystalline Solids 2002, 299-302, 1355.
[12] Y. Chen, J. et al. Au, P.M. Kazlas, A.M. Ritenour, H.C. Gates, M.M. McCreary, Nature 2003, 423, 136.
[13] a) M.M. Wu, S .; Wagner, Appl. Phys. Lett. 2001, 78, 3729. b) S.M. Wagner, H.C. Gleskova, I.D. -C. Cheng, M.C. Wu, Thin Solid Films 2003, 430, 15. c) M.M. Wu, S .; Wagner, Appl. Surf. Sci. 2001, 175-176, 753.
[14] a) S.I. V. Karnik, M .; K. Hatalis, Jpn. J. et al. Appl. Phys. 2003, 42, 1200. c) S.M. V. Karnik, M .; K. Hatalis, Solid-State Electronics 2003, 47, 653.
[15] P.I. K. Shetty, N .; D. Theodore, J. et al. Ren, J. et al. Menendez, H.M. C. Kim, E .; Misra, J. et al. W. Mayer, T .; L. Alford, Mater. Lett. 2005, 59, 872.
[16] A. Imparato, C.I. Minarini, A.M. Rubino, P.M. Tassini, F.M. Villani, D.C. D. Sala, E .; Amendola, M .; Kunst, H.C. -C. Neitzert, S .; Bellome, Thin Solid Film 2005, 487, 58.
[17] X. Duan, C.D. Niu, V .; Sahi, J. et al. Chen, J. et al. W. Parce, S.M. Empedocles, J.M. L. Goldman, Nature 2003, 425, 274.
[18] M.M. C. McAlpine, R.M. S. Friedman, S .; Jin, K .; -H. Liu, W .; U. Wang, C.I. M.M. Lieber, Nano Lett. 2003, 3, 1531.
[19] E.E. Menard, K.M. J. et al. Lee, D.C. -Y. Khang, R.A. G. Nuzzo, J. et al. A. Rogers, Appl. Phys. Lett. 2004, 84, 5398.
[20] E.E. Menard, R.M. G. Nuzzo, J. et al. A. Rogers, Appl. Phys. Lett. 2005, 86, 093507.
[21] Z. -T. Zhu, E .; Menard, K.M. Hurley, R.A. G. Nuzzo, J. et al. A. Rogers, Appl. Phys, Lett, 2005, 86, 133507.
[22] K.K. J. et al. Lee, M.C. J. et al. Motala, M .; A. Meitl, W .; R. Children, E.M. Menard, A.M. K. Shim, J .; A. Rogers, R.A. G. Nuzzo, Adv. Mater. 2005, 17, 2332.
[23] Y. Sun, S .; Kim, I .; Adesida, J .; A. Rogers, Appl. Phys. Lett. 2005, 87,083501.
[24] Y. Sun, E .; Menard, J.M. A. Rogers, H.C. -S. Kim, S .; Kim, G .; Chen, I. et al. Adesida, R.A. Dettmer, R.A. Cortez, A .; Tewksbury, Appl. Phys. Lett. submitted.
[25] D.E. -T. Khang, H .; Jiang, Y. et al. Huang, J. et al. A. Rogers, Science 2006, 311, 208.
[26] Y. Sun, J. et al. A. Rogers, Nano Lett. 2004, 4, 1953.
[27] Y. Sun, D.D. -Y. Khang, F.A. Hua, K .; Hurley, R.A. G. Nuzzo, J. et al. A. Rogers, Adv. Funct. Mater. 2005, 15, 30.
[28] T.M. Buma, M .; Spisar, M .; O'Donnell, Appl. Phys. Lett. 2001, 79, 548.
[29] Z. T.A. Huang, W.H. Hong, Z .; Suo, J .; Mech. Phys. Solids 2005, 53, 2101.
[30] S.M. Wagner, S.W. P. Lacour, J. et al. Jone, P.M. -H. I. Hsu, J .; C. Sturm, T .; Li, Z. Suo, Physica E 2005, 25, 326.

Reference for incorporation by reference and modification
[0144] The following references relate to self-assembly techniques that can be used in the method of the present invention for the transfer, assembly and interconnection of printable semiconductor elements by contact printing and / or solution printing techniques, in their entirety. Incorporated herein by reference: (1) “Guided molecular self-assembly: a review of present effort”, Jiyun C Huie Smart Mater. Struct. (2003) 12, 264-271; (2) “Large-Scale Hierarchical Organization of Nanowire Arrays for Integrated Nanosystems”, Whang, D .; Jin, S .; Wu, Y .; Liever, C .; M.M. Nano Lett. (2003) 3 (9), 1255-1259; (3) “Directed Assembly of One Dimensional Nanostructures into Functional Networks, Yu Huang, Xiangfeng Duan. Lieber, Science (2001) 291, 630-633; and (4) “Electric-field assisted assembly and metallic of nanowires”, Peter A. et al. Smith et al. , Appl. Phys. Lett. (2000) 77 (9), 1399-1401.

  [0145] All references, such as patent documents, issued patents, published patent applications, unpublished patent applications, and non-patent documents or other materials, including issued or allowed patents or equivalents, are individually referenced throughout this application. To the extent that each reference is at least partially consistent with the disclosure of this application (for example, a reference that is not partially consistent is a part of that reference that is not partially consistent). All of which are incorporated by reference).

  [0146] Any appendices of this document are incorporated by reference as part of this specification and / or drawings.

  [0147] The terms "comprise", "comprising", "comprising" and "comprising" are used herein as they refer to the described feature, integer Should not be construed as specifying the presence of steps, components, or the presence or addition of one or more other features, integers, steps, components, or groups thereof. Individual embodiments of the invention are also intended to be covered, and the terms “comprising” or “comprising” or “comprising” are grammatically similar terms, eg, “ It also describes alternative embodiments that are selectively replaced with “consisting of” or “consisting essentially of” and thus do not necessarily have the same extent.

  [0148] The invention has been described with reference to various specific and preferred embodiments and techniques. However, it should be understood that many modifications and variations are possible while remaining within the spirit and scope of the invention. Those skilled in the art will be able to apply compositions, methods, devices, device elements, materials, procedures, and techniques other than those described in detail herein to practice the invention broadly disclosed herein without resorting to undue experimentation. It is clear that there is. All technically known functional equivalents of the compositions, methods, devices, device elements, materials, procedures, and techniques described herein are intended to be covered by the present invention. Whenever a range is disclosed, it is intended that all subranges and individual values be covered as if they were implemented separately. The present invention should not be limited by the disclosed embodiments, including anything shown in the drawings or illustrated in the specification, which is given for illustration or description, not limitation. It is. It is intended that the scope of the invention be limited only by the claims.

700 ... Stretchable semiconductor element, 705, 777 ... Flexible substrate, 710 ... Support surface, 715 ... Curved semiconductor structure, 720 ... Curved inner surface, 730 ... Deformation axis, 750 ... Depression region, 760 ... Convex shape, 776 ... Semiconductor structure.

Claims (27)

A flexible substrate;
A circuit pattern comprising at least one stretchable semiconductor structure, supported by the surface of the flexible substrate, and a circuit pattern;
An encapsulating layer or coating;
With
The encapsulation layer or coating at least partially encapsulates the circuit pattern ;
At least partially encapsulated portion of the circuit pattern comprises the at least one stretchable semiconductor structure;
Wherein the at least one stretchable semiconductor structure has a curved table surface giving elasticity to isolate the circuit pattern from the strain applied to the at least one stretchable semiconductor structure, stretchable electronics.   The stretchable electronic circuit according to claim 1, comprising the encapsulating layer, wherein the encapsulating layer includes an additive.   The stretchable electronic circuit of claim 1, comprising the coating, wherein the coating includes an additive. The curved table surface, at least one raised region, a combination of at least one recessed area, or at least one raised region at least one recessed area, stretch of claim 1 Electronic circuit. The curved table surface has a combination of convex regions and concave regions, stretchable electronic circuit according to claim 4. The curved table surface has a contour profile that includes a periodic wave or aperiodic wave, stretchable electronic circuit according to claim 1. The curved table surface has a contour profile that varies spatially in one dimension, stretchable electronic circuit according to claim 1. Wherein the at least one stretchable semiconductor structure comprises an array or pattern of stretchable semiconductor structure having a curved table surface, stretchable electronic circuit according to claim 1.   The stretchable structure of claim 1, wherein the circuit pattern comprises at least one metal interconnect having a corrugated or wrinkled configuration, the metal interconnect electrically connecting device components of the circuit pattern. Electronic circuit.   The stretchable electronic circuit of claim 1, wherein the encapsulating layer or coating comprises a polymer.   The stretchable electronic circuit of claim 1, wherein the encapsulation layer or coating comprises polyimide.   The stretchable electronic circuit of claim 1, wherein the flexible substrate comprises a polymer.   The discrete points of the at least one stretchable semiconductor structure are coupled to the surface of the flexible substrate, and the discrete points of coupling are coupled by a buckling region of the at least one stretchable semiconductor structure that is not directly coupled to the flexible substrate. The stretchable electronic circuit of claim 1, wherein the stretchable electronic circuit is spaced apart from each other. A flexible substrate;
An intermediate layer at least partially supported on the surface of the flexible substrate;
A circuit pattern comprising at least one stretchable semiconductor structure, supported by the surface of the flexible substrate, and at least partially embedded in the intermediate layer; and
An encapsulating layer or coating;
With
The encapsulation layer or coating at least partially encapsulates a portion of the circuit pattern that is not embedded in the intermediate layer ;
At least partially encapsulated portion of the circuit pattern comprises the at least one stretchable semiconductor structure;
Wherein the at least one stretchable semiconductor structure has a curved table surface giving elasticity to isolate the circuit pattern from the strain applied to the at least one stretchable semiconductor structure, stretchable electronics.   The stretchable electronic circuit according to claim 14, comprising the encapsulating layer, wherein the encapsulating layer includes an additive.   The stretchable electronic circuit of claim 14, comprising the coating, wherein the coating includes an additive.   The stretchable electronic circuit of claim 14, wherein the intermediate layer comprises at least one of fiber, paper, foil, structure accelerator, and filler. The curved table surface has a contour profile having a combination of at least one recessed area and at least one convex region, stretchable electronic circuit according to claim 14. Wherein the at least one stretchable semiconductor structure comprises an array or pattern of stretchable semiconductor structure having a curved table surface, stretchable electronic circuit according to claim 14.   The stretchable electronic circuit according to claim 14, wherein the intermediate layer is an adhesive layer, a laminated layer, a coating, or a thin film.   The stretchable electronic circuit of claim 14, wherein the intermediate layer comprises polyimide.   The stretchable electronic circuit of claim 14, wherein the encapsulating layer or coating comprises polyimide.   The stretchable electronic circuit of claim 14, wherein the flexible substrate comprises a polymer.   The stretchable electronic circuit of claim 14, wherein the flexible substrate has a first Young's modulus, and the encapsulation layer or coating comprises a polymer having a second Young's modulus that is less than the first Young's modulus. .   The stretchable electronic circuit according to claim 24, wherein the intermediate layer has a third Young's modulus smaller than the first Young's modulus of the flexible substrate.   15. The stretchability of claim 14, wherein the circuit pattern comprises at least one metal interconnect having a corrugated or wrinkled configuration, the metal interconnect electrically connecting device components of the circuit pattern. Electronic circuit.   The circuit pattern comprises at least one electronic device island coupled to the at least one stretchable semiconductor structure, and the encapsulation layer or coating at least partially encapsulates the at least one electronic device island. 14. The stretchable electronic circuit according to 14.