JP5577799B2 - In-vehicle motor drive control method - Google Patents

Description

  The present invention relates to a drive control method for PWM drive control of an in-vehicle motor.

  In recent years, in the technical field of in-vehicle motor controllers, an LC filter is provided to prevent noise generation when performing PWM control or the like. By providing this LC filter, generation of AM noise is suppressed. In recent years, there has been a desire to reduce the cost by simplifying and downsizing the LC filter. However, when PWM control is performed by applying a single frequency, there is a limit to downsizing the LC filter that satisfies the specifications. Therefore, when PWM control is performed, a technique of reducing the peak level of noise by spreading the spectrum of the fundamental frequency of the motor is provided as a technique for reducing motor noise (see, for example, Patent Document 1).

  However, even if the technical idea described in Patent Document 1 is applied, the diffusion range of the fundamental frequency is narrow and noise is large. A similar method is also disclosed in Patent Document 2, and although the average energy of noise can be reduced as compared with the case where a single driving frequency is used, the energy of harmonics is concentrated near an integral multiple of the center frequency. Resulting in.

JP 2000-217395 A JP 2007-43818 A

  The present invention has been made in view of the above circumstances, and an object thereof is to provide a drive control method for an on-vehicle motor that can reduce noise generated in accordance with motor drive.

According to the first aspect of the present invention, since the single drive frequency is sequentially changed within the frequency range of 180 kHz to 500 kHz, drive control can be performed within the frequency range outside the AM band, and AM noise can be suppressed. Moreover, the bandwidth of the AM broadcast is in a range of 510 to 2620 kHz between a frequency value obtained by adding the AM radio reception frequency to a multiple of the single drive frequency to be used and a frequency value of a multiple of the random single drive frequency. Since each single drive frequency is set so as to be separated by (15 kHz) or more, harmonic components are less likely to appear in the AM band frequency range, and AM noise can be suppressed.
According to the invention described in claim 2, since the continuous time for continuously driving the vehicle-mounted motor is set to a time shorter than the period corresponding to the predetermined frequency exceeding the audible frequency range, the audible frequency band even if the frequency is sequentially changed No frequency component appears. Therefore, an audible frequency component is less likely to be detected as noise, and an unpleasant sound can be reduced.

According to the third aspect of the present invention, the frequency pattern is not repeated more than a predetermined number of times in the period of the audible frequency when sequentially different random single drive frequencies include a frequency pattern composed of a plurality of single drive frequencies. Thus, since random single drive frequencies that are sequentially different are selected, noise at an audible frequency can be suppressed.

When generating a random single drive frequency, a pseudo-random number based on a polynomial may be used as in the invention described in claim 4 , or a natural random number generation utilizing semiconductor thermal noise as in the invention described in claim 5. A vessel may be used.

According to the invention described in claim 6, since the frequency of the timing pulse for converting the current flowing through the vehicle-mounted motor from the analog value to the digital value by the A / D converter is a random frequency, the harmonic component based on the conversion timing pulse Can be suppressed, and noise can be reduced.

According to the seventh aspect of the invention, the conversion timing pulse by the A / D converter is configured to synchronize with the PWM signal having a random driving frequency when the PWM driving control is performed, so that the frequency of the conversion timing pulse is random. Therefore, the circuit for generating the PWM signal and the circuit for generating the conversion timing pulse can be shared, and the circuit scale can be suppressed.

According to the eighth aspect of the invention, since the conversion timing pulse by the A / D converter is set to one pulse for a plurality of pulses of the PWM signal, the frequency of the conversion timing pulse can be reduced, and the frequency used at the time of transmission / reception is The influence given to other in-vehicle devices (for example, smart key system) comparatively low can be suppressed as much as possible.

According to the invention of claim 9, since the conversion timing pulse by the A / D converter is a pulse signal having a random frequency that is asynchronous and independent of the PWM signal by a random drive frequency when PWM drive control is performed. It is possible to prevent as much as possible the concern that the noise level rises due to the superposition of the PWM signal and harmonics of the conversion timing pulse.

The block diagram which shows the structure of the principal part about 1st Embodiment of this invention. The figure which shows an example of the combination of the duty ratio corresponding to a drive frequency and a drive frequency Diagram showing drive frequency over time and power spectrum schematically FIG. 3 equivalent diagram showing a comparative example Random frequency condition explanation diagram Flow chart schematically showing the operation Table showing an example of a drive frequency list according to the current detection value FIG. 1 equivalent view showing a second embodiment of the present invention Timing chart showing the signal waveform of the main part FIG. 1 equivalent view showing a third embodiment of the present invention Fig. 9 equivalent FIG. 1 equivalent view showing a fourth embodiment of the present invention Block diagram schematically showing the configuration of the random number generator Fig. 9 equivalent

(First embodiment)
Hereinafter, a first embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram schematically showing the configuration of an in-vehicle motor drive control device.

  As shown in FIG. 1, the on-vehicle motor drive control device 1 includes a control unit 2, a command unit 3, and a drive unit 4, and includes a microcomputer, for example. The in-vehicle motor drive control device 1 controls the drive unit 4 based on a control signal from the control unit 2, and the drive unit 4 drives an in-vehicle motor 5 formed of a DC motor.

  The current detection unit 6 detects an energization current flowing through the in-vehicle motor 5. The command unit 3 outputs a drive frequency and a duty ratio command value to the control unit 2 based on the detection result detected by the current detection unit 6. The command unit 3 includes a feedback control unit 7, a database 8, and a selection unit 9, and has a function as a pattern control unit. The feedback control unit 7 outputs a control command signal to the control unit 2 based on the current of the in-vehicle motor 5 detected by the current detection unit 6. The database 8 stores a large number of combinations of drive frequencies and duty ratios corresponding to the drive frequencies. FIG. 2 shows an example of these combinations.

  As shown in FIG. 2, the database 8 stores a large number of single drive frequencies f1 to fz, duty ratios D1 to Dz, and current detection values I1 to Iz corresponding to each other. These combinations are selected in advance so that noise appearing in the AM band (510 kHz to 1710 kHz) can be reduced.

  The drive frequencies f1 to fz indicate PWM drive frequencies when the in-vehicle motor 5 is subjected to PWM drive control, and are selected in advance as follows. The drive frequency candidates at the time of PWM drive control are, for example, any one of a plurality of frequencies in a 1 kHz step within a predetermined range of 180 kHz to 500 kHz.

  This is because when the driving frequency is set to less than 180 kHz, harmonics are likely to appear in the AM band (510 kHz to 1710 kHz), and when the frequency exceeding 500 kHz is selected, the AM band is directly disturbed. In addition, the low frequency of less than 180 kHz is a frequency band used in other vehicle equipment (for example, smart key) particularly for in-vehicle applications, and is a frequency band that is inappropriate for PWM drive control. For this reason, it is selected in the range of 180 kHz to 500 kHz.

  Further, a frequency at which these harmonics are separated by a margin frequency (AM band bandwidth: 15 kHz) or more is selected (first condition). This is because it has been confirmed that in order to reduce the peak level of radio noise in the AM band, it is preferable to set the harmonics to a frequency condition as far as possible.

  In addition, the AM radio reception frequency +910 kHz is selected so as to be separated from the harmonic due to the drive frequency by a margin frequency (AM broadcast bandwidth: 15 kHz) or more (second condition). This is to prevent image interference in the AM radio frequency band.

  The AM radio is generally configured with an intermediate frequency of 455 kHz. For example, when receiving an 800 kHz broadcast, a local oscillation frequency of 1255 kHz is set in the AM radio. In this case, since a signal of 1255 + 455 = 1710 kHz is also received as an image, it is preferable to set the drive frequency and its combination so that no harmonic appears at 800 + 910 = 1710 kHz. In order to improve the reliability, it is preferable to set the frequency to be more than the margin frequency (AM broadcast bandwidth: 15 kHz) from the frequency in the range of 510 to 2620 kHz.

  The database 8 stores duty ratios D1 to Dz corresponding to these single drive frequencies f1 to fz, respectively. These duty ratios indicate duty ratios when the on-vehicle motor 5 is PWM-driven. For example, the duty ratio D1 corresponding to the drive frequency f1 is selected in advance as follows.

  When the drive unit 4 drives the vehicle-mounted motor 5 at a single drive frequency f1, the noise that appears in the AM band is observed with the duty ratio changed in a desired range. When the duty ratio is changed when driven at a certain predetermined drive frequency, the noise component appearing in the AM band also changes. However, the duty condition is such that the noise is minimized in the AM band and is in a practical range (0%, 100). Select the duty ratio D1 in the range excluding%. In this manner, experimentally and practically predetermined duty ratios D1 to Dz are respectively selected.

  The database 8 stores current detection values I1 to Iz corresponding to these single drive frequencies f1 to fz and duty ratios D1 to Dz. These current detection values I1 to Iz indicate detection values of the current flowing through the in-vehicle motor 5 when the drive frequencies f1 to fz and the duty ratios D1 to Dz selected as described above are set.

  The detected current values I1 to Iz do not coincide with a desired current command value when driving the in-vehicle motor 25. Therefore, as will be described later, current control is performed by averaging with a time-weighted average or the like so as to approach the current command value.

  The selection unit 9 selects any one of a plurality of combinations (single drive frequency, duty ratio, current detection value) stored in the database 8, and the command unit 3 passes the feedback control unit 7 to the control unit 2. Command.

  The control unit 2 includes a main control unit 10, a frequency control unit 11, and a duty control unit 12. The frequency control unit 11 performs PWM frequency control, and the duty control unit 12 performs PWM duty ratio control. The main control unit 10 performs PWM drive control of the drive unit 4 based on these controls. The control unit 2 controls the drive of the drive unit 4 by switching the drive frequencies f1 to fz in time.

  FIG. 3 schematically shows a temporal change of the driving frequency and shows a power spectrum of harmonics in the AM band. As shown in FIG. 3, the driving frequency changes “randomly” in time, and is thus spread in a pseudo manner by frequency hopping.

  The maximum continuous time t1 for driving and controlling the in-vehicle motor 5 at a single drive frequency is less than a cycle (for example, a predetermined time of about 50 us) corresponding to a predetermined frequency (for example, about 20 kHz) exceeding a predetermined audible frequency range (for example, 15 kHz). Is set. Although the continuous time when the drive frequency is the same is illustrated as being set to the same time, these may be the same or different.

  Further, the drive frequency is spread within a predetermined frequency range fwa and fwb around a predetermined center frequency fa and fb, respectively, and a predetermined margin frequency range fwc (for example, between these frequency ranges fwa and fwb) About 15 kHz).

  In this case, since the PWM signal is a rectangular wave, the harmonic component of the PWM signal is generated at a frequency that is an integral multiple (n times) of the fundamental frequency. When the predetermined margin frequency range fwc is provided between the frequency ranges fwa and fwb, the margin frequency range fwc is also provided between the respective harmonic spectrum components. Each spectrum component has a lower maximum value Pm1 of its power P.

  FIG. 4A and FIG. 4B show comparative examples of power spectra. FIG. 4A shows a power spectrum in the case where the drive frequency of the PWM signal is constant with time. The maximum value Pm2 of the fundamental and harmonic powers is higher than the maximum value Pm1 of the power.

  FIG. 4B shows that the drive frequency of the PWM signal changes stepwise or gradually according to the time change, for example, that the drive frequency is frequency-modulated. In this case, since the PWM signal is a rectangular wave, the harmonic component of the PWM signal is generated at a frequency that is an integral multiple (n times) of the fundamental frequency. The maximum value Pm3 of the fundamental and harmonic powers is higher than the maximum value Pm1 of the power.

  Therefore, the maximum value Pm1 of the power spectrum shown in FIG. 3 is lower than the maximum values Pm2 and Pm3 of the power spectrum shown in FIGS. 4A and 4B, and it can be seen that the noise component can be reduced. . As a result, noise at the AM band frequency can be diffused.

  Further, although it is indicated that the drive frequency f should be changed to “random”, the “random” in this case may satisfy the following condition, for example. For example, “random” means that a frequency pattern composed of a plurality of (for example, 8 or more) single drive frequencies does not appear repeatedly in a frequency range including an audible frequency (50 μs (20 kHz) to 1 s (1 Hz) range). And good.

  FIG. 5 schematically illustrates this condition description. Each of the frequencies f1, f2, and f3 is not a single drive frequency, but is directly spread (spread spectrum) at ± 2 kHz. As shown in FIG. 5, the frequency is switched in the order of f1-> f2-> f3-> f1-> f1-> f3-> f2-> f1-> f2-> f3-> ... according to time.

  Of these frequency patterns, when attention is paid to a frequency pattern having periodicity such as “f1 → f2 → f3”, the frequency pattern appears four times in a series of frequency patterns. This frequency pattern by “f1 → f2 → f3” is a pattern that appears “randomly” and does not appear repeatedly in a frequency range including an audible frequency (20 μs (50 kHz) to 50 μs (20 kHz) to 1 s (1 Hz)). Is set to

  Accordingly, since a periodic frequency pattern does not appear within 20 kHz or less in a series of frequency patterns, harmonics depending on the periodic frequency pattern are not generated. Thereby, AM band noise can be reduced.

  Note that the example shown in FIG. 5 is described by using three frequency permutations (f1 → f2 → f3) as frequency patterns in a simplified manner. To make it more practical. It is desirable to control the frequency pattern so as to satisfy all the above conditions. Note that any of the conditions may not be satisfied as necessary.

FIG. 6 schematically shows a single drive frequency and duty ratio setting operation by the control unit 2 and the command unit 3 in a flowchart.
First, the command unit 3 selects an initial value of a single drive frequency from the database 8 (S1), and selects a duty ratio corresponding to this single drive frequency (S2). And the control part 2 drive-controls the vehicle-mounted motor 5 by the drive part 4 using the single drive frequency and duty ratio selected from the database 8 (S3). The current detection unit 6 detects the current flowing through the vehicle-mounted motor 5 at this time (S4).

The feedback control unit 7 compares this detected current with the target current (S5). Next, the command unit 3 refers to a frequency list in the range of current detection values that are close to the target current value (S6).
FIG. 7 shows a frequency list corresponding to the detected current value. This frequency list shows a table in which the data stored in the database 8 shown in FIG. 2 is classified according to the detected current value.

  For example, a case will be described in which the target current passed through the in-vehicle motor 5 is 4A and the current value detected in step S4 is detected at 2A. The command unit 3 selects a condition having a detected current value of 6A so as to approximate the detected current 2A and approach the target current 4A.

  In addition, in the frequency list of FIG. 7A and FIG. 7B, the reason why the range of the current detection value is set to the predetermined range of 3A to 5A and 5A to 7A is averaged and completely desired. This is because a current command value (6A current detection value in this case) that becomes the target current rarely exists in the frequency list, and a slight deviation occurs.

  In this case, the selection unit 9 of the command unit 3 refers to the frequency list of 5A to 7A in FIG. 7B, and the next single drive frequency having randomness from the previous drive frequency from this frequency list. Is selected (S7). Since this selection condition is a condition having the “random” property described above, the description thereof is omitted. The drive frequency may not be switched as long as the time range that can be driven at a single drive frequency is within an allowable range (for example, about 20 us).

  Thereafter, when the selection unit 9 of the command unit 3 selects a single drive frequency, the process returns to step S2, and the selection unit 9 selects a duty ratio corresponding to the single drive frequency selected from the database 8, and the command unit 3 Instructs the control unit 2 to execute the drive frequency, and the control unit 2 performs the processing after step S3. In this way, the control unit 2 controls the drive of the in-vehicle motor 5 while the command unit 3 sequentially selects and switches the single drive frequency and duty ratio. In this way, the PWM drive control of the motor 5 is repeated.

  By repeating the drive control, the detected current value approaches the target current value, but the detected current value slightly shifts from the target current value. Therefore, since the control can be performed while sequentially switching the single drive frequency so as to approach the target current, the steady state can be maintained while reducing AM noise.

  According to the present embodiment, when the control unit 2 performs PWM drive control of the motor 5, the current detection unit 6 detects the current flowing through the in-vehicle motor 5, and the selection unit 8 in the command unit 3 responds to the detected current. The random single drive frequency and the duty ratio respectively corresponding to the single drive frequency are sequentially selected, and the control unit 2 repeats the in-vehicle motor 5 with the selected single drive frequency and the duty ratio. Drive control. Thereby, AM noise can be reduced.

  In addition, since the continuous time for continuously driving the vehicle-mounted motor 5 with a single drive frequency is set to a cycle corresponding to a predetermined frequency exceeding the audible frequency, the frequency component of the audible frequency band even if the frequency is sequentially changed Is less likely to appear. Therefore, an audible frequency component is less likely to be detected as noise, and an unpleasant sound can be reduced.

Further, when the single drive frequency is directly diffused, the peak level of the frequency component can be suppressed and noise can be reduced.
In addition, when the random single driving frequency f sequentially different includes a frequency pattern composed of at least eight single driving frequencies f, the frequency pattern includes an audible frequency (for example, 1 Hz to 20 kHz to 50 kHz). Therefore, harmonics depending on a periodic frequency pattern are not generated, and AM noise can be reduced because the frequency does not repeatedly appear at a predetermined interval (for example, 20 μs to 50 μs to 1 s).

(Second Embodiment)
8 and 9 show a second embodiment of the present invention, in which the control unit 2 generates a PWM signal based on the clock generated by the reference clock generation unit, and the A / D converter performs A / D conversion. It is in the place where it was made to do. The same parts as those of the above-described embodiment are denoted by the same reference numerals and description thereof is omitted, and different parts are described below.

  As shown in FIG. 8, the current detection unit 6 a includes an A / D converter 6 a that converts an analog value into a digital value for the energization current of the motor 5. The A / D converter 6a is constituted by, for example, a successive approximation A / D converter.

  The reference clock generation unit 13 generates a reference clock signal for generating a PWM signal generated by the main control unit 10 of the control unit 2, and the main control unit 10 divides the reference clock signal. A PWM signal is generated. The reference clock of the reference clock generator 13 is also supplied to the frequency divider circuit 14. The frequency divider circuit 14 divides the reference clock to reduce the frequency. The frequency-divided output of the frequency dividing circuit 14 is given to the A / D converter 6a as a conversion timing pulse of the A / D converter 6a.

  FIG. 9A to FIG. 9F schematically show the signal waveforms of the main parts with timing charts. In FIG. 9, (a) PWM signal indicates a PWM signal that the main control unit 10 of the control unit 2 gives to the drive unit 4. Further, (b) Iout indicates the waveform of the energization current of the motor 5. (C) adc_start indicates an A / D conversion start signal. (D) ck represents a clock of a conversion timing pulse given to the A / D converter 6a. (E) adc_end indicates an A / D conversion end signal. (F) adc_result indicates an A / D conversion output.

  As shown in FIGS. 9A and 9B, when the PWM signal is supplied to the drive unit 4, the energization current (Iout) of the motor 5 changes according to the PWM signal. When the PWM signal is at a high voltage, the energization current (Iout) increases, and when the PWM signal is at a low voltage, the energization current (Iout) decreases. At this time, the A / D converter 6a receives the clock (ck) at a predetermined cycle via the reference clock generator 13 and the frequency divider circuit 14.

  The A / D converter 6a samples (samples) the analog current signal (Iout) of the motor 5 by a sample and hold circuit (not shown) at the generation timing of the A / D conversion start signal (adc_start). The A / D converter 6a outputs a predetermined DC voltage at the pulse rising timing (or / and pulse falling timing) of the clock (ck) a plurality of times after the generation of the A / D conversion start signal (adc_start). The comparison target reference value based on the digital signal quantized with a plurality of bits and the value obtained by sampling the analog current signal are quantized by sequentially comparing the magnitude multiple times.

  When a clock (ck) pulse is input to the A / D converter 6a a predetermined number of times and the analog current signal sampled by the A / D converter 6a is converted into a digital current value within a predetermined quantization error range, A / D The D converter 6a outputs an A / D conversion end signal (adc_end) and also outputs an A / D conversion result (adc_result). After the A / D conversion output is made, an A / D conversion process is performed by receiving the next A / D conversion start signal (adc_start). In this way, the A / D conversion process is repeated, and the A / D converter 6 a of the current detection unit 6 outputs an A / D conversion output (adc_result) to the command unit 3. The A / D converter 6a outputs an A / D conversion (adc_result) and then starts A / D conversion (adc_start). In this way, the A / D conversion process is repeated.

  As shown in FIG. 9, the timing for sequentially comparing the analog current signal (Iout) sampled by the A / D converter 6a with a digital value defined by a plurality of bits is based on the output clock (ck) of the frequency divider circuit 14. It will synchronize and it can compare sequentially with a pulse timing of a certain predetermined single frequency. Even in the embodiment to which such an A / D converter 6a is applied, since the PWM signal is a signal of a random frequency, the same effects as the above-described embodiment are obtained.

(Third embodiment)
10 and 11 show a third embodiment of the present invention. The difference from the previous embodiment is that the conversion timing pulse of the A / D converter is made random. Further, the conversion timing pulse is synchronized with a PWM signal generated at a random drive frequency. Also, the conversion timing pulse is one pulse for a plurality of pulses of the PWM signal. The same parts as those of the above-described embodiment are denoted by the same reference numerals and description thereof is omitted, and different parts are described below.

  As shown in FIG. 10, a waveform shaping unit 15 is connected to the main control unit 10. The waveform shaping unit 15 has a function (so-called frequency dividing function) of outputting one pulse for every predetermined plural (for example, 2) pulses and masking the remaining pulses for the PWM signal output from the main control unit 10. For example, a pulse counter is used. The waveform shaping unit 15 gives the waveform shaping output as a clock (ck) of the conversion timing pulse of the A / D converter 6a. The A / D converter 6a performs A / D conversion processing at the timing of the given clock (ck).

  FIG. 11 shows a timing chart. As shown in FIG. 11, the clock (ck) is partially synchronized with the PWM signal, and one pulse is output every plural pulses. Since the A / D converter 6a sequentially compares the sampled analog current signal and the digital value defined by a plurality of bits at the timing of the clock (ck), the comparison processing is performed at the pulse timing of the random frequency corresponding to the PWM signal. Will be performed sequentially.

  According to the present embodiment, since A / D conversion processing is sequentially performed at a pulse timing of a random frequency corresponding to the PWM signal, a clock (ck) serving as a conversion timing pulse of the A / D converter 6a is simply set. Compared with a method with a single frequency, the harmonic noise level can be suppressed, which can contribute to the reduction of radio noise.

  Further, if the spreading process of the PWM drive frequency of the motor 5 and the frequency spreading process of the conversion timing pulse of the A / D converter 6a are configured with different hardware, the different spreading processes must be made into different circuit configurations. Since it disappears, the circuit scale tends to increase. By applying the method of the present embodiment, the PWM drive frequency spreading processing circuit and the circuit constituting the frequency spreading method of the conversion timing pulse of the A / D converter 6a can be shared, so that the circuit scale is kept as small as possible. Radio noise can be reduced.

  Since the conversion timing pulse of the A / D converter 6a is synchronized with the PWM signal, the sampling point of the A / D converter 6a can be easily defined according to the frequency and duty ratio of the PWM signal, The command unit 3 can easily perform feedback control according to the sampling point of the A / D converter 6a, and can improve the accuracy of drive control of the in-vehicle motor 5.

  The maximum sampling frequency of the A / D converter 6a can be set to the maximum frequency of the PWM signal, and can be finely controlled. Even if the sampling frequency of the A / D converter 6a is set lower than the frequency of the PWM signal, the effective value of the frequency output signal of the PWM signal can be easily stabilized by setting the sampling point.

  The vehicle may be equipped with a transceiver of another in-vehicle device (for example, smart key). Smart key transceivers transmit and receive using frequencies in the frequency band below 180 kHz. When the drive control method for the in-vehicle motor 5 according to the present embodiment is applied, the PWM signal is reduced in frequency and used as the conversion timing pulse of the A / D converter 6a. Therefore, it is also effective in reducing noise in these smart key frequency bands, for example. Act on.

(Fourth embodiment)
FIGS. 12 and 13 show a fourth embodiment of the present invention. The difference from the previous embodiment is that a PWM signal with a random drive frequency when PWM drive control of a conversion timing pulse by an A / D converter is performed. As a result, a pulse signal with a random frequency is asynchronous and independent.

  As shown in FIG. 12, a pattern control unit 16, a frequency generation unit 17, and an ADC clock generation unit 18 are provided as a circuit for generating a clock (ck) of the A / D converter 6a. Among these, the pattern control unit 16 includes a random number generation unit 16 a and generates a random number based on the reference clock generated by the reference clock generation unit 13.

FIG. 13A and FIG. 13B show a configuration example of the random number generation unit. The random number generator 16a shown in FIG. 13 (a) is configured by an M-sequence generator that, for example, applies feedback by an XOR gate 16aa to an n-bit shift register SR in which D flip-flops (FF ₁ to FF _n ) are connected in series. The

Random number generating unit 16a shown in FIG. 13 (b), together with the applied feedback in XOR gate 16aa to the shift register SR n-bit, XOR gate between a first flip-flop FF ₁ of the XOR gate 16aa and the shift register SR An AND gate 16ac that inverts the input of the shift register SR is provided only when the outputs of the flip-flops FF _{2 to} FF _n−1 become 0. These M-sequence generators shown in FIGS. 13A and 13B are called a so-called LFSR (linear feedback shift register) and generate pseudo-random sequence random numbers.

The random numbers (Q _{1 to} Q _n ) generated by the random number generation unit 16 a are given to the frequency generation unit 17. The frequency generation unit 17 includes a lookup table (LUT) 17a and a modulation circuit 17b, and has a function of generating a random frequency. The look-up table 17a stores frequencies corresponding to the values indicated by the random numbers (Q _{1 to} Q _n ), and the look-up table 17a can store a frequency of up to n bits.

When the random number (Q _{1 to} Q _n ) is given, the frequency generation unit 17 refers to the look-up table (LUT) 17 a and selects a frequency corresponding to the random number (Q _{1 to} Q _n ). The modulation circuit 17 b generates a signal having a selected frequency by modulating the signal based on the reference clock of the reference clock generation unit 13 and supplies the modulated signal to the ADC clock generation unit 18.

  The ADC clock generation unit 18 includes a waveform shaping unit 18a. The waveform shaping unit 18a shapes the waveform of the modulation signal output from the modulation circuit 17b, and supplies it as a clock (ck) for the A / D converter 6a. The waveform shaping unit 18a has the same function as the waveform shaping unit 15 described above. The A / D converter 6a performs A / D conversion processing using this clock as a conversion clock pulse.

  FIG. 14 shows a timing chart. Of the signals shown in FIG. 14, mod_clk in FIG. 14D indicates a modulation signal output from the modulation circuit 17b. As shown in FIG. 14D, the modulation signal (mod_clk) output from the modulation circuit 17b is a signal having a random frequency, and the clock (ck) output from the waveform shaping unit 18a is the modulation signal (mod_clk). ) Is lower in frequency.

  In the present embodiment, the reason for the above configuration is that the PWM signal and the modulation clock pulse of the A / D converter 6a are asynchronously and independently changed at random to suppress the phenomenon in which harmonics are superimposed. Because it can.

  When the method of the above-described embodiment is applied, since the PWM signal and the modulation clock pulse are synchronized, there is a concern that the harmonic noise easily overlaps and the noise peak level increases. In such a case, as shown in this embodiment, the PWM signal and the modulation clock pulse may be changed asynchronously and independently at random. Then, the phenomenon that harmonics are superimposed can be suppressed and noise can be suppressed.

  In the above-described embodiment, an example in which an n-bit shift register is provided is shown. However, two n-bit and m-bit LFSRs having different numbers of flip-flops are provided, and based on the two random number outputs, The random number output obtained from the equation (1) may be used. In equation (1), y represents an output, and α represents a prime number constant.

y = α × (n-bit output of the first LFSR) + (m-bit output of the second LFSR)
(1)
By applying such a configuration with good randomness, the randomness can be improved.

(Other embodiments)
The present invention is not limited to the above embodiment, and for example, the following modifications or expansions are possible.
9, 11, and 14 described in the above embodiment, the PWM signal is shown to have a different frequency for each period, but the PWM signal is substantially four times (a plurality of times) or more, for example. It is preferable that the signal is a signal in which PWM pulses having the same frequency and the same duty ratio are continuous, and the PWM pulse is a signal having a single frequency by being continued a plurality of times.

  In the second embodiment, the frequency of the conversion timing pulse of the A / D converter 6a is set to a single frequency, and in the third and fourth embodiments, the frequency of the conversion timing pulse of the A / D converter 6a is set at random. Although the embodiment has been described, the duty ratio of the conversion timing pulse may be appropriately set so as to ensure the time required for the A / D conversion process.

  In other words, if only the rising or falling edge of the pulse is applied as the conversion timing, the duty ratio should be set within a practical range, and both the rising and falling edges should be set as the conversion timing. When applied, it is preferable to set the duty ratio of the conversion timing pulse to 50% so that the A / D conversion processing time can be secured.

  The driving unit 3 does not need to be provided with an LC filter, but if an LC filter is provided, an LC filter is preferably provided in order to achieve a synergistic effect of noise reduction. In particular, the circuit scale increases as the number of single drive frequencies increases, and the circuit scale also increases when a “random” single drive frequency that satisfies the above-described conditions is realized.

  For this reason, in consideration of a necessary noise level, 2 to 8 frequencies satisfying a condition in the range of 180 kHz to 500 kHz are selected as candidates for a single drive frequency, and an LC filter smaller than usual is combined. Anyway. Note that the constant of the LC filter varies depending on the output frequency pattern.

  In the embodiment, a single drive frequency (about 320) in a 1 kHz step in the range of 180 kHz to 500 kHz is shown as a frequency change candidate. However, the number of single drive frequencies is two or more and the number is as long as the first condition is satisfied. Not limited. A frequency of 0.5 kHz step may be set as a change candidate.

  When generating a “random” frequency (for example, a single drive frequency (PWM signal), a frequency of the conversion timing pulse of the A / D converter 6a), a pseudo-random number based on a polynomial may be used, and the thermal noise of the semiconductor may be reduced. A natural random number generator may be used.

  In the fourth embodiment, the frequency of the conversion timing pulse of the A / D converter 6a and the frequency of the PWM signal are different from each other, but in this case, the frequency of the conversion timing pulse of the A / D converter 6a. The method of changing the frequency of the PWM signal at random may be the same algorithm, and the frequency values of each other may be changed. In the first embodiment, the drive frequency is selected according to the current detection value as shown in FIG. 7, but the frequency of the conversion timing pulse of the A / D converter 6a is set according to this current detection value. The frequency of the conversion timing pulse may be set based on the set contents.

  In a state where the duty ratio is fixed (for example, 50%), a frequency switching table is prepared for each detection current flowing through the in-vehicle motor 5, and a driving frequency at which the noise peak of the harmonic component in the AM band is lower than a predetermined value is selected. You may make it switch.

  In the drawings, 1 is a vehicle-mounted motor drive control device, 2 is a control unit, 3 is a command unit, 4 is a drive unit, 5 is a vehicle-mounted motor, 6 is a current detection unit, 6a is an A / D converter, and 7 is a feedback control unit. , 8 is a database, 9 is a selection unit, 10 is a main control unit, 11 is a frequency control unit, 12 is a duty control unit, 13 is a reference clock generation unit, 14 is a frequency divider, 15 is a waveform shaping unit, and 16 is a pattern. A control unit, 16a is a random number generation unit, 17 is a frequency generation unit, 17a is a lookup table, 17b is a modulation circuit, 18 is an ADC clock generation unit, and 18a is a frequency division circuit.

Claims (9)

In the drive control method of the in-vehicle motor that performs PWM drive control of the in-vehicle motor composed of a DC motor
Based on the result of comparing the target current and the current flowing through the vehicle-mounted motor when the PWM drive control is performed, a random single drive frequency sequentially different within a predetermined frequency range to which a range of 180 kHz to 500 kHz is applied, Single drive frequency so that a frequency value obtained by adding +910 kHz to the reception frequency of AM radio and a frequency value that is a multiple of the random single drive frequency are more than the bandwidth of AM broadcast in the range of 510 to 2620 kHz. And a duty ratio respectively corresponding to the single driving frequency is selected,
Drive control method for vehicle motor, characterized in that the PWM drive control repeatedly the vehicle motor by a duty ratio corresponding to each of the sequentially different single drive frequency and those the single drive frequency. It said single drive continuous time for driving in succession the vehicle motor by frequency, of the in-vehicle motor according to claim 1 Symbol mounting, characterized in that it is set to a period corresponding to a predetermined frequency exceeding an audible frequency range drive Control method. When the sequentially different random single drive frequencies include a frequency pattern composed of a plurality of single drive frequencies, the sequentially different random single frequencies are prevented from being repeated a predetermined number of times or more at an audible frequency period. 3. The drive control method for an on-vehicle motor according to claim 1, wherein one drive frequency is selected . 4. The on-vehicle motor drive control method according to claim 1, wherein a pseudo-random number based on a polynomial is used when generating the random single drive frequency . Drive control method of the in-vehicle motor according to any one of claims 1 to 3, characterized by using a natural random number generator that utilizes a thermal noise of a semiconductor when generating the random single drive frequency. 6. The on-vehicle motor according to claim 1, wherein a frequency of a timing pulse for converting an electric current flowing through the on-vehicle motor from an analog value to a digital value by an A / D converter is a random frequency . Drive control method. The conversion timing pulse by the A / D converter is configured to be synchronized with a PWM signal having a random drive frequency when the PWM drive control is performed, so that the frequency of the conversion timing pulse is set to a random frequency. A drive control method for an in-vehicle motor according to claim 6 . 8. The on-vehicle motor drive control method according to claim 7, wherein a conversion timing pulse by the A / D converter is set to one pulse in a plurality of pulses of the PWM signal . 9. The conversion timing pulse by the A / D converter is a pulse signal having a random frequency that is asynchronous and independent of a PWM signal having a random driving frequency when the PWM driving control is performed. The on-vehicle motor drive control method described.

Images