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JP5565548B2 - Resin-sealed electronic component and manufacturing method thereof - Google Patents

Resin-sealed electronic component and manufacturing method thereof Download PDF

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JP5565548B2
JP5565548B2 JP2009069974A JP2009069974A JP5565548B2 JP 5565548 B2 JP5565548 B2 JP 5565548B2 JP 2009069974 A JP2009069974 A JP 2009069974A JP 2009069974 A JP2009069974 A JP 2009069974A JP 5565548 B2 JP5565548 B2 JP 5565548B2
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resin
electronic component
plating layer
wiring board
sealing resin
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盛一 田島
茂 浅見
豊隆 小林
孝彰 土門
隆範 早川
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TDK Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/568—Temporary substrate used as encapsulation process aid
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93—Batch processes
    • H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1515—Shape
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    • H01L2924/151—Die mounting substrate
    • H01L2924/1515—Shape
    • H01L2924/15158—Shape the die mounting substrate being other than a cuboid
    • H01L2924/15159—Side view
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    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15313—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a land array, e.g. LGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3025—Electromagnetic shielding

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Description

本発明は、封止樹脂の表面に金属膜を形成した樹脂封止型電子部品及びその製造方法に関する。   The present invention relates to a resin-sealed electronic component in which a metal film is formed on the surface of a sealing resin and a method for manufacturing the same.

従来、樹脂基板を使用したモジュール製品に電磁シールドを施す方法として、金属薄板を加工したシールドケースをはんだ接合したものを使用していた。この方法は基板上への部品搭載時の最後にシールドケースを搭載し、その後のはんだリフロー処理で一括接合処理が出来るというメリットがある。一方、デメリットとしては、(1)シールドケースと部品上面とのギャップが必要になる、(2)金属薄板の板厚を薄くすると強度が取れない、(3)はんだ接合部の分の専有面積が発生する等があり、近年要求の有る小型化・薄型化に不利なものとなって来ている。シールドケースでの上記デメリットを改善する技術として、下記特許文献１及び２のように、全体を封止樹脂で封止(モールド)した後で封止樹脂表面に金属膜を形成する(メタライズを施す)ことで電磁シールドする工法が検討されている。   Conventionally, as a method for applying electromagnetic shielding to a module product using a resin substrate, a shield case in which a metal thin plate is processed is soldered. This method has an advantage that a shield case is mounted at the end of component mounting on the substrate, and batch bonding processing can be performed by subsequent solder reflow processing. On the other hand, the disadvantages are: (1) a gap between the shield case and the upper surface of the component is required, (2) the strength cannot be reduced by reducing the thickness of the thin metal plate, and (3) the area occupied by the solder joints In recent years, it has become disadvantageous for the demand for downsizing and thinning. As a technique for improving the above demerits in the shield case, as described in Patent Documents 1 and 2, the whole is sealed (molded) with a sealing resin, and then a metal film is formed on the surface of the sealing resin (metallization is performed) Therefore, methods for electromagnetic shielding are being studied.

下記特許文献１は、「表面を絶縁処理した磁心１ａ、１ｂにコイル２、３を巻いて一体に接合し、コイル収容部６を設けた絶縁基板４に取り付けて、封止樹脂１１に封入した構造」の表面実装型トランスであって、「封止樹脂表面に金属メッキして電磁シールド膜に」したものを開示している([要約]の[解決手段])。   The following Patent Document 1 states that “the coils 2 and 3 are wound around the magnetic cores 1 a and 1 b whose surfaces are insulated and joined together, attached to the insulating substrate 4 provided with the coil housing portion 6, and sealed in the sealing resin 11. A surface-mount type transformer having a “structure”, which is “electroplated on the surface of a sealing resin to form an electromagnetic shielding film” is disclosed ([Solution] in [Summary]).

下記特許文献２は、「回路基板面２にフォトダイオード、集積回路、コンデンサ及び抵抗等の電子部品を実装し、前記電子部品の上面を透光性の封止樹脂７（エポキシ樹脂）で封止したモジュール本体」において、「封止樹脂７の全表面にＮｉメッキ層２１を形成する」ことを開示している([要約]の[解決手段])。これによれば、「シールドケースを使用しないので、部材費での製品のコストダウン、組立工数、検査工数等での製品のコストダウン、Ｎｉメッキ層２１によるシールド対策、放熱効果アップでの信頼性の向上、小型、薄型化が可能となる」としている(同)。   The following Patent Document 2 states that “electronic components such as photodiodes, integrated circuits, capacitors and resistors are mounted on the circuit board surface 2, and the upper surface of the electronic components is sealed with a translucent sealing resin 7 (epoxy resin). In the "module body", it is disclosed that "the Ni plating layer 21 is formed on the entire surface of the sealing resin 7" ([Solution] in [Summary]). According to this, “Since no shield case is used, the cost of the product is reduced by the material cost, the cost of the product is reduced by the assembly man-hours, the inspection man-hours, etc., the shield measures by the Ni plating layer 21 and the reliability in the heat radiation effect increase Can be improved, and can be made smaller and thinner. "

下記特許文献３は、電磁シールドを主目的とするものではないが、「熱硬化性樹脂で封止した際の冷却時に発生する半導体装置の反りを抑え、実装時の電気的接続不良を未然に防ぐ」ために([要約]の[課題])、「半導体チップ１１と配線板１２とを電気接続された状態で重ね、これら半導体チップ１１及び配線板１２を金型の上面側に装着すると共に、熱膨張率がモールド樹脂１３のそれよりも小さい補強板１４を金型の下面側に装着し、金型内に溶融状態の熱硬化性のモールド樹脂組成物を注入固化した後、脱型冷却して半導体装置１を得る」こととし、これにより、「脱型冷却の際、補強板１４により樹脂の反りが抑えられ、電気的接続不良が防止される」としている([要約]の[解決手段])。さらに、電磁シールドに関して、「補強板１４は金属製板からなるので、この補強板１４を接地電位に接続することによって、電磁波に対するシールド性を向上させることができる」としている(段落[００３４])。   Although the following Patent Document 3 does not have an electromagnetic shield as a main purpose, “a warpage of a semiconductor device that occurs at the time of cooling when sealing with a thermosetting resin is suppressed, and an electrical connection failure at the time of mounting is obviated. "To prevent" ([Summary] [Problem]), "Semiconductor chip 11 and wiring board 12 are stacked in an electrically connected state, and these semiconductor chip 11 and wiring board 12 are mounted on the upper surface side of the mold. Then, a reinforcing plate 14 having a thermal expansion coefficient smaller than that of the mold resin 13 is mounted on the lower surface side of the mold, and after the molten thermosetting mold resin composition is injected and solidified in the mold, it is demolded and cooled. Thus, the semiconductor device 1 is obtained ”, whereby“ the resin warpage is suppressed by the reinforcing plate 14 at the time of demolding cooling, and electrical connection failure is prevented ”([Summary] [Solution] means]). Further, regarding the electromagnetic shield, “the reinforcing plate 14 is made of a metal plate, so that the shielding property against electromagnetic waves can be improved by connecting the reinforcing plate 14 to the ground potential” (paragraph [0034]). .

下記特許文献４は、電磁シールドに関するものではないが、「回路幅や回路間スペース幅の相違等、回路パターンによる電流密度の不均一さを解消し、回路パターンの如何にかかわらず導体回路部のめっき厚さを均一に形成する」ために([要約]の[課題])、「基板のめっき下地層上２１に導体回路形成のための電気絶縁性のレジスト層２２を形成し、そのレジスト層２２の上表面に導電層２４を形成し、導電層２４とめっき下地層２１とを同電位に接続した条件で電解めっきを行い、電解めっき完了後にレジスト層２２を除去する」こととしている([要約]の[解決手段])。   Although the following Patent Document 4 is not related to electromagnetic shielding, “the current density non-uniformity due to the circuit pattern such as the difference in the circuit width and the inter-circuit space width is eliminated, and the conductor circuit portion is not affected by the circuit pattern. In order to “form uniform plating thickness” ([Summary] [Problem]), “An electrically insulating resist layer 22 for forming a conductor circuit is formed on the plating base layer 21 of the substrate, and the resist layer is formed. The conductive layer 24 is formed on the upper surface 22 and electrolytic plating is performed under the condition that the conductive layer 24 and the plating base layer 21 are connected to the same potential, and the resist layer 22 is removed after completion of the electrolytic plating. Summary] [Solutions]).

特開平１１−２０４３５２号公報JP-A-11-204352 特開平１１−１３１２８３号公報JP-A-11-131283 特開平１０−１１６９３７号公報JP-A-10-116937 特開２００４−１６５１９６号公報JP 2004-165196 A

封止樹脂表面に金属膜を形成することで電磁シールドする工法としては、例えば湿式めっきやドライプロセス(具体的には例えば蒸着、スパッタ成膜)が考えられる。しかし、ドライプロセスでは、成膜された金属膜と封止樹脂との密着強度が上げられない等の不具合がある。一方、湿式めっきでも、下地の無電解めっき膜と封止樹脂との密着強度が上げられず、また膜厚を厚くすると密着強度が低下する等の不具合がある。封止樹脂に対する密着強度が弱い金属膜では、リフロー時に金属膜が封止樹脂の表面から剥離したり、熱衝撃で金属膜とグランド端子との接合点が乖離する等の不具合が発生しやすいという問題がある。   As a method for electromagnetic shielding by forming a metal film on the surface of the sealing resin, for example, wet plating or a dry process (specifically, for example, vapor deposition or sputtering film formation) can be considered. However, in the dry process, there is a problem that the adhesion strength between the formed metal film and the sealing resin cannot be increased. On the other hand, even with wet plating, the adhesion strength between the underlying electroless plating film and the sealing resin cannot be increased, and when the film thickness is increased, the adhesion strength decreases. A metal film with weak adhesion strength to the sealing resin is prone to problems such as peeling of the metal film from the surface of the sealing resin during reflow and separation of the junction between the metal film and the ground terminal due to thermal shock. There's a problem.

本発明はこうした状況を認識してなされたものであり、その目的は、封止樹脂の表面に密着強度の高い金属膜を有する信頼性の高い樹脂封止型電子部品及びその製造方法を提供することにある。   The present invention has been made in view of such a situation, and an object of the present invention is to provide a highly reliable resin-sealed electronic component having a metal film with high adhesion strength on the surface of the sealing resin and a method for manufacturing the same. There is.

本発明の第１の態様は、樹脂封止型電子部品である。この樹脂封止型電子部品は、
配線基板と、
前記配線基板の外縁にまで延在するように前記配線基板に形成されたグランドラインを含む配線パターンと、
前記配線基板に搭載又は形成された素子と、
前記素子を封止する封止樹脂と、
前記封止樹脂の上面に全面的に固着された金属箔と、
前記金属箔の上面に全面的に接合され且つ前記グランドラインのうち前記配線基板の外縁に露出した部分に接合された金属膜とを備える。 The first aspect of the present invention is a resin-sealed electronic component. This resin-sealed electronic component is
A wiring board;
A wiring pattern including a ground line formed on the wiring board so as to extend to an outer edge of the wiring board;
An element mounted or formed on the wiring board;
A sealing resin for sealing the element;
A metal foil fixed entirely on the upper surface of the sealing resin;
A metal film that is bonded to the entire upper surface of the metal foil and bonded to a portion of the ground line exposed at an outer edge of the wiring board.

第１の態様の樹脂封止型電子部品において、前記金属箔は、硬化前のシート状の前記封止樹脂上に載置され、前記配線基板の厚み方向への加圧の後に前記封止樹脂を硬化させることで前記封止樹脂の上面に固着されているとよい。 In the resin-encapsulated electronic component according to the first aspect, the metal foil is placed on the sheet-shaped encapsulating resin before curing, and the encapsulating resin is pressed in the thickness direction of the wiring board. It is good to be fixed to the upper surface of the sealing resin by curing.

第１の態様の樹脂封止型電子部品において、前記金属箔は、前記素子に対するシールド効果を有するものであるとよい。 In the resin sealed type electronic component of the first aspect, before Symbol metal foil, may be one having a shielding effect against the elements.

第１の態様の樹脂封止型電子部品において、前記金属膜は、めっき処理によって形成され、少なくとも無電解めっき層を含むものであるとよい。   In the resin-sealed electronic component of the first aspect, the metal film is preferably formed by plating and includes at least an electroless plating layer.

第１の態様の樹脂封止型電子部品において、
前記封止樹脂は熱硬化性樹脂であり、
前記金属箔は銅箔であり、
前記金属膜は、前記銅箔及び前記グランドラインに接合された無電解銅めっき層と、前記無電解銅めっき層上に形成された電解銅めっき層と、前記電解銅めっき層上に形成された電解ニッケルめっき層とを含むとよい。 In the resin-encapsulated electronic component of the first aspect,
The sealing resin is a thermosetting resin,
The metal foil is a copper foil,
The metal film is formed on the electroless copper plating layer bonded to the copper foil and the ground line , the electrolytic copper plating layer formed on the electroless copper plating layer, and the electrolytic copper plating layer. An electrolytic nickel plating layer may be included.

本発明の第２の態様は、樹脂封止型電子部品の製造方法である。この方法は、
グランドラインを含む配線パターンが形成された配線基板に搭載又は形成された素子を封止樹脂で封止するとともに、金属箔を前記封止樹脂の上面に全面的に固着する封止工程と、
前記封止樹脂の上面側から前記配線基板の所定深さにまで至る切込みを入れ、前記グランドラインを前記切込みに臨んで露出させるハーフダイス工程と、
前記金属箔の上面に全面的に接合し且つ前記グランドラインのうち前記切込みに臨んで露出した部分と接合する金属膜を形成する金属膜形成工程と、
前記切込みを入れた箇所を切断して個々の樹脂封止型電子部品に分割する切断工程とを有する。
本発明の第３の態様は、樹脂封止型電子部品の製造方法である。この方法は、
グランドラインを含む配線パターンが形成された配線基板に搭載又は形成された素子を封止樹脂で封止するとともに、金属箔を前記封止樹脂の上面に固着する封止工程と、
前記封止樹脂の上面側から前記配線基板の所定深さにまで至る切込みを入れ、前記グランドラインを前記切込みに臨んで露出させるハーフダイス工程と、
前記金属箔の上面に全面的に接合し且つ前記グランドラインのうち前記切込みに臨んで露出した部分と接合する金属膜を形成する金属膜形成工程と、
前記切込みを入れた箇所を切断して個々の樹脂封止型電子部品に分割する切断工程とを有し、
前記金属膜形成工程の前に、前記配線基板の表面のうち金属膜を形成しない部分にレジスト及び金属箔を前記レジストが前記配線基板側となるように付着させるレジスト工程をさらに有し、
前記金属膜形成工程の後に、前記レジスト工程で付着させた前記レジスト及び前記金属箔を取り除く。 The second aspect of the present invention is a method for manufacturing a resin-encapsulated electronic component. This method
A sealing step of sealing an element mounted or formed on a wiring board on which a wiring pattern including a ground line is formed with a sealing resin , and fixing a metal foil to the entire top surface of the sealing resin;
A half die step of making a cut from the upper surface side of the sealing resin to a predetermined depth of the wiring board and exposing the ground line facing the cut,
A metal film forming step of forming a metal film that is bonded to the entire upper surface of the metal foil and bonded to the exposed portion of the ground line facing the notch;
A cutting step of cutting the cut portion and dividing it into individual resin-encapsulated electronic components.
A third aspect of the present invention is a method for manufacturing a resin-encapsulated electronic component. This method
A sealing step of sealing an element mounted or formed on a wiring board on which a wiring pattern including a ground line is formed with a sealing resin, and fixing a metal foil to the upper surface of the sealing resin;
A half die step of making a cut from the upper surface side of the sealing resin to a predetermined depth of the wiring board and exposing the ground line facing the cut,
A metal film forming step of forming a metal film that is bonded to the entire upper surface of the metal foil and bonded to the exposed portion of the ground line facing the notch;
A cutting step of cutting the cut portion and dividing it into individual resin-encapsulated electronic components,
Before the metal film forming step, further comprising a resist step of attaching a resist and a metal foil to the portion of the surface of the wiring board where the metal film is not formed so that the resist is on the wiring board side,
After the metal film forming step, the resist and the metal foil adhered in the resist step are removed.

第２又は第３の態様の樹脂封止型電子部品の製造方法において、前記封止工程は、前記配線基板上にシート状の前記封止樹脂及び前記金属箔を前記封止樹脂が前記配線基板側となるように載置し、前記配線基板と前記封止樹脂と前記金属箔とを前記配線基板の厚み方向に加圧した後にシート状の前記封止樹脂を硬化させるものであるとよい。 In the method for manufacturing a resin-encapsulated electronic component according to the second or third aspect, in the sealing step, the sealing resin in the sheet form and the metal foil are formed on the wiring substrate by the sealing resin. The sheet-shaped sealing resin may be cured after placing the wiring board, the sealing resin, and the metal foil in the thickness direction of the wiring board.

さらに、シート状の前記封止樹脂は熱硬化性樹脂であり、
前記封止工程の前記加圧は減圧環境下において行われ、かつ、前記加圧とともに少なくともシート状の前記封止樹脂を加熱するとよい。 Furthermore, the sheet-like sealing resin is a thermosetting resin,
The pressurization in the sealing step may be performed in a reduced pressure environment, and at least the sheet-shaped sealing resin may be heated together with the pressurization.

第２又は第３の態様の樹脂封止型電子部品の製造方法において、前記金属膜形成工程は、前記金属箔の上面に全面的に接合し且つ前記グランドラインのうち前記切込みに臨んで露出した部分と接合する無電解めっき層を形成する無電解めっき工程と、前記無電解めっき層上に電解めっき層を形成する電解めっき工程とを含むとよい。 In the method for manufacturing a resin-encapsulated electronic component according to the second or third aspect, the metal film forming step is entirely bonded to the upper surface of the metal foil and exposed to the notch in the ground line. It is preferable to include an electroless plating step for forming an electroless plating layer to be bonded to the portion, and an electroplating step for forming an electroplating layer on the electroless plating layer.

さらに、前記金属箔は銅箔であり、
前記無電解めっき層は無電解銅めっき層であり、
前記電解めっき工程は、前記無電解銅めっき層上に電解銅めっき層を形成し、前記電解銅めっき層上に電解ニッケルめっき層を形成するものであるとよい。 Furthermore, the metal foil is a copper foil,
The electroless plating layer is an electroless copper plating layer,
In the electrolytic plating step, an electrolytic copper plating layer is formed on the electroless copper plating layer, and an electrolytic nickel plating layer is formed on the electrolytic copper plating layer.

なお、以上の構成要素の任意の組合せ、本発明の表現を方法やシステムなどの間で変換したものもまた、本発明の態様として有効である。   It should be noted that any combination of the above-described constituent elements, and those obtained by converting the expression of the present invention between methods and systems are also effective as aspects of the present invention.

本発明の第１の態様によれば、配線基板に搭載又は形成された素子を封止する封止樹脂に固着されて前記封止樹脂の表面に少なくとも一部が露出した金属体と、前記配線基板の外縁にまで延在するように前記配線基板に形成された配線パターンとが、前記封止樹脂の表面の少なくとも一部を覆う金属膜と強固に密着接合するため、封止樹脂の表面に密着強度の高い金属膜を有する信頼性の高い樹脂封止型電子部品を実現することができる。   According to the first aspect of the present invention, the metal body fixed to the sealing resin for sealing the element mounted or formed on the wiring board and at least partially exposed on the surface of the sealing resin, and the wiring Since the wiring pattern formed on the wiring board so as to extend to the outer edge of the board is firmly and closely joined to the metal film covering at least a part of the surface of the sealing resin, the wiring pattern is formed on the surface of the sealing resin. A highly reliable resin-encapsulated electronic component having a metal film with high adhesion strength can be realized.

本発明の第２の態様によれば、配線基板に形成された配線パターンのうち前記配線基板に入れられた切込みに臨んで露出した部分、及び配線基板に搭載又は形成された素子を封止する封止樹脂に固着された金属体のうち前記封止樹脂の表面に露出した部分の双方と接合する金属膜を形成し、前記封止樹脂の表面の少なくとも一部を前記金属膜で覆うことにより、前記金属膜を前記配線パターン及び前記金属体と強固に密着接合させることができるため、封止樹脂の表面に密着強度の高い金属膜を有する信頼性の高い樹脂封止型電子部品を製造することができる。   According to the second aspect of the present invention, the exposed portion of the wiring pattern formed on the wiring board facing the notch formed in the wiring board and the element mounted on or formed on the wiring board are sealed. By forming a metal film to be bonded to both of the portions exposed on the surface of the sealing resin of the metal body fixed to the sealing resin, and covering at least a part of the surface of the sealing resin with the metal film Since the metal film can be tightly bonded to the wiring pattern and the metal body, a highly reliable resin-encapsulated electronic component having a metal film with high adhesion strength on the surface of the sealing resin is manufactured. be able to.

本発明の実施の形態に係る樹脂封止型電子部品の構成を示す断面図であり、(Ａ)は銅めっき層の形成前の状態、(Ｂ)はニッケルめっき層の形成前の状態、(Ｃ)は完成状態。It is sectional drawing which shows the structure of the resin sealing type electronic component which concerns on embodiment of this invention, (A) is the state before formation of a copper plating layer, (B) is the state before formation of a nickel plating layer, ( C) is completed. 同実施の形態に係る樹脂封止型電子部品の製造方法の流れを示す工程説明図(その１)。Process explanatory drawing (the 1) which shows the flow of the manufacturing method of the resin sealing type electronic component which concerns on the embodiment. 同工程説明図(その２)。Process explanatory drawing (the 2). 同工程説明図(その３)。Process explanatory drawing (the 3). (Ａ)は同実施の形態に係る樹脂封止型電子部品の製造方法における無電解銅めっき処理の詳細説明図、(Ｂ)は同製造方法における電解銅めっき処理の詳細説明図。(A) is detailed explanatory drawing of the electroless copper plating process in the manufacturing method of the resin sealing type electronic component which concerns on the embodiment, (B) is detailed explanatory drawing of the electrolytic copper plating process in the manufacturing method. 銅めっき層の膜厚を０μｍ(銅めっき層無し),５μｍ,１０μｍとした場合の各々において、モジュール部品の外部における磁界強度をモジュール部品の上側で横方向３０ｍｍに渡って測定した場合の磁界強度比較図。When the thickness of the copper plating layer is 0 μm (no copper plating layer), 5 μm, and 10 μm, the magnetic field strength when the magnetic field strength outside the module component is measured over the horizontal 30 mm above the module component Comparison diagram.

以下、図面を参照しながら本発明の好適な実施の形態を詳述する。なお、各図面に示される同一または同等の構成要素、部材、処理等には同一の符号を付し、適宜重複した説明は省略する。また、実施の形態は発明を限定するものではなく例示であり、実施の形態に記述されるすべての特徴やその組み合わせは必ずしも発明の本質的なものであるとは限らない。   Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the drawings. In addition, the same code | symbol is attached | subjected to the same or equivalent component, member, process, etc. which are shown by each drawing, and the overlapping description is abbreviate | omitted suitably. In addition, the embodiments do not limit the invention but are exemplifications, and all features and combinations thereof described in the embodiments are not necessarily essential to the invention.

図１は、本発明の実施の形態に係る樹脂封止型電子部品１００の構成を示す断面図であり、(Ａ)は銅めっき層３０の形成前の状態を示し、(Ｂ)はニッケルめっき層４０の形成前の状態を示し、(Ｃ)は完成状態を示す。まず、同図(Ｃ)を参照し、完成状態の樹脂封止型電子部品１００の例示的な構成について説明する。   FIG. 1 is a cross-sectional view showing a configuration of a resin-encapsulated electronic component 100 according to an embodiment of the present invention, (A) shows a state before the formation of a copper plating layer 30, and (B) shows nickel plating. The state before the formation of the layer 40 is shown, and (C) shows the completed state. First, an exemplary configuration of the resin-sealed electronic component 100 in a completed state will be described with reference to FIG.

樹脂封止型電子部品１００は、配線基板１０と、配線パターンとしてのグランドライン１１と、電源ライン１２と、信号ライン１３,１４と、素子としての受動素子１５及び表面実装型ＩＣ１６(ＩＣ：Integrated Circuit)と、内蔵ＩＣ１７と、封止樹脂１８と、金属体としての銅箔２０と、金属膜としての銅めっき層３０及びニッケルめっき層４０とを備える。なお、樹脂封止型電子部品１００は、本実施の形態では一つのモジュール部品としている。   The resin-encapsulated electronic component 100 includes a wiring board 10, a ground line 11 as a wiring pattern, a power supply line 12, signal lines 13 and 14, a passive element 15 as an element, and a surface mount IC 16 (IC: Integrated). Circuit), built-in IC 17, sealing resin 18, copper foil 20 as a metal body, copper plating layer 30 and nickel plating layer 40 as metal films. The resin-encapsulated electronic component 100 is a single module component in the present embodiment.

配線基板１０は、例えば多層樹脂基板であり、グランドライン１１及び電源ライン１２が内部の配線層に形成され、内蔵ＩＣ１７が内部に埋め込まれ、表面には信号ライン１３,１４が形成されるとともに受動素子１５及び表面実装型ＩＣ１６が搭載されている。ここで、グランドライン１１は、配線基板１０の外縁にまで延在するように配線基板１０に形成されている。なお、グランドライン１１、電源ライン１２及び信号ライン１３,１４は、例えば銅パターンである。   The wiring substrate 10 is, for example, a multilayer resin substrate. The ground line 11 and the power supply line 12 are formed in an internal wiring layer, the built-in IC 17 is embedded therein, signal lines 13 and 14 are formed on the surface, and passive. An element 15 and a surface mount IC 16 are mounted. Here, the ground line 11 is formed on the wiring board 10 so as to extend to the outer edge of the wiring board 10. The ground line 11, the power supply line 12, and the signal lines 13 and 14 are, for example, copper patterns.

受動素子１５及び表面実装型ＩＣ１６は封止樹脂１８によって封止され、封止樹脂１８の表面(ここでは上面)に銅箔２０が固着され、さらに銅めっき層３０及びニッケルめっき層４０が形成されて封止樹脂１８を覆っている。封止樹脂１８は例えば熱硬化性樹脂である。銅めっき層３０は、より詳細には、銅箔２０の上面(封止樹脂１８の表面に露出した部分に相当)から封止樹脂１８の側面、さらに配線基板１０の側面にまで延在し、銅箔２０の上面と接合され、かつグランドライン１１のうち配線基板１０の外縁に露出した部分と接合されている。これにより、銅箔２０の上面とグランドライン１１のうち配線基板１０の外縁に露出した部分とが銅めっき層３０のアンカーとして機能することとなり、銅めっき層３０を電気的・機械的に封止樹脂１８に密着させることができる。なお、銅めっき層３０は、好ましくは下地層としての無電解銅めっき層上に電解銅めっき層を形成したものである(図１(Ａ)→(Ｂ))。そして銅めっき層３０上にはニッケルめっき層４０がさらに形成される(同図(Ｂ)→(Ｃ))。   The passive element 15 and the surface mount IC 16 are sealed with a sealing resin 18, the copper foil 20 is fixed to the surface (here, the upper surface) of the sealing resin 18, and the copper plating layer 30 and the nickel plating layer 40 are formed. The sealing resin 18 is covered. The sealing resin 18 is, for example, a thermosetting resin. More specifically, the copper plating layer 30 extends from the upper surface of the copper foil 20 (corresponding to a portion exposed on the surface of the sealing resin 18) to the side surface of the sealing resin 18 and further to the side surface of the wiring substrate 10. It is joined to the upper surface of the copper foil 20 and to the portion of the ground line 11 exposed at the outer edge of the wiring board 10. As a result, the upper surface of the copper foil 20 and the portion of the ground line 11 exposed at the outer edge of the wiring substrate 10 function as an anchor for the copper plating layer 30, and the copper plating layer 30 is sealed electrically and mechanically. The resin 18 can be adhered. The copper plating layer 30 is preferably formed by forming an electrolytic copper plating layer on an electroless copper plating layer as a base layer (FIG. 1 (A) → (B)). A nickel plating layer 40 is further formed on the copper plating layer 30 ((B) → (C) in the figure).

以下、樹脂封止型電子部品１００の製造方法を詳細に説明する。なお、ここでは樹脂封止型電子部品１００を複数個同時に作製する場合で説明する。   Hereinafter, a method for manufacturing the resin-encapsulated electronic component 100 will be described in detail. Here, a case where a plurality of resin-encapsulated electronic components 100 are manufactured simultaneously will be described.

図２は、本発明の実施の形態に係る樹脂封止型電子部品１００の製造方法の流れを示す工程説明図(その１)である。図３は同工程説明図(その２)、図４は同工程説明図(その３)である。   FIG. 2 is a process explanatory view (No. 1) showing the flow of the method for manufacturing the resin-encapsulated electronic component 100 according to the embodiment of the present invention. FIG. 3 is an explanatory diagram of the process (part 2), and FIG. 4 is an explanatory diagram of the process (part 3).

図２で説明する封止工程の前に、配線基板１０(寸法例：150mm×150mm×0.3mm)上にはんだ(例えば千住金属製 M705)をスクリーン印刷し、はんだ印刷された配線基板１０上に受動素子１５及び表面実装型ＩＣ１６をマウンターで搭載する。受動素子１５は例えば0603,1005,2520サイズのＳＭＤ部品(ＳＭＤ：Surface Mount Device)、表面実装型ＩＣ１６(半導体ＩＣ)は例えば5050QFN PackageIC(ＱＦＮ：Quad Flat Non-leaded package)を使用する。受動素子１５及び表面実装型ＩＣ１６の搭載後、リフロー炉を通しはんだ接合を行う。はんだ接合後、はんだフラックスの洗浄を行い、配線基板１０表面のフラックスを除去する。この際、洗浄液は例えばナフテン系炭化水素液(日本石油化学株式会社製 商品名：ナフデゾールMS-20P)を使用する。   Before the sealing process described in FIG. 2, solder (for example, M705 made by Senju Metal) is screen-printed on the wiring board 10 (dimension example: 150 mm × 150 mm × 0.3 mm), and the solder printed wiring board 10 is then printed on the wiring board 10. The passive element 15 and the surface mount IC 16 are mounted by a mounter. The passive element 15 uses, for example, 0603, 1005, 2520 size SMD parts (SMD: Surface Mount Device), and the surface mount IC 16 (semiconductor IC) uses, for example, 5050 QFN Package IC (QFN: Quad Flat Non-leaded package). After mounting the passive element 15 and the surface mount IC 16, solder bonding is performed through a reflow furnace. After soldering, the solder flux is washed to remove the flux on the surface of the wiring board 10. At this time, for example, a naphthenic hydrocarbon liquid (trade name: Naphdesol MS-20P manufactured by Nippon Petrochemical Co., Ltd.) is used as the cleaning liquid.

(封止工程)
図２(Ａ)に示すように、部品が実装された配線基板１０上にモールド向けエポキシ樹脂系のシート状封止樹脂１８(寸法例：140mm×140mm×0.6mm)を静置する。シート状封止樹脂１８は例えば日東電工株式会社製のものを使用する。さらに、シート状封止樹脂１８上に銅箔２０(寸法例：140mm×140mm×0.012mm)を静置(載置)する。そして、部品搭載済みの配線基板１０にシート状封止樹脂１８及び銅箔２０を載せたものをＳＵＳ板５０(ＳＵＳ：ステンレス鋼)上に載せ、高さ合わせ用のＳＵＳ枠材５１を配線基板１０の周囲に置く。次に、図２(Ｂ)に示すように、部品搭載済みの配線基板１０、シート状封止樹脂１８及び銅箔２０を載せたＳＵＳ板５０を真空槽７０内の真空熱プレス用のプレス下板６１上に静置(載置)する。なお、銅箔２０の少なくとも一方の面は粗面化処理され、その粗面化された面をシート状封止樹脂１８側にして載置する(銅箔２０の粗面化された面をシート状封止樹脂１８と貼り合わせる)ことが好ましい。 (Sealing process)
As shown in FIG. 2A, an epoxy resin-based sheet-shaped sealing resin 18 (dimension example: 140 mm × 140 mm × 0.6 mm) for molding is left on the wiring board 10 on which components are mounted. As the sheet-shaped sealing resin 18, for example, one manufactured by Nitto Denko Corporation is used. Further, a copper foil 20 (size example: 140 mm × 140 mm × 0.012 mm) is placed (placed) on the sheet-shaped sealing resin 18. Then, the component-mounted wiring board 10 on which the sheet-like sealing resin 18 and the copper foil 20 are placed is placed on a SUS board 50 (SUS: stainless steel), and the SUS frame material 51 for height adjustment is placed on the wiring board. Place around 10. Next, as shown in FIG. 2B, the SUS plate 50 on which the component-mounted wiring board 10, the sheet-like sealing resin 18 and the copper foil 20 are placed is pressed under a vacuum hot press in a vacuum chamber 70. The plate 61 is placed (placed) on the plate 61. In addition, at least one surface of the copper foil 20 is roughened, and the roughened surface is placed with the sheet-shaped sealing resin 18 side (the roughened surface of the copper foil 20 is a sheet). It is preferable to bond it with the sealing resin 18.

真空槽７０の真空引きを始め、真空槽７０内を減圧環境(実質的な真空状態)にする。このときの到達真空度は例えば１ＫＰａ未満とする。また、プレス下板６１及びプレス上板６２を加熱して所定温度(例えば８０℃以上)まで上げる。その後、プレス下板６１を上昇させ、ＳＵＳ板５０に静置されている部品搭載済みの配線基板１０、シート状封止樹脂１８及び銅箔２０を配線基板１０の厚み方向に加圧(熱プレス)する。プレス圧は例えば３ＭＰａとする。３ＭＰａの状態で所定時間(例えば１分間)プレスを継続した後、プレス圧を下げ、プレス下板６１を下降させる。プレス下板６１の下降と同時に真空槽７０をリークさせて大気圧に戻し、プレス下板６１及びプレス上板６２の加熱を止め、冷却を開始する。プレス下板６１及びプレス上板６２の温度が所定温度以下(例えば４０℃以下)になったところで、真空槽７０の中に入れてあるＳＵＳ板５０、部品搭載済みの配線基板１０、シート状封止樹脂１８及び銅箔２０を取り出す。その後、真空熱プレスを経た部品搭載済みの配線基板１０、シート状封止樹脂１８及び銅箔２０を別のＳＵＳ板(不図示)上に載せ、１５０℃に設定された恒温槽に所定時間(例えば９０分間)だけ入れ、封止樹脂１８を硬化させる。硬化後の状態は図２(Ｃ)に示される。この状態で、配線基板１０に搭載された受動素子１５及び表面実装型ＩＣ１６は封止樹脂１８によって封止され、封止樹脂１８の上面には銅箔２０が固着されている。   The evacuation of the vacuum chamber 70 is started, and the inside of the vacuum chamber 70 is brought into a reduced pressure environment (substantial vacuum state). The ultimate vacuum at this time is, for example, less than 1 KPa. Further, the lower press plate 61 and the upper press plate 62 are heated to a predetermined temperature (for example, 80 ° C. or higher). Thereafter, the press lower plate 61 is raised, and the component-mounted wiring board 10, the sheet-like sealing resin 18, and the copper foil 20 that are statically placed on the SUS board 50 are pressed in the thickness direction of the wiring board 10 (hot press). ) The press pressure is 3 MPa, for example. After continuing the press in a state of 3 MPa for a predetermined time (for example, 1 minute), the press pressure is lowered and the press lower plate 61 is lowered. Simultaneously with the lowering of the lower press plate 61, the vacuum chamber 70 is leaked to return to the atmospheric pressure, the heating of the lower press plate 61 and the upper press plate 62 is stopped, and the cooling is started. When the temperature of the lower press plate 61 and the upper press plate 62 becomes a predetermined temperature or lower (for example, 40 ° C. or lower), the SUS plate 50 placed in the vacuum chamber 70, the wiring board 10 on which components are mounted, the sheet-like seal The stop resin 18 and the copper foil 20 are taken out. Thereafter, the component-mounted wiring board 10 that has undergone vacuum heat pressing, the sheet-like sealing resin 18 and the copper foil 20 are placed on another SUS plate (not shown) and placed in a thermostat set at 150 ° C. for a predetermined time ( For example, 90 minutes), and the sealing resin 18 is cured. The state after curing is shown in FIG. In this state, the passive element 15 and the surface mount IC 16 mounted on the wiring substrate 10 are sealed with a sealing resin 18, and a copper foil 20 is fixed to the upper surface of the sealing resin 18.

(ハーフダイス工程)
封止樹脂１８の硬化後、配線基板１０の裏面をダイシングテープでダイシング装置のテーブル側に貼り合わせ、図３(Ａ)に示すように、封止樹脂１８の表面から配線基板１０の所定深さにまで至る切込み８０(溝)をダイシング装置で入れ、グランドライン１１を切込み８０に臨んで露出させる。切込み８０の位置は、後工程で個々の樹脂封止型電子部品１００に分割する際の切断ラインと同じである。 (Half die process)
After the sealing resin 18 is cured, the back surface of the wiring substrate 10 is bonded to the table side of the dicing apparatus with a dicing tape, and a predetermined depth of the wiring substrate 10 from the surface of the sealing resin 18 as shown in FIG. The notch 80 (groove) extending up to is made with a dicing device, and the ground line 11 is exposed to the notch 80 and exposed. The position of the notch 80 is the same as the cutting line when dividing the individual resin-encapsulated electronic components 100 in the subsequent process.

(レジスト工程)
配線基板１０の裏面(封止樹脂１８のない面)は後工程でめっき層を形成しないため、本工程で図３(Ｂ),(Ｃ)に示すように配線基板１０の裏面にめっきレジスト材８５を付着させる(貼り合わせる)。ここで、めっきレジスト材８５は、単独ではなく、金属箔(ここでは銅箔８２で、封止樹脂１８上に固着した銅箔２０とは別のもの)に貼り合わせたマスク材８７とした状態で用いる。この意義については後述する。このマスク材８７は、配線基板１０の裏面側の電極パターンを電磁シールドのためのめっき浴から保護することが目的である。 (Resist process)
Since the back surface of the wiring board 10 (the surface without the sealing resin 18) does not form a plating layer in a subsequent process, a plating resist material is formed on the back surface of the wiring board 10 in this process as shown in FIGS. 85 is attached (bonded together). Here, the plating resist material 85 is not a single material but a mask material 87 bonded to a metal foil (here, a copper foil 82 and different from the copper foil 20 fixed on the sealing resin 18). Used in. This significance will be described later. The mask material 87 is intended to protect the electrode pattern on the back side of the wiring board 10 from a plating bath for electromagnetic shielding.

マスク材８７の貼り合わせの手順は次のとおりである。まず、一方の面が粗面化処理された銅箔８２を、粗面側を上にしてスクリーン印刷機のステージ上に置く。そして、スクリーン印刷機でめっきレジスト材８５を図３(Ｄ)に示すように銅箔８２の周辺部を除いた全面に印刷する(膜厚は約２０μｍ)。なお、周辺部を除いて印刷するのは、めっき処理の後の剥離を容易にするためである。その後、めっきレジスト材８５の印刷された銅箔８２を所定高温度(例えば１３０℃)の恒温槽に所定時間(例えば２分間)入れる(仮乾燥)。次に、封止樹脂１８で封止(モールド)された配線基板１０の裏面に、銅箔８２にめっきレジスト材８５を印刷したもの(マスク材８７)を、めっきレジスト材８５が配線基板１０側となるように貼り合わせる(図３(Ｂ)→(Ｃ), 真空ラミネート)。ラミネート装置によるマスク材８７の貼り合わせ条件は、例えば、プレス板を１３０℃まで加熱し、５ｈＰａ以下の真空度を２０秒間維持した後、プレス圧０．５ＭＰａで６０秒間プレスするものとする。   The procedure for bonding the mask material 87 is as follows. First, a copper foil 82 having one surface roughened is placed on the stage of a screen printing machine with the rough surface side up. And the plating resist material 85 is printed on the whole surface except the peripheral part of the copper foil 82 as shown in FIG.3 (D) with a screen printing machine (film thickness is about 20 micrometers). The reason for printing except the peripheral portion is to facilitate peeling after the plating process. Thereafter, the copper foil 82 on which the plating resist material 85 is printed is placed in a constant temperature bath at a predetermined high temperature (eg, 130 ° C.) for a predetermined time (eg, 2 minutes) (temporary drying). Next, on the back surface of the wiring substrate 10 sealed (molded) with the sealing resin 18, a copper foil 82 printed with a plating resist material 85 (mask material 87) is used, and the plating resist material 85 is on the wiring substrate 10 side. (Fig. 3 (B)-> (C), vacuum lamination). The bonding condition of the mask material 87 by the laminating apparatus is, for example, that the press plate is heated to 130 ° C. and the degree of vacuum of 5 hPa or less is maintained for 20 seconds, and then pressed at a press pressure of 0.5 MPa for 60 seconds.

(金属膜形成工程)
本工程は、無電解めっき工程と電解めっき工程とを含む。最初に無電解めっき工程を行う。すなわち、図４(Ａ)に示すように、マスク材８７を配線基板１０の裏面にラミネートした状態で、無電解銅めっき処理を施す(図５(Ａ)に処理の詳細を示す)。ここで形成した無電解銅めっき層３１(膜厚は約０.５μｍ)は、以降の電解めっき工程で給電膜(下地層)として機能する。続いて電解めっき工程を行う。すなわち、無電解銅めっき層３１上に電解銅めっき処理を施し(図５(Ｂ)に処理の詳細を示す)、電解銅めっき層上に、必要に応じて例えば防錆を目的に、電解ニッケルめっき処理を施す。ここで形成する電解銅めっき層の膜厚は、例えば、２ＧＨｚの周波数帯を使用するモジュール部品では約１０μｍとする。また、電解ニッケルめっき層の膜厚は、例えばは３〜５μｍとする。電解めっき工程後の状態を図４(Ｂ)に示す。 (Metal film forming process)
This process includes an electroless plating process and an electrolytic plating process. First, an electroless plating process is performed. That is, as shown in FIG. 4A, an electroless copper plating process is performed in a state where the mask material 87 is laminated on the back surface of the wiring substrate 10 (details of the process are shown in FIG. 5A). The electroless copper plating layer 31 (having a film thickness of about 0.5 μm) formed here functions as a power supply film (underlayer) in the subsequent electrolytic plating process. Subsequently, an electrolytic plating process is performed. That is, electrolytic copper plating treatment is performed on the electroless copper plating layer 31 (details of the treatment are shown in FIG. 5B), and electrolytic nickel is applied on the electrolytic copper plating layer as needed for the purpose of rust prevention, for example. Apply plating. The film thickness of the electrolytic copper plating layer formed here is, for example, about 10 μm in a module component that uses a frequency band of 2 GHz. Moreover, the film thickness of an electrolytic nickel plating layer shall be 3-5 micrometers, for example. The state after the electrolytic plating process is shown in FIG.

(切断工程)
めっき処理の後、配線基板１０の裏面に貼り合わせてあるマスク材８７を剥がし(図４(Ｃ))、配線基板１０の裏面をダイシングテープでダイシング装置のテーブル側に貼り合わせ、ダイシング装置で切断して個々の樹脂封止型電子部品１００に分割する。このときの切断箇所は、上述のハーフダイス工程で切込み８０(溝)を入れた箇所である。 (Cutting process)
After the plating process, the mask material 87 bonded to the back surface of the wiring substrate 10 is peeled off (FIG. 4C), the back surface of the wiring substrate 10 is bonded to the table side of the dicing device with a dicing tape, and cut by the dicing device. Then, it is divided into individual resin-encapsulated electronic components 100. The cutting location at this time is a location where a cut 80 (groove) is made in the above-described half-die process.

本実施の形態によれば、下記の効果を奏することができる。   According to the present embodiment, the following effects can be achieved.

(1) 樹脂封止型電子部品１００においては、配線基板１０に搭載された受動素子１５及び表面実装型ＩＣ１６を封止する封止樹脂１８の上面に銅箔２０が固着され、配線基板１０の外縁にまで延在するようにグランドライン１１が配線基板１０に形成され、銅箔２０の上面から封止樹脂１８の側面、さらに配線基板１０の側面にまで延在するように銅めっき層３０が形成されて銅めっき層３０が銅箔２０の上面及びグランドライン１１のうち配線基板１０の外縁に露出した部分と接合されている。このため、銅箔２０の上面とグランドライン１１のうち配線基板１０の外縁に露出した部分とが銅めっき層３０のアンカーとして機能することとなり、銅めっき層３０は電気的・機械的に封止樹脂１８に強固に密着する。したがって、封止樹脂１８の表面に密着強度の高い銅めっき層３０を電磁シールドとして有する信頼性の高い樹脂封止型電子部品１００を実現することができる。 (1) In the resin-encapsulated electronic component 100, the copper foil 20 is fixed to the upper surface of the encapsulating resin 18 that encapsulates the passive element 15 and the surface-mounted IC 16 mounted on the wiring substrate 10, and the wiring substrate 10 A ground line 11 is formed on the wiring substrate 10 so as to extend to the outer edge, and a copper plating layer 30 is formed so as to extend from the upper surface of the copper foil 20 to the side surface of the sealing resin 18 and further to the side surface of the wiring substrate 10. The formed copper plating layer 30 is joined to the upper surface of the copper foil 20 and the portion of the ground line 11 exposed at the outer edge of the wiring substrate 10. For this reason, the upper surface of the copper foil 20 and the portion of the ground line 11 exposed at the outer edge of the wiring board 10 function as an anchor for the copper plating layer 30, and the copper plating layer 30 is electrically and mechanically sealed. It adheres firmly to the resin 18. Therefore, a highly reliable resin-encapsulated electronic component 100 having the copper plating layer 30 with high adhesion strength on the surface of the encapsulating resin 18 as an electromagnetic shield can be realized.

(2) 樹脂封止型電子部品１００の製造方法においては、封止工程で封止樹脂１８の上面に銅箔２０を固着し、かつハーフダイス工程で封止樹脂１８の表面から配線基板１０の所定深さにまで至る切込み８０を入れてグランドライン１１を切込み８０に臨んで露出させている。このため、無電解めっき工程で形成した無電解銅めっき層は、銅箔２０の上面及びグランドライン１１のうち切込み８０に臨んで露出した部分と接合されることとなり、銅箔２０の上面及びグランドライン１１のうち切込み８０に臨んで露出した部分のアンカー効果によって封止樹脂１８の表面に強固に密着する。したがって、封止樹脂１８の表面に密着強度の高い銅めっき層３０を電磁シールドとして有する信頼性の高い樹脂封止型電子部品１００を製造することができる。 (2) In the manufacturing method of the resin-encapsulated electronic component 100, the copper foil 20 is fixed to the upper surface of the sealing resin 18 in the sealing process, and the wiring substrate 10 is formed from the surface of the sealing resin 18 in the half-dicing process. A notch 80 extending to a predetermined depth is inserted and the ground line 11 is exposed facing the notch 80. For this reason, the electroless copper plating layer formed in the electroless plating process is joined to the upper surface of the copper foil 20 and the exposed portion of the ground line 11 facing the notch 80, and the upper surface of the copper foil 20 and the ground. The line 11 is firmly adhered to the surface of the sealing resin 18 by the anchor effect of the exposed portion facing the notch 80. Therefore, a highly reliable resin-encapsulated electronic component 100 having the copper plating layer 30 with high adhesion strength on the surface of the encapsulating resin 18 as an electromagnetic shield can be manufactured.

(3) 封止工程では、部品が実装された配線基板１０上にシート状封止樹脂１８を静置し、かつシート状封止樹脂１８上に銅箔２０を静置し、配線基板１０とシート状封止樹脂１８と銅箔２０とを配線基板１０の厚み方向にプレスしているため、多数個分の樹脂封止を一括して実行でき、かつシート状封止樹脂１８への銅箔２０の固着も同時に行えるため効率がよい。 (3) In the sealing step, the sheet-shaped sealing resin 18 is allowed to stand on the wiring substrate 10 on which the components are mounted, and the copper foil 20 is allowed to stand on the sheet-shaped sealing resin 18. Since the sheet-shaped sealing resin 18 and the copper foil 20 are pressed in the thickness direction of the wiring substrate 10, a large number of resin sealings can be performed collectively, and the copper foil to the sheet-shaped sealing resin 18 can be performed. Since 20 can be fixed at the same time, it is efficient.

(4) レジスト工程では、めっきレジスト材８５を単独ではなく銅箔８２に貼り合わせたマスク材８７とした状態で配線基板１０の裏面に付着させているため、めっきレジスト材８５に付着した無電解めっき層が電解めっき工程でめっき液中に剥離して分散することを防止することができる。すなわち、めっきレジスト材８５を単独で用いた場合、めっきレジスト材８５に付着した無電解めっき層(密着強度が弱い)が電解めっき工程においてめっき液中に分散する現象が発生してめっき液中の銅濃度の管理に支障を来し、めっき仕上がりのバラツキ原因となる問題があるところ、本実施の形態のようにめっきレジスト材８５を単独ではなく銅箔８２に貼り合わせたマスク材８７とした状態で配線基板１０の裏面に付着させた場合、銅箔８２に付着した無電解めっき層はめっきレジスト材８５に付着したものよりも密着強度が大きいため、そのような問題を解決してめっき仕上がりを良好にすることができる。なお、めっきレジスト材８５に付着した無電解めっき層の密着強度が弱いのは、めっきレジスト材８５は酸・アルカリに強いことが求められ、めっき処理が有効に効かないことによる。 (4) In the resist process, the plating resist material 85 is attached to the back surface of the wiring substrate 10 in a state of being a mask material 87 bonded to the copper foil 82 instead of alone. It is possible to prevent the plating layer from peeling and dispersing in the plating solution in the electrolytic plating process. That is, when the plating resist material 85 is used alone, a phenomenon occurs in which the electroless plating layer (having low adhesion strength) attached to the plating resist material 85 is dispersed in the plating solution in the electrolytic plating process. There is a problem in that the copper concentration is hindered and the plating finish may vary. The state of the mask material 87 in which the plating resist material 85 is bonded to the copper foil 82 instead of being alone as in the present embodiment. In this case, the electroless plating layer attached to the copper foil 82 has a higher adhesion strength than that attached to the plating resist material 85. Can be good. The reason why the adhesion strength of the electroless plating layer attached to the plating resist material 85 is weak is that the plating resist material 85 is required to be resistant to acid and alkali, and the plating treatment is not effective.

(5) 銅箔２０は銅めっき層３０のアンカーとして機能するのみならず自身も電磁シールド効果を有するため、より高い電磁シールド効果を得ることができる。ここで、封止樹脂１８の上面は電磁シールドの観点から金属の厚みを大きく確保することが望ましいため、封止樹脂１８の上面に銅箔２０を固着することは、封止樹脂１８の上面の金属の厚みを稼ぐ点においても有意義である。 (5) Since the copper foil 20 not only functions as an anchor for the copper plating layer 30 but also has an electromagnetic shielding effect, the copper foil 20 can obtain a higher electromagnetic shielding effect. Here, since it is desirable that the upper surface of the sealing resin 18 has a large metal thickness from the viewpoint of electromagnetic shielding, fixing the copper foil 20 to the upper surface of the sealing resin 18 It is also meaningful in terms of increasing the thickness of the metal.

(6) 封止樹脂１８は配線基板１０よりも熱膨張率が大きいため、封止樹脂１８の硬化後の冷却時(恒温層から出した時)やリフロー加熱時に反りが発生するところ、本実施の形態では、封止樹脂１８の上面に銅箔２０(熱膨張率は配線基板１０と近い)が固着されているため、反りの発生が防止されて例えば端子浮きによる裏面端子の接合不具合が起こらなくなる。 (6) Since the thermal expansion coefficient of the sealing resin 18 is larger than that of the wiring substrate 10, warping occurs at the time of cooling after the sealing resin 18 is cured (when it is taken out of the thermostatic layer) or at the time of reflow heating. In this embodiment, since the copper foil 20 (coefficient of thermal expansion is close to that of the wiring board 10) is fixed to the upper surface of the sealing resin 18, warpage is prevented from occurring and, for example, a back terminal joining failure due to terminal floating occurs. Disappear.

(7) 銅めっき層３０上にニッケルめっき層４０をさらに形成しているため、銅めっき層３０で主として電磁シールド効果を確保しつつ、ニッケルめっき層４０で主として防錆効果も併せて有することができる。 (7) Since the nickel plating layer 40 is further formed on the copper plating layer 30, the nickel plating layer 40 mainly has a rust prevention effect while ensuring the electromagnetic shielding effect mainly. it can.

(8) グランドライン１１及び銅箔２０のアンカー効果により銅めっき層３０を強固に密着させることができるため、銅めっき層３０の膜厚を大きく確保することができる。膜厚の確保は、１００ＭＨｚ程度の周波数帯を使用するモジュール部品で特に必要となる。このことを以下説明する。図６は、銅めっき層３０の膜厚を０μｍ(銅めっき層無し),５μｍ,１０μｍとした場合の各々において、モジュール部品(１０ｍｍ×１０ｍｍ×１ｍｍ)の外部における磁界強度をモジュール部品の上側で横方向３０ｍｍに渡って測定した場合の磁界強度比較図であり、(Ａ)はモジュール部品が１ＧＨｚの周波数帯を使用した場合、(Ｂ)はモジュール部品が１００ＭＨｚの周波数帯を使用した場合をそれぞれ示す。同図(Ａ)に示されるように、モジュール部品の使用周波数帯が１ＧＨｚであるときは、銅めっき層３０の膜厚が５μｍであっても同膜厚が１０μｍの場合と遜色ないシールド効果を得られる。一方、同図(Ｂ)に示されるように、モジュール部品の使用周波数帯が１００ＭＨｚであるときは、銅めっき層３０の膜厚が５μｍであると、同膜厚が１０μｍの場合と比較して、特にモジュール部品の真上部分においてシールド効果が低くなっている。したがって、本実施の形態で膜厚を大きく確保可能である点の有意義性は明らかといえる。 (8) Since the copper plating layer 30 can be firmly adhered by the anchor effect of the ground line 11 and the copper foil 20, a large film thickness of the copper plating layer 30 can be ensured. Securing the film thickness is particularly necessary for module parts that use a frequency band of about 100 MHz. This will be described below. FIG. 6 shows the magnetic field strength outside the module component (10 mm × 10 mm × 1 mm) at the upper side of the module component when the thickness of the copper plating layer 30 is 0 μm (no copper plating layer), 5 μm, and 10 μm. It is a magnetic field strength comparison chart when measured over the horizontal direction 30 mm, (A) when the module component uses the frequency band of 1 GHz, (B) is the case where the module component uses the frequency band of 100 MHz, respectively. Show. As shown in FIG. 6A, when the frequency band of the module component is 1 GHz, even if the film thickness of the copper plating layer 30 is 5 μm, the shielding effect is comparable to the case where the film thickness is 10 μm. can get. On the other hand, as shown in FIG. 5B, when the operating frequency band of the module component is 100 MHz, when the film thickness of the copper plating layer 30 is 5 μm, compared to the case where the film thickness is 10 μm. In particular, the shielding effect is low in the portion directly above the module component. Therefore, it can be said that the significance of the fact that a large film thickness can be secured in this embodiment is clear.

以上、実施の形態を例に本発明を説明したが、実施の形態の各構成要素や各処理プロセスには請求項に記載の範囲で種々の変形が可能であることは当業者に理解されるところである。以下、変形例について触れる。   The present invention has been described above by taking the embodiment as an example. However, it is understood by those skilled in the art that various modifications can be made to each component and each processing process of the embodiment within the scope of the claims. By the way. Hereinafter, modifications will be described.

実施の形態では銅箔２０が封止樹脂１８の上面全体に渡って固着される場合を説明したが、変形例では銅箔２０は封止樹脂１８の上面の一部に固着されてもよい。封止樹脂１８の上面のうちどの部分に銅箔２０を固着するかは、配線基板１０に搭載する素子や設計上の都合により適宜決めることができる。また、銅箔２０は、封止樹脂１８の上面に替えて又はそれに加えて、封止樹脂１８の側面の少なくとも一部に固着されてもよい。銅めっき層３０に対するアンカー機能に関する限りは、側面への固着も上面への固着と同様に銅めっき層３０の密着強度を高める効果がある。さらに、銅箔２０に替えて銅以外を材料とする金属箔(電磁シールド可能なもの)を用いてもよい。さらに、金属箔に替えて、封止樹脂１８に埋め込まれて一部のみが封止樹脂１８の表面に露出した金属体を用いても、銅めっき層３０に対するアンカー機能を実現できる。   In the embodiment, the case where the copper foil 20 is fixed over the entire upper surface of the sealing resin 18 has been described. However, in a modification, the copper foil 20 may be fixed to a part of the upper surface of the sealing resin 18. The portion of the upper surface of the sealing resin 18 to which the copper foil 20 is fixed can be appropriately determined depending on the elements mounted on the wiring board 10 and the design convenience. Further, the copper foil 20 may be fixed to at least a part of the side surface of the sealing resin 18 instead of or in addition to the upper surface of the sealing resin 18. As far as the anchoring function with respect to the copper plating layer 30 is concerned, fixing to the side surface has the effect of increasing the adhesion strength of the copper plating layer 30 in the same manner as fixing to the upper surface. Furthermore, instead of the copper foil 20, a metal foil made of materials other than copper (which can be electromagnetically shielded) may be used. Furthermore, the anchor function for the copper plating layer 30 can be realized even if a metal body that is embedded in the sealing resin 18 and only a part of the metal foil is exposed on the surface of the sealing resin 18 is used.

実施の形態では銅めっき層３０が封止樹脂１８の表面を全面的に覆う場合を説明したが、配線基板１０に搭載する素子や設計上の都合によっては銅めっき層３０は封止樹脂１８の表面の一部を覆うものであってもよい。さらに、めっき層は銅、ニッケルに限定されず、条件に合った任意の材質でかまわない。   In the embodiment, the case where the copper plating layer 30 covers the entire surface of the sealing resin 18 has been described. However, the copper plating layer 30 is made of the sealing resin 18 depending on the elements mounted on the wiring board 10 or the convenience of design. A part of the surface may be covered. Furthermore, the plating layer is not limited to copper or nickel, and any material that meets the conditions may be used.

実施の形態では電解銅めっき層の膜厚を約１０μｍとしたが、電解銅めっき層の膜厚はそれに限らずモジュール部品の仕様によって適宜決められる。   In the embodiment, the film thickness of the electrolytic copper plating layer is about 10 μm, but the film thickness of the electrolytic copper plating layer is not limited to this and can be determined as appropriate according to the specifications of the module component.

実施の形態では配線基板１０に搭載された受動素子１５及び表面実装型ＩＣ１６を素子として例示したが、素子は配線基板１０に搭載されたものに限らず、配線基板１０に直接形成されたものであってもよい。   In the embodiment, the passive element 15 and the surface mount IC 16 mounted on the wiring board 10 are exemplified as elements. However, the elements are not limited to those mounted on the wiring board 10 but are formed directly on the wiring board 10. There may be.

実施の形態では配線基板１０が樹脂基板である場合を説明したが、変形例では配線基板１０はＬＴＣＣ(ＬＴＣＣ: Low Temperature Co-fired Ceramics)等の多層基板やシリコンウェハ等としてもよい。   In the embodiment, the case where the wiring substrate 10 is a resin substrate has been described. However, in a modification, the wiring substrate 10 may be a multilayer substrate such as LTCC (LTCC: Low Temperature Co-fired Ceramics), a silicon wafer, or the like.

実施の形態では封止樹脂１８がエポキシ樹脂等の熱硬化性樹脂である場合を説明したが、変形例ではその他の条件に合った任意の材質でかまわない。また、プレス、無電解めっき、電解めっきの条件も、実施の形態で説明した例に限定されず、適時必要な条件を採用しても構わない。   In the embodiment, the case where the sealing resin 18 is a thermosetting resin such as an epoxy resin has been described. However, in a modified example, any material that meets other conditions may be used. Further, the conditions for pressing, electroless plating, and electrolytic plating are not limited to the examples described in the embodiment, and conditions necessary in a timely manner may be adopted.

１０ 配線基板
１１ グランドライン
１２ 電源ライン
１３,１４ 信号ライン
１５ 受動素子
１６ 表面実装型ＩＣ
１７ 内蔵ＩＣ
１８ 封止樹脂
２０ 銅箔
３０ 銅めっき層
４０ ニッケルめっき層
１００ 封止型電子部品 DESCRIPTION OF SYMBOLS 10 Wiring board 11 Ground line 12 Power supply line 13, 14 Signal line 15 Passive element 16 Surface mount type IC
17 Built-in IC
18 Sealing resin 20 Copper foil 30 Copper plating layer 40 Nickel plating layer 100 Sealed electronic component

Claims (11)

配線基板と、
前記配線基板の外縁にまで延在するように前記配線基板に形成されたグランドラインを含む配線パターンと、
前記配線基板に搭載又は形成された素子と、
前記素子を封止する封止樹脂と、
前記封止樹脂の上面に全面的に固着された金属箔と、
前記金属箔の上面に全面的に接合され且つ前記グランドラインのうち前記配線基板の外縁に露出した部分に接合された金属膜とを備える、樹脂封止型電子部品。 A wiring board;
A wiring pattern including a ground line formed on the wiring board so as to extend to an outer edge of the wiring board;
An element mounted or formed on the wiring board;
A sealing resin for sealing the element;
A metal foil fixed entirely on the upper surface of the sealing resin;
A resin-encapsulated electronic component comprising: a metal film that is bonded to the entire upper surface of the metal foil and bonded to a portion of the ground line exposed at an outer edge of the wiring board. 請求項１に記載の樹脂封止型電子部品において、前記金属箔は、硬化前のシート状の前記封止樹脂上に載置され、前記配線基板の厚み方向への加圧の後に前記封止樹脂を硬化させることで前記封止樹脂の上面に固着されている、樹脂封止型電子部品。 2. The resin-sealed electronic component according to claim 1 , wherein the metal foil is placed on the sheet-shaped sealing resin before curing, and the sealing is performed after pressing in the thickness direction of the wiring board. A resin-encapsulated electronic component that is fixed to the upper surface of the encapsulating resin by curing the resin. 請求項１又は２に記載の樹脂封止型電子部品において、前記金属箔は、前記素子に対するシールド効果を有するものである、樹脂封止型電子部品。 3. The resin-encapsulated electronic component according to claim 1, wherein the metal foil has a shielding effect on the element. 請求項１から３のいずれかに記載の樹脂封止型電子部品において、前記金属膜は、めっき処理によって形成され、少なくとも無電解めっき層を含むものである、樹脂封止型電子部品。 In the resin sealed type electronic component according to any of claims 1 to 3, wherein the metal layer is formed by plating, is intended to include at least an electroless plated layer, a resin-sealed type electronic component. 請求項１から４のいずれかに記載の樹脂封止型電子部品において、
前記封止樹脂は熱硬化性樹脂であり、
前記金属箔は銅箔であり、
前記金属膜は、前記銅箔及び前記グランドラインに接合された無電解銅めっき層と、前記無電解銅めっき層上に形成された電解銅めっき層と、前記電解銅めっき層上に形成された電解ニッケルめっき層とを含む、樹脂封止型電子部品。 In the resin-sealed electronic component according to any one of claims 1 to 4 ,
The sealing resin is a thermosetting resin,
The metal foil is a copper foil,
The metal film is formed on the electroless copper plating layer bonded to the copper foil and the ground line, the electrolytic copper plating layer formed on the electroless copper plating layer, and the electrolytic copper plating layer. A resin-sealed electronic component including an electrolytic nickel plating layer. グランドラインを含む配線パターンが形成された配線基板に搭載又は形成された素子を封止樹脂で封止するとともに、金属箔を前記封止樹脂の上面に全面的に固着する封止工程と、
前記封止樹脂の上面側から前記配線基板の所定深さにまで至る切込みを入れ、前記グランドラインを前記切込みに臨んで露出させるハーフダイス工程と、
前記金属箔の上面に全面的に接合し且つ前記グランドラインのうち前記切込みに臨んで露出した部分と接合する金属膜を形成する金属膜形成工程と、
前記切込みを入れた箇所を切断して個々の樹脂封止型電子部品に分割する切断工程とを有する、樹脂封止型電子部品の製造方法。 A sealing step of sealing an element mounted or formed on a wiring board on which a wiring pattern including a ground line is formed with a sealing resin , and fixing a metal foil to the entire top surface of the sealing resin;
A half die step of making a cut from the upper surface side of the sealing resin to a predetermined depth of the wiring board and exposing the ground line facing the cut,
A metal film forming step of forming a metal film that is bonded to the entire upper surface of the metal foil and bonded to the exposed portion of the ground line facing the notch;
A method for manufacturing a resin-encapsulated electronic component, comprising: a cutting step of cutting the cut portion and dividing it into individual resin-encapsulated electronic components. グランドラインを含む配線パターンが形成された配線基板に搭載又は形成された素子を封止樹脂で封止するとともに、金属箔を前記封止樹脂の上面に固着する封止工程と、A sealing step of sealing an element mounted or formed on a wiring board on which a wiring pattern including a ground line is formed with a sealing resin, and fixing a metal foil to the upper surface of the sealing resin;
前記封止樹脂の上面側から前記配線基板の所定深さにまで至る切込みを入れ、前記グランドラインを前記切込みに臨んで露出させるハーフダイス工程と、A half die step of making a cut from the upper surface side of the sealing resin to a predetermined depth of the wiring board and exposing the ground line facing the cut,
前記金属箔の上面に全面的に接合し且つ前記グランドラインのうち前記切込みに臨んで露出した部分と接合する金属膜を形成する金属膜形成工程と、A metal film forming step of forming a metal film that is bonded to the entire upper surface of the metal foil and bonded to the exposed portion of the ground line facing the notch;
前記切込みを入れた箇所を切断して個々の樹脂封止型電子部品に分割する切断工程とを有し、A cutting step of cutting the cut portion and dividing it into individual resin-encapsulated electronic components,
前記金属膜形成工程の前に、前記配線基板の表面のうち金属膜を形成しない部分にレジスト及び金属箔を前記レジストが前記配線基板側となるように付着させるレジスト工程をさらに有し、Before the metal film forming step, further comprising a resist step of attaching a resist and a metal foil to the portion of the surface of the wiring board where the metal film is not formed so that the resist is on the wiring board side,
前記金属膜形成工程の後に、前記レジスト工程で付着させた前記レジスト及び前記金属箔を取り除く、樹脂封止型電子部品の製造方法。A method for manufacturing a resin-encapsulated electronic component, wherein the resist and the metal foil adhered in the resist step are removed after the metal film forming step. 請求項６又は７に記載の樹脂封止型電子部品の製造方法において、前記封止工程は、前記配線基板上にシート状の前記封止樹脂及び前記金属箔を前記封止樹脂が前記配線基板側となるように載置し、前記配線基板と前記封止樹脂と前記金属箔とを前記配線基板の厚み方向に加圧した後にシート状の前記封止樹脂を硬化させるものである、樹脂封止型電子部品の製造方法。 8. The method of manufacturing a resin-encapsulated electronic component according to claim 6 or 7, wherein the sealing step includes forming the sheet-shaped sealing resin and the metal foil on the wiring substrate by using the sealing resin as the wiring substrate. A resin encapsulant that is placed so as to be on the side, and the sheet-shaped sealing resin is cured after pressing the wiring board, the sealing resin, and the metal foil in the thickness direction of the wiring board. Manufacturing method for stationary electronic components. 請求項８に記載の樹脂封止型電子部品の製造方法において、
シート状の前記封止樹脂は熱硬化性樹脂であり、
前記封止工程の前記加圧は減圧環境下において行われ、かつ、前記加圧とともに少なくともシート状の前記封止樹脂を加熱する、樹脂封止型電子部品の製造方法。 In the manufacturing method of the resin-sealed electronic component according to claim 8,
The sheet-shaped sealing resin is a thermosetting resin,
The method of manufacturing a resin-encapsulated electronic component, wherein the pressurization in the sealing step is performed in a reduced pressure environment, and at least the sheet-shaped sealing resin is heated together with the pressurization. 請求項６から９のいずれかに記載の樹脂封止型電子部品の製造方法において、前記金属膜形成工程は、前記金属箔の上面に全面的に接合し且つ前記グランドラインのうち前記切込みに臨んで露出した部分と接合する無電解めっき層を形成する無電解めっき工程と、前記無電解めっき層上に電解めっき層を形成する電解めっき工程とを含む、樹脂封止型電子部品の製造方法。 10. The method for manufacturing a resin-encapsulated electronic component according to claim 6 , wherein the metal film forming step is entirely joined to an upper surface of the metal foil and faces the notch in the ground line. A method for producing a resin-encapsulated electronic component, comprising: an electroless plating step for forming an electroless plating layer to be bonded to a portion exposed in step 1; and an electroplating step for forming an electroplating layer on the electroless plating layer. 請求項１０に記載の樹脂封止型電子部品の製造方法において、
前記金属箔は銅箔であり、
前記無電解めっき層は無電解銅めっき層であり、
前記電解めっき工程は、前記無電解銅めっき層上に電解銅めっき層を形成し、前記電解銅めっき層上に電解ニッケルめっき層を形成するものである、樹脂封止型電子部品の製造方法。 In the manufacturing method of the resin-sealed electronic component according to claim 10,
The metal foil is a copper foil,
The electroless plating layer is an electroless copper plating layer,
The method of manufacturing a resin-encapsulated electronic component, wherein the electrolytic plating step forms an electrolytic copper plating layer on the electroless copper plating layer and forms an electrolytic nickel plating layer on the electrolytic copper plating layer.
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