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JP4545074B2 - Semiconductor manufacturing method - Google Patents

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JP4545074B2
JP4545074B2 JP2005277178A JP2005277178A JP4545074B2 JP 4545074 B2 JP4545074 B2 JP 4545074B2 JP 2005277178 A JP2005277178 A JP 2005277178A JP 2005277178 A JP2005277178 A JP 2005277178A JP 4545074 B2 JP4545074 B2 JP 4545074B2
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俊一 佐藤
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本発明は、半導体レーザまたは発光ダイオード等の光デバイスに用いられる半導体の製造方法および半導体素子に関する。   The present invention relates to a semiconductor manufacturing method and a semiconductor element used for an optical device such as a semiconductor laser or a light emitting diode.

近年、V族元素としてNを含んだN系混晶半導体材料が新規半導体材料として着目されている。例えば、特許文献1には、Si基板上にIII−V族混晶半導体を形成するのに、格子整合系材料であるN系混晶半導体をエピタキシャル成長させる例が示されている。この技術によれば、III−V族混晶半導体として、格子整合系材料であるN系混晶半導体を用いることにより、Si基板上にIII−V族混晶半導体素子をミスフィット転位を発生させることなくエピタキシャル成長することが可能となり、Si電子素子とのモノリシック化の可能性が提案されている。   In recent years, N-based mixed crystal semiconductor materials containing N as a group V element have attracted attention as new semiconductor materials. For example, Patent Document 1 shows an example of epitaxially growing an N-based mixed crystal semiconductor, which is a lattice-matched material, in order to form a group III-V mixed crystal semiconductor on a Si substrate. According to this technology, a misfit dislocation is generated in a group III-V mixed crystal semiconductor element on a Si substrate by using an N-type mixed crystal semiconductor which is a lattice-matched material as the group III-V mixed crystal semiconductor. It is possible to perform epitaxial growth without any problem, and the possibility of monolithic formation with Si electronic devices has been proposed.

また、特許文献2には、基板がGaAs,InP,GaPである場合に、これらと格子整合可能なInGaNAs,AlGaNAs,GaNAs等のN系混晶半導体が示されている。すなわち、従来、GaAs基板に格子整合するIII−V族半導体の中で、GaAsよりバンドギャップエネルギーが小さい材料は存在しなかったが、例えばInGaNAsはGaAs基板に格子整合可能であり、しかも、GaAsよりバンドギャップエネルギーが小さいので、従来GaAs基板上には形成できなかったGaAsの発光波長よりも長波長(1.5μm帯など)の発光波長をもつ発光素子が形成可能であることがわかってきた。   Patent Document 2 discloses N-type mixed crystal semiconductors such as InGaNAs, AlGaNAs, and GANAS that can be lattice-matched with GaAs, InP, and GaP when the substrate is made of GaAs, InP, or GaP. In other words, in the group III-V semiconductors lattice-matched to the GaAs substrate, there was no material having a band gap energy smaller than that of GaAs. However, for example, InGaNAs can be lattice-matched to the GaAs substrate, and Since the band gap energy is small, it has been found that a light emitting element having an emission wavelength longer than the emission wavelength of GaAs that could not be formed on a conventional GaAs substrate (such as a 1.5 μm band) can be formed.

このようなN系V族混晶半導体では、As等のV族原子は、低温でも基板表面から脱離しやすいので低温成長が望ましいが、Nの原料としてよく用いられるNH3等は高温でないと分解しないため、例えばNとAsを同時に含むようなN系V族混晶半導体の原料としては好ましくない。このため、上述した従来の技術では、N原料としてNH3をそのまま用いるかわりに窒素ガスまたはNH3等の窒素化合物ガスから高周波プラズマにより活性な窒素元素を生成して用いて、高真空であるMBE法や0.1Torr程度の減圧MOCVD法によりN系V族混晶半導体を形成している。また、Nの原料に有機系窒素化合物であるDMHy((CH3)2NNH2(ジメチルヒドラジン)を用いて、60Torrの一般的な減圧MOCVD法によりGaNAs混結晶を得た報告(著者「N.ohkouchi」等による非特許文献1)もある。 In such an N-based group V mixed crystal semiconductor, group V atoms such as As are easily desorbed from the substrate surface even at low temperatures, so low temperature growth is desirable. However, NH 3 or the like often used as a raw material for N is decomposed only at high temperatures. Therefore, it is not preferable as a raw material for an N-based V group mixed crystal semiconductor containing N and As at the same time. For this reason, in the above-described conventional technique, instead of using NH 3 as an N raw material as it is, MBE which is high vacuum is generated by using active nitrogen element by high frequency plasma from nitrogen gas or nitrogen compound gas such as NH 3. An N-based group V mixed crystal semiconductor is formed by a low-pressure MOCVD method of about 0.1 Torr. In addition, a report of obtaining a GaNAs mixed crystal by a general low pressure MOCVD method of 60 Torr using DMHy ((CH 3 ) 2 NNH 2 (dimethylhydrazine) which is an organic nitrogen compound as a raw material of N (author “N. There is also a non-patent document 1) by “Ohkouchi” and the like.

しかしながら、Nは成長中に基板表面から離脱しやすいため、大きいN組成のN系V族混晶半導体を得にくい。このため従来では、添加しにくいNの濃度を高くすることに主眼をおいた成長方法により必要なN組成の膜を形成している。活性化した窒素ガスをN原料に用いた例では、活性窒素を不活性化させないために成長圧力を低くする必要がある。具体的に、N系V族混晶半導体が例えばGaNAsの場合、他のV族元素であるAsの分圧を極めて低い条件で、Asを成長しなければならず、このため、As(V族)の空孔濃度が上昇してしまい、高品質なN系V族混晶半導体を得ることができなかった。例えば、著者「M.Sato」による非特許文献2では、1%のN組成を得るために、反応室内:25Pa,N2流量:50sccm,AsH3流量:10sccmの条件にしている。すなわち、高周波プラズマ中でN2を活性化すると、反応室内は約300Paになるが、これを調整して25Paとして成長している。しかしながら、この条件では、AsH3分圧はおよそ0.9Paという低い分圧となってしまう。さらに、この他に、III族原料であるTEG(トリエチルガリウム)やキャリアガスとしてのH2も供給する必要があるので、実際のAsH3分圧は更に低い条件になっている。また,N組成を更に大きくするためには更に減圧にし、N原料を増やし、AsH3流量を減らす必要があり、AsH3分圧はさらに低くなってしまう。このため、従来の方法ではAs(V族)の空孔濃度が上昇し、N濃度を高くするとメタルリッチ(III族リッチ)になってしまい、高品質なN系V族混晶半導体を得ることができなかった。 However, since N easily separates from the substrate surface during growth, it is difficult to obtain an N-based V group mixed crystal semiconductor having a large N composition. For this reason, conventionally, a film having an N composition required by a growth method focusing on increasing the concentration of N which is difficult to add is formed. In an example in which activated nitrogen gas is used as the N raw material, the growth pressure needs to be lowered in order not to deactivate the active nitrogen. Specifically, when the N-based group V mixed crystal semiconductor is, for example, GaNAs, the As must be grown under a very low partial pressure of As, which is another group V element. ) Increased, and a high-quality N-based V group mixed crystal semiconductor could not be obtained. For example, in Non-Patent Document 2 by the author “M. Sato”, in order to obtain 1% N composition, the conditions are as follows: reaction chamber: 25 Pa, N 2 flow rate: 50 sccm, AsH 3 flow rate: 10 sccm. That is, when N 2 is activated in the high-frequency plasma, the reaction chamber becomes about 300 Pa, but this is adjusted to grow to 25 Pa. However, under this condition, the AsH 3 partial pressure becomes a low partial pressure of about 0.9 Pa. In addition to this, since it is necessary to supply TEG (triethylgallium), which is a Group III raw material, and H 2 as a carrier gas, the actual AsH 3 partial pressure is lower. Further, in order to further increase the N composition, it is necessary to further reduce the pressure, increase the N raw material, and decrease the AsH 3 flow rate, and the AsH 3 partial pressure is further reduced. For this reason, in the conventional method, the As (V group) vacancy concentration is increased, and when the N concentration is increased, it becomes metal rich (group III rich), and a high quality N-based V group mixed crystal semiconductor is obtained. I could not.

また、Nの原料に有機系窒素化合物であるDMHy((CH3)2NNH2(ジメチルヒドラジン)を用いた60Torrの一般的な減圧MOCVD法による報告でも、Nの組成はおよそ0.5%以下と低い値しか得られていない。すなわち、この方法においても、DMHy流量を多くし、AsH3流量の小さい条件でGaNAs層を形成しており、AsH3分圧が低い条件で成長を行なっているために、N組成を大きくしようとするとAs抜けによりメタルリッチになってしまい、N原料流量を増やしても大きいN組成の混晶が得られないという問題があった。
特開平06−334168号公報 特開平06−037355号公報 “MOVPE Growth of GaAs1-xNxAlloys”,12th Symposium on Alloy Semiconductor Physics and Electronics p337〜340 “Plasma-assisted MOCVD grouth of GaAsallows”,13th Symposium on Alloy Semiconductor Physics and Electronics P101〜102
Further, even in a report by a general low pressure MOCVD method of 60 Torr using DMHy ((CH 3 ) 2 NNH 2 (dimethylhydrazine) which is an organic nitrogen compound as a raw material of N, the composition of N is about 0.5% or less. That is, even in this method, the DMHy flow rate is increased, the GaNAs layer is formed under the condition of a small AsH 3 flow rate, and the growth is performed under the condition of a low AsH 3 partial pressure. For this reason, when trying to increase the N composition, it becomes metal rich due to loss of As, and there is a problem that a mixed crystal having a large N composition cannot be obtained even if the N raw material flow rate is increased.
Japanese Patent Laid-Open No. 06-334168 Japanese Patent Laid-Open No. 06-037355 “MOVPE Growth of GaAs1-xNxAlloys”, 12th Symposium on Alloy Semiconductor Physics and Electronics p337 ~ 340 “Plasma-assisted MOCVD grouth of GaAsallows”, 13th Symposium on Alloy Semiconductor Physics and Electronics P101 ~ 102

本発明は、V族の空孔濃度を高くすることなく、大きなN組成のIII−V族混晶半導体を高品質に形成することの可能な半導体の製造方法および半導体素子を提供することを目的としている。   SUMMARY OF THE INVENTION An object of the present invention is to provide a semiconductor manufacturing method and a semiconductor device capable of forming a high N-group III-V mixed crystal semiconductor having a high N composition without increasing the group V vacancy concentration. It is said.

上記目的を達成するために、請求項1記載の発明は、所定の半導体基板上にNとAsを同時に含んだ複数のV族元素からなる少なくとも一層のIII−V族混晶半導体層を減圧条件および550℃以上の温度の下で形成する半導体の製造方法において、Nの原料として有機系窒素化合物を前記III−V族混晶半導体層のV族元素中に占めるN組成が0.5%以上となるように供給し、そしてAsの原料としてAsH3を用い、反応炉中のAsの原料の分圧を2Pa以上とすることを特徴としている。 In order to achieve the above object, according to the first aspect of the present invention, at least one group III-V mixed crystal semiconductor layer comprising a plurality of group V elements simultaneously containing N and As is formed on a predetermined semiconductor substrate under reduced pressure conditions. In the method for producing a semiconductor formed at a temperature of 550 ° C. or higher , the N composition of the organic nitrogen compound as a raw material of N in the group V element of the group III-V mixed crystal semiconductor layer is 0.5% or more. And using AsH3 as the As raw material, the partial pressure of the As raw material in the reactor is 2 Pa or more.

以上に説明したように、請求項1記載の発明によれば、V族の空孔濃度を高くすることなく高品質で大きなN組成のIII−V族混晶エピタキシャルウエハを作製でき、さらにこれら高品質なN系V族混晶半導体を用いれば高性能な新規構造の発光デバイス,受光デバイスを作製できる。このため例えば、従来長波長帯で一般的な材料系であるInGaAsP系素子に比べて温度特性は良好でしかも高出力の発光素子が形成できる。このためAPC(オートパワーコントロール)回路や電子冷却器を用いない低コストの通信用レーザや、測距用アイセーフレーザ、空間伝送用アイセーフレーザなどへの応用が可能となる。また、Si基板上に形成すれば、Si電子素子とSi基板格子整合系化合物半導体素子とのモノリシック化などが可能となる。 As described above, according to the invention of claim 1 Symbol placement, can produce a large N III-V group mixed crystal epitaxial wafer having the composition of high quality without increasing the vacancy concentration V group, further these By using a high-quality N-system V group mixed crystal semiconductor, a high-performance light-emitting device and light-receiving device having a new structure can be manufactured. Therefore, for example, it is possible to form a light-emitting element having excellent temperature characteristics and a high output as compared with an InGaAsP-based element that is a general material system in a long wavelength band. This makes it possible to apply to low-cost communication lasers that do not use an APC (auto power control) circuit or an electronic cooler, eye-safe lasers for distance measurement, eye-safe lasers for spatial transmission, and the like. Further, if it is formed on a Si substrate, it becomes possible to make the Si electronic element and the Si substrate lattice matching compound semiconductor element monolithic.

以下、本発明を実施するための最良の形態を説明する。図1は本発明に係る半導体を製造するためのMOCVD装置の構成例を示す図である。なお、図1のMOCVD装置は、一般的な構成の横型炉の装置であり、図1には、反応室部分が示されている。もちろん、MOCVD装置は縦型炉であっても良い。   Hereinafter, the best mode for carrying out the present invention will be described. FIG. 1 is a diagram showing a configuration example of an MOCVD apparatus for manufacturing a semiconductor according to the present invention. The MOCVD apparatus in FIG. 1 is a horizontal furnace apparatus having a general configuration, and FIG. 1 shows a reaction chamber portion. Of course, the MOCVD apparatus may be a vertical furnace.

図1を参照すると、この装置は、内部が反応炉として機能する水冷式の石英反応管12と、石英反応管12内に原料ガス,キャリアガスを供給するガス供給口11と、本発明の半導体が成長される基板25を保持するカーボンサセプター14と、カーボンサセプター14(基板25)を加熱する高周波加熱用コイル13と、カーボンサセプター14(基板25)の温度を測定するための熱電対15と、石英反応管12内(反応炉内)を排気するための排気装置16とを有している。   Referring to FIG. 1, this apparatus includes a water-cooled quartz reaction tube 12 whose inside functions as a reaction furnace, a gas supply port 11 for supplying a source gas and a carrier gas into the quartz reaction tube 12, and a semiconductor of the present invention. A carbon susceptor 14 that holds the substrate 25 on which the substrate is grown, a high-frequency heating coil 13 that heats the carbon susceptor 14 (substrate 25), a thermocouple 15 that measures the temperature of the carbon susceptor 14 (substrate 25), And an exhaust device 16 for exhausting the inside of the quartz reaction tube 12 (inside the reaction furnace).

本発明の半導体は、このようなMOCVD装置を用いて、MOCVD法(有機金属気相成長法)によって製造できる。   The semiconductor of the present invention can be manufactured by MOCVD (metal organic chemical vapor deposition) using such an MOCVD apparatus.

すなわち、本発明の第1の実施形態では、所定の半導体基板上にNとAsを同時に含んだ複数のV族元素からなる少なくとも一層のIII−V族混晶半導体層を形成する場合、III−V族混晶半導体層を、Nの原料として有機系窒素化合物を用い、Asの原料にAsH3を用い、反応炉中のAsH3分圧を2Pa以上とし、成長中の基板温度を550℃以上として、有機金属気相成長法(MOCVD)により結晶成長させる。 That is, in the first embodiment of the present invention, when forming at least one group III-V mixed crystal semiconductor layer composed of a plurality of group V elements simultaneously containing N and As on a predetermined semiconductor substrate, The group V mixed crystal semiconductor layer is made of an organic nitrogen compound as an N raw material, AsH 3 is used as an As raw material, the AsH 3 partial pressure in the reactor is 2 Pa or higher, and the substrate temperature during growth is 550 ° C. or higher. As described above, crystals are grown by metal organic chemical vapor deposition (MOCVD).

また、本発明の第2の実施形態では、所定の半導体基板上にNとAsを同時に含んだ複数のV族元素からなる少なくとも一層のIII−V族混晶半導体層を形成する場合、III−V族混晶半導体層を、Nの原料として有機系窒素化合物を用い、Asの原料にAsH3を用い、反応炉中のAsH3分圧を10Pa以上とし、成長中の基板温度を600℃以上として、有機金属気相成長法(MOCVD)により結晶成長させる。 In the second embodiment of the present invention, when forming at least one group III-V mixed crystal semiconductor layer made of a plurality of group V elements containing N and As simultaneously on a predetermined semiconductor substrate, The group V mixed crystal semiconductor layer is made of an organic nitrogen compound as an N raw material, AsH 3 is used as an As raw material, the AsH 3 partial pressure in the reactor is 10 Pa or higher, and the substrate temperature during growth is 600 ° C. or higher. As described above, crystals are grown by metal organic chemical vapor deposition (MOCVD).

上記第1,第2の実施形態において、MOCVD法による窒素系III−V族半導体の窒素の原料としてはNH3が良く用いられている。しかしNH3は分解効率が低い。高温ではNも他のV族元素(As等)も表面から離脱しやすいため、InGaNAs層のような窒素系V族混晶半導体成長は低温で行なうことが望ましく、この観点からNH3は向かない。Nの原料としては低温で分解しやすい有機系窒素化合物原料が望ましい。このため、本発明では、DMHy((CH3)2NNH2:ジメチルヒドラジン)、または、TBA((CH3)3CNH2:ターシャリブチルアミン)等の有機系窒素化合物原料を用いる。ここで、DMHyやTBAは蒸気圧が高く、バブリングするためのキャリアガス(H2)の流量を少なくできる。このためシリンダーの温度変動による供給量の変動が少なくなり、高品質のN系V族混晶半導体を均一性良く得ることができるという利点があるので望ましい。 In the first and second embodiments, NH 3 is often used as a nitrogen source for nitrogen-based III-V semiconductors by MOCVD. However, NH 3 has low decomposition efficiency. Since N and other group V elements (As, etc.) are easily separated from the surface at a high temperature, it is desirable to perform nitrogen-based group V mixed crystal semiconductor growth such as an InGaNAs layer at a low temperature. From this point of view, NH 3 is not suitable. . As a raw material of N, an organic nitrogen compound raw material that is easily decomposed at a low temperature is desirable. Therefore, in the present invention, an organic nitrogen compound raw material such as DMHy ((CH 3 ) 2 NNH 2 : dimethylhydrazine) or TBA ((CH 3 ) 3 CNH 2 : tertiarybutylamine) is used. Here, DMHy and TBA have a high vapor pressure, and the flow rate of the carrier gas (H 2 ) for bubbling can be reduced. For this reason, the supply amount variation due to the temperature variation of the cylinder is reduced, and it is desirable because there is an advantage that a high quality N-based V group mixed crystal semiconductor can be obtained with good uniformity.

また、本発明では、例えば、半導体基板をGaAs基板とし、GaAs基板上に、III−V族混晶半導体層として、InGaNAs層を高品質に形成することができる。すなわち、GaAsにInを添加すると格子定数は大きくなり、バンドギャップエネルギーは小さくなる効果がある。これに対して、Nを添加すると格子定数は小さくなり、バンドギャップエネルギーは同様に小さくなる効果がある。つまり、InxGa1-xAsにNを添加すると、バンドギャップエネルギーはInxGa1-xAsより小さくなり、更に格子定数がGaAsと一致する条件が存在する。このように、InGaNAs層は、GaAs基板に格子整合可能であるので、GaAsのバンドギャップエネルギーに対応する約870nm(室温)の発光波長より長波長の発光素子を、GaAsよりも格子定数が大きいInGaAsを発光層に用いた従来の場合に比べて、容易に高品質に形成できる。しかも、1.3μm帯,1.5μm帯などの、従来に比べて、より長波長の素子の形成も可能となる。 In the present invention, for example, an InGaNAs layer can be formed with a high quality as a III-V group mixed crystal semiconductor layer on a GaAs substrate as a semiconductor substrate. That is, when In is added to GaAs, the lattice constant increases and the band gap energy decreases. On the other hand, when N is added, the lattice constant is reduced, and the band gap energy is similarly reduced. That is, when N is added to In x Ga 1-x As, the band gap energy becomes smaller than In x Ga 1-x As, and there is a condition that the lattice constant coincides with GaAs. As described above, since the InGaNAs layer can be lattice-matched to the GaAs substrate, a light-emitting element having a longer wavelength than the light emission wavelength of about 870 nm (room temperature) corresponding to the band gap energy of GaAs is used as an InGaAs having a larger lattice constant than GaAs. Compared to the conventional case where the is used for the light emitting layer, it can be easily formed with high quality. In addition, it is possible to form longer-wavelength elements, such as 1.3 μm band and 1.5 μm band, as compared with the conventional case.

また、本発明では、所定の半導体基板上にNを含んだ複数のV族元素からなる少なくとも一層のIII−V族混晶半導体層を形成する場合、導電型及びキャリア濃度を制御するための不純物として、n型にはSeを用い、p型にはZn,Mg等のII族元素を用いる。   Further, in the present invention, when forming at least one group III-V mixed crystal semiconductor layer made of a plurality of group V elements including N on a predetermined semiconductor substrate, an impurity for controlling the conductivity type and the carrier concentration. As described above, Se is used for the n-type, and Group II elements such as Zn and Mg are used for the p-type.

また、上記のような製造方法により形成されるIII−V族混晶半導体を、少なくとも発光層に用いることにより、上述したように、高品質,高性能の半導体レーザまたは発光ダイオードが得られる。   Moreover, as described above, a high-quality, high-performance semiconductor laser or light-emitting diode can be obtained by using a group III-V mixed crystal semiconductor formed by the above manufacturing method in at least the light-emitting layer.

以下、本発明の実施例について説明する。   Examples of the present invention will be described below.

実施例1では、図1のMOCVD装置を用いて、前述したようなInGaNAsをGaAs基板上に成長させた。すなわち、III族原料としてTMG(トリメチルガリウム)またはTEG(トリエチルガリウム),TMI(トリメチルインジウム)またはTEI(トリエチルインジウム)を用い、また、Asの原料としてAsH3(アルシン)を用い、また、Nの原料として有機系窒素化合物であるDMHy(ジメチルヒドラジン)またはMMHy(モノメチルヒドラジン)またはTBA(ターシャリブチルアミン)等を用い、これらの原料ガスを、キャリアガスであるH2と同時にガス供給口11から水冷式の石英反応管12の中に供給した。なお、この際、排気装置16により反応室内を1.3×104Paに排気した。また、高周波加熱用コイル13によりカーボンサセプター14を加熱することにより被成長基板15であるGaAs基板を加熱した。これにより、原料ガスを熱分解し、熱分解した原料ガスの所定の元素を、GaAs基板上に基板表面反応により結晶成長させた。なお、この実施例1では、TMG:4.0×10-6mol/min〜4.0×10-5mol/min,TMI:4.4×10-7mol/min〜4.4×10-6mol/min,AsH3:6.0×10-3mol/min(0.4sccm)〜2.2×10-3mol/min(46.4sccm),DMHy:5.0×10-4mol/min〜3.0×10-2mol/minとし、キャリアガスであるH2を加えて、原料ガスとキャリアガスとを合わせて、合計6(l/min)供給している。また、AsH3分圧を0.9〜102Paとし、成長温度を450〜700℃とした。 In Example 1, the above-described InGaNAs were grown on a GaAs substrate using the MOCVD apparatus shown in FIG. That is, TMG (trimethyl gallium) or TEG (triethyl gallium), TMI (trimethyl indium) or TEI (triethyl indium) is used as the group III material, AsH 3 (arsine) is used as the As material, and N DMHy (dimethylhydrazine) or MMHy (monomethylhydrazine) or TBA (tertiarybutylamine), which is an organic nitrogen compound, is used as a raw material, and these raw material gases are water-cooled from the gas supply port 11 simultaneously with the carrier gas H 2. Into the quartz reaction tube 12 of the formula. At this time, the reaction chamber was evacuated to 1.3 × 10 4 Pa by the exhaust device 16. Further, the carbon susceptor 14 was heated by the high frequency heating coil 13 to heat the GaAs substrate as the growth substrate 15. Thus, the source gas was pyrolyzed, and a predetermined element of the pyrolyzed source gas was grown on the GaAs substrate by a substrate surface reaction. In Example 1, TMG: 4.0 × 10 −6 mol / min to 4.0 × 10 −5 mol / min, TMI: 4.4 × 10 −7 mol / min to 4.4 × 10 −6 mol / min, AsH 3 : 6.0 × 10 −3 mol / min (0.4 sccm) to 2.2 × 10 −3 mol / min (46.4 sccm), DMHy: 5.0 × 10 −4 Mol / min to 3.0 × 10 −2 mol / min, H 2 as a carrier gas is added, and the raw material gas and the carrier gas are combined to supply a total of 6 (l / min). Further, the AsH 3 partial pressure was set to 0.9 to 102 Pa, and the growth temperature was set to 450 to 700 ° C.

実際、TMG:2.0×10-5mol/min,TMI:2.2×10-6mol/min,AsH3:3.3×10-4mol/min(7sccm),DMHy:6.4×10-3mol/minの時、AsH3分圧は15.4Paであった。この場合、AsH3分圧は従来よりも高いが、更にDMHy供給量をAsH3供給量よりも約1桁多くしている。成長温度は630℃とした。成長速度は1.7μm/hであった。図2には、このような条件で作製したInGaNAs層のSIMS分析結果が示されている。N濃度は約6.5×1020atoms/cm3と求められた。これはN組成約3%に対応する。この値を基にしてCu−Kα線を用いたX線回折法により求めたInGaNAs層の格子定数から、In組成は約6%と求められた。この結果から、In0.06Ga0.940.03As0.97層が形成されていることがわかった。このInGaNAs層は、GaAs基板よりも格子定数が小さかった。また、Arレーザ(488nm)を励起光源,Ge−フォトダイオードを受光器として室温でPL(フォトルミネッセンス)測定を行なった結果、中心波長は約1.2μmであった。 Actually, TMG: 2.0 × 10 −5 mol / min, TMI: 2.2 × 10 −6 mol / min, AsH 3 : 3.3 × 10 −4 mol / min (7 sccm), DMHy: 6.4 At × 10 -3 mol / min, the AsH 3 partial pressure was 15.4 Pa. In this case, the AsH 3 partial pressure is higher than the conventional one, but the DMHy supply amount is further increased by about one digit than the AsH 3 supply amount. The growth temperature was 630 ° C. The growth rate was 1.7 μm / h. FIG. 2 shows the SIMS analysis result of the InGaNAs layer manufactured under such conditions. The N concentration was determined to be about 6.5 × 10 20 atoms / cm 3 . This corresponds to an N composition of about 3%. From the lattice constant of the InGaNAs layer obtained by the X-ray diffraction method using Cu—Kα ray based on this value, the In composition was determined to be about 6%. From this result, it was found that an In 0.06 Ga 0.94 N 0.03 As 0.97 layer was formed. This InGaNAs layer had a smaller lattice constant than the GaAs substrate. Further, PL (photoluminescence) measurement was performed at room temperature using an Ar laser (488 nm) as an excitation light source and a Ge-photodiode as a light receiver. As a result, the center wavelength was about 1.2 μm.

また、図3には、AsH3分圧が4.8Pa以上の範囲で条件を変えて(N組成を変えて)、InGaNAs層(In組成:6%)を作成したときの、InGaNAs層の室温PL特性が示されている。図3から、N組成が増えるに従い、中心波長が長波長側にシフトすることがわかる。GaAs基板に格子整合するN組成2.1%の膜厚では、中心波長は約1.15μmであった。 Also, FIG. 3 shows the room temperature of the InGaNAs layer when the InGaNAs layer (In composition: 6%) is prepared by changing the conditions in the range where the AsH 3 partial pressure is 4.8 Pa or more (by changing the N composition). PL characteristics are shown. FIG. 3 shows that the center wavelength shifts to the longer wavelength side as the N composition increases. The center wavelength was about 1.15 μm at a film thickness of 2.1% N composition lattice matched to the GaAs substrate.

また、本願の発明者による実験では、ガス供給量が同一の条件では、成長温度が低くなるほどN組成は大きくなった。また、N原料供給量と成長温度が同一の場合は、AsH3分圧が少ないほどN組成は大きくなった。また、一定AsH3分圧下で同じN組成を得るためには、高温成長ほどNの原料であるDMHyの供給量を増やす必要がある。 Further, in the experiment by the inventors of the present application, under the same gas supply rate, the N composition increased as the growth temperature decreased. When the N raw material supply amount and the growth temperature were the same, the N composition increased as the AsH 3 partial pressure decreased. In order to obtain the same N composition under a constant AsH 3 partial pressure, it is necessary to increase the supply amount of DMHy, which is a raw material of N, as the temperature grows higher.

また、600℃以上という比較的高温成長でもAsH3分圧を高くするほどメタルリッチ(III族リッチ)にならないN組成(y)の大きなInGaNyAsl-y層が得られることがわかった。図4に成膜可能な混晶(In0.13Ga0.87yAs1-y)のN組成の条件依存性を示す。例えば600℃成長でAsH3分圧が2Paの時、N組成は最大で1%程度であったが、10Paでは4.6%のInGaNAs層が得られた。また、2Pa以下という低いAsH3分圧でも例えば450〜550℃程度の低温成長を行なうことでAs抜けが抑えられ、しかもNの脱離も抑えられるため、N組成を大きくすることは可能であった。しかし、このような低い成長温度では、PL強度は非常に弱かった。成長温度は、550℃以上とすることが効果的であった。従って、成長時の基板温度は550℃以上であることが望ましい。更にPL強度は600℃以上ではほぼ一定となった。また、同一成長温度,同一組成で、AsH3分圧を変えた実験で得られた膜のPL特性によると、AsH3分圧が高い方がPL強度は高く高品質になる傾向があった。In0.06Ga0.940.02As0.98層の成長温度、AsH3分圧に対するPL強度の関係を図5に示す。低温成長はN組成を大きくするには効果があるが、PL強度が低くなることから、あまり低温にはしない方がよいことがわかった。 It was also found that an InGaN y As ly layer having a large N composition (y) that does not become metal rich (group III rich) can be obtained as the AsH 3 partial pressure is increased even at a relatively high temperature growth of 600 ° C. or higher. FIG. 4 shows the condition dependency of the N composition of the mixed crystal (In 0.13 Ga 0.87 N y As 1-y ) that can be formed. For example, when grown at 600 ° C. and the AsH 3 partial pressure is 2 Pa, the N composition was about 1% at maximum, but at 10 Pa, a 4.6% InGaNAs layer was obtained. Further, even when the AsH 3 partial pressure is as low as 2 Pa or less, it is possible to increase the N composition because the As escape is suppressed and the N desorption is also suppressed by performing low temperature growth at about 450 to 550 ° C., for example. It was. However, at such a low growth temperature, the PL intensity was very weak. It was effective to set the growth temperature to 550 ° C. or higher. Therefore, the substrate temperature during growth is desirably 550 ° C. or higher. Furthermore, the PL intensity became almost constant at 600 ° C. or higher. Further, the same growth temperature, the same composition, according to the PL properties of the film obtained in experiments with different AsH 3 partial pressure, the higher AsH 3 partial pressure PL intensity tended to be higher quality. FIG. 5 shows the relationship between the PL temperature and the growth temperature of the In 0.06 Ga 0.94 N 0.02 As 0.98 layer and the AsH 3 partial pressure. Although low temperature growth is effective for increasing the N composition, it has been found that it is better not to make the temperature too low because the PL intensity decreases.

これらのように、本願の発明者による実験結果によると、AsH3分圧が2Paよりも低いと、良好なPL特性を示すN組成2%以上のInGaNyAs1-y層が得られなかった。AsH3分圧が低いと、As抜けが促進されメタルリッチになり易く、550℃以下の低温でないと形成できないことが考えられる。つまり、N原料流量を多くし、AsH3流量を減らして低温成長すると、高いN組成のInGaNyAs1-y層が得られる傾向があるが、AsH3分圧を減らしすぎると良好な結晶は得られないことがわかった。AsH3分圧を2Pa以上,成長温度を550℃以上とすることで、PL強度が強く結晶性の良好なN組成2%以上の混晶が得られた。N組成2%では、In組成6%程度のInGaAsをGaAs基板に格子整合でき、このN組成2%は、波長980nm程度の固体レーザ励起用半導体レーザを形成するには十分なN組成である。また、AsH3分圧が10Pa以上であると、600℃以上という比較的高温成長でもN組成が4%以上の混晶が形成可能であり、PL強度の大きい高品質のInGaNyAs1-y層が得られることがわかった。N組成4.6%では、In組成13%程度のInGaAsをGaAs基板に格子整合でき、主に通信用に使われる1.3μmよりも長波長の半導体レーザの形成が可能となった。 As described above, according to the results of experiments by the inventors of the present application, when the AsH 3 partial pressure is lower than 2 Pa, an InGaN y As 1-y layer having an N composition of 2% or more showing good PL characteristics cannot be obtained. . If the AsH 3 partial pressure is low, As escape is promoted and the metal is likely to be rich, and it can be considered that it cannot be formed unless the temperature is 550 ° C. or lower. In other words, when the N raw material flow rate is increased and the AsH 3 flow rate is reduced to grow at a low temperature, an InGaN y As 1-y layer having a high N composition tends to be obtained. However, if the AsH 3 partial pressure is reduced too much, a good crystal is obtained. I found out I couldn't get it. By setting the AsH 3 partial pressure to 2 Pa or higher and the growth temperature to 550 ° C. or higher, a mixed crystal having an N composition of 2% or higher with high PL strength and good crystallinity was obtained. With an N composition of 2%, InGaAs with an In composition of about 6% can be lattice-matched to the GaAs substrate. This N composition of 2% is an N composition sufficient to form a solid-state laser excitation semiconductor laser with a wavelength of about 980 nm. Further, when the AsH 3 partial pressure is 10 Pa or higher, a mixed crystal having an N composition of 4% or higher can be formed even at a relatively high temperature growth of 600 ° C. or higher, and high-quality InGaN y As 1-y having a high PL strength. It was found that a layer was obtained. When the N composition is 4.6%, InGaAs having an In composition of about 13% can be lattice-matched to the GaAs substrate, and a semiconductor laser having a wavelength longer than 1.3 μm used mainly for communication can be formed.

また、Cu−Kα線(波長:Kα1=0.15405nm,Kα2=0.15444nm)を用いたX線回折法(θ−2θ測定)によって、N組成4.6%が得られたIn0.08Ga0.92NAs層を分析した結果を図6に示す。ここで、InGaNAs層の膜厚は0.5μmであった。図6から、In0.08Ga0.92NAs層は、GaAsよりも格子定数が小さくなっていることがわかる。また、ノマルスキー観察によると、表面には格子緩和によるクロスハッチパターンは見られず、GaAs基板上のGaAs層と同様に鏡面であった。 In 0.08 Ga 0.92 in which an N composition of 4.6% was obtained by an X-ray diffraction method (θ-2θ measurement) using Cu—Kα rays (wavelengths: Kα1 = 0.15405 nm, Kα2 = 0.15444 nm). The result of analyzing the NAs layer is shown in FIG. Here, the thickness of the InGaNAs layer was 0.5 μm. FIG. 6 shows that the In 0.08 Ga 0.92 NAs layer has a smaller lattice constant than GaAs. Further, according to Nomarski observation, no cross-hatch pattern due to lattice relaxation was observed on the surface, and it was a mirror surface like the GaAs layer on the GaAs substrate.

このようにNの原料として低温で分解しやすい有機系窒素化合物原料を用い、また、高いAsH3分圧(少なくとも2Pa以上)で成長を行なうことで、従来の有機系窒素化合物原料を用いた有機金属気相成長法による限界であったV族元素中に占めるNの割合(組成)が0.5%以上のN系V族混晶半導体を容易に形成できた。また、成長温度を高くして(少なくとも550℃以上にして)成長しているので、PL発光効率の高い高品質のN系V族混晶半導体を形成できた。さらに、AsH3分圧を10Pa以上、かつ、成長温度を600℃以上とすると、N組成4%以上のInGaNAsを高品質に形成できた。 As described above, an organic nitrogen compound material that is easily decomposed at a low temperature is used as a raw material for N, and an organic material using a conventional organic nitrogen compound material is grown by performing growth at a high AsH 3 partial pressure (at least 2 Pa or more). An N-based V group mixed crystal semiconductor in which the ratio (composition) of N in the group V element, which was the limit by the metal vapor deposition method, was 0.5% or more could be easily formed. In addition, since the growth was carried out at a high growth temperature (at least 550 ° C. or higher), a high-quality N-based group V mixed crystal semiconductor with high PL emission efficiency could be formed. Furthermore, when the AsH 3 partial pressure was 10 Pa or more and the growth temperature was 600 ° C. or more, InGaNAs having an N composition of 4% or more could be formed with high quality.

なお、InGaNAs層はGaAs基板に完全に格子整合していなくとも良く、歪を持っていても臨界膜厚以内の厚さであれば良い。また、この実施例においてはN系V族混晶半導体としてInGaNAsの場合について説明したが、製造方法に関してはGaNAs,AlNAs,InAlNAs,AlGaNAs,InAlGaNAs,InGaNAsP等の他の混晶についても適用できる。   Note that the InGaNAs layer may not be perfectly lattice-matched to the GaAs substrate, and may have a thickness within the critical thickness even if it has a strain. In this embodiment, the case of InGaNAs as the N-based group V mixed crystal semiconductor has been described. However, the manufacturing method can be applied to other mixed crystals such as GaNAs, AlNAs, InAlNAs, AlGaNAs, InAlGaNAs, and InGaNAsP.

実施例2では、InGaNAs層を発光層とした発光素子を作製した。図7は実施例2の発光素子の断面図である。図7を参照すると、この発光素子は、n型GaAs基板41上に、n型Al0.4Ga0.6Asクラッド層42,InGaNAs活性層43,p型Al0.4Ga0.6Asクラッド層44,p型GaAsコンタクト層45をMOCVD法により順次形成し、p型GaAsコンタクト層45上にはp側電極46を形成し、また、n型GaAs基板41の裏面にはn側電極47を形成している。なお、このデバイス構造は、ブロードストライプ型である。 In Example 2, a light emitting element having an InGaNAs layer as a light emitting layer was manufactured. 7 is a cross-sectional view of the light emitting device of Example 2. FIG. Referring to FIG. 7, the light emitting device includes an n-type Al 0.4 Ga 0.6 As clad layer 42, an InGaNAs active layer 43, a p-type Al 0.4 Ga 0.6 As clad layer 44, and a p-type GaAs contact on an n-type GaAs substrate 41. The layers 45 are sequentially formed by MOCVD, a p-side electrode 46 is formed on the p-type GaAs contact layer 45, and an n-side electrode 47 is formed on the back surface of the n-type GaAs substrate 41. This device structure is a broad stripe type.

ここで、InGaNAs活性層の成長条件は実施例1に示した条件を用い、GaAsに格子整合する組成に制御している。なお、InGaNAs層はGaAs基板に完全に格子整合していなくとも良く、歪を持っていても臨界膜厚以内の厚さであれば良い。また、AsH3分圧は25Paであり、従来に比べて高くした。これにより、従来に比べてV族空孔濃度の少ない発光効率の高いInGaNAs活性層が得られた。 Here, the growth conditions of the InGaNAs active layer are controlled to the composition lattice-matched with GaAs using the conditions shown in the first embodiment. Note that the InGaNAs layer may not be perfectly lattice-matched to the GaAs substrate, and may have a thickness within the critical thickness even if it has a strain. The AsH 3 partial pressure was 25 Pa, which was higher than the conventional one. As a result, an InGaNAs active layer having a high luminous efficiency with a lower group V vacancy concentration than the conventional one was obtained.

また、InGaNAs層はGaAsよりもバンドギャップエネルギーは小さく、活性層へのキャリアの閉じ込めは良好である。これにより、長波長帯で一般的な材料系であるInGaAsP系素子に比べて温度特性が良好でしかも高出力の発光素子が形成できた。なお、この実施例ではクラッド層として、Al0.4Ga0.6Asを用いたが、他の組成のAlGaAsでも良い。また、この実施例では、層構造が簡単なDH(ダブルヘテロ)構造であるとして説明したが、量子井戸構造の素子など他の構造にも応用できる。また、デバイス構造をブロードストライプ型以外のさまざまな構造にすることもできる。また、活性層はInGaNAsであるとして説明したが、AlやPを含んだ混晶であっても、NとAsとを同時に含んだ混晶であれば、任意の材料を用いることができる。 Further, the InGaNAs layer has a smaller band gap energy than GaAs, and the confinement of carriers in the active layer is good. As a result, a light-emitting element having excellent temperature characteristics and high output as compared with an InGaAsP element which is a general material system in a long wavelength band can be formed. In this embodiment, Al 0.4 Ga 0.6 As is used as the cladding layer, but AlGaAs of other compositions may be used. In this embodiment, the layer structure is described as a simple DH (double hetero) structure, but the present invention can be applied to other structures such as a quantum well structure. In addition, the device structure can be various structures other than the broad stripe type. Although the active layer has been described as being InGaNAs, any material can be used as long as it is a mixed crystal containing Al and P as long as it is a mixed crystal containing N and As simultaneously.

また、この実施例によれば、長波長帯で一般的な材料系であるInGaAsP系素子に比べて温度特性が良好で、しかも高出力の発光素子が形成できる。このためAPC(オートパワーコントロール)回路や電子冷却器を用いない低コストの通信用レーザ,測距用アイセーフレーザ,空間伝送用アイセーフレーザなどへの応用が可能である。   In addition, according to this embodiment, a light-emitting element having excellent temperature characteristics and a high output can be formed as compared with an InGaAsP-based element that is a general material system in a long wavelength band. Therefore, the present invention can be applied to low-cost communication lasers that do not use an APC (auto power control) circuit or an electronic cooler, an eye-safe laser for distance measurement, an eye-safe laser for spatial transmission, and the like.

実施例2では、InGaNAs層を発光層としたダブルヘテロ構造の発光素子の例を示したが、InGaNAs層を発光層としたホモ接合あるいはシングルヘテロ接合の発光素子を構成することも可能である。図8は実施例3の発光素子の断面図である。図8を参照すると、この発光素子は、ホモ接合の発光素子であり、n型GaAs基板71上に、n型InGaNAs層72,p型InGaNAs層73,p型GaAsコンタクト層74をMOCVD法により順次形成し、p型GaAsコンタクト層74上にはp側電極75を形成し、n型GaAs基板71の裏面にはn側電極76を形成している。   In Example 2, an example of a light emitting element having a double hetero structure in which an InGaNAs layer is used as a light emitting layer is shown. However, a homojunction or single heterojunction light emitting element in which an InGaNAs layer is used as a light emitting layer can also be configured. FIG. 8 is a cross-sectional view of the light emitting device of Example 3. Referring to FIG. 8, this light-emitting element is a homojunction light-emitting element, and an n-type InGaNAs layer 72, a p-type InGaNAs layer 73, and a p-type GaAs contact layer 74 are sequentially formed on an n-type GaAs substrate 71 by MOCVD. The p-side electrode 75 is formed on the p-type GaAs contact layer 74, and the n-side electrode 76 is formed on the back surface of the n-type GaAs substrate 71.

ここで、InGaNAs層の成長条件は基本的に実施例1に示した条件を用い、GaAsに格子整合する組成に制御している。また、AsH3分圧は50Paであり従来に比べて高くした。これにより、従来に比べてV族空孔濃度の少ない発光効率の高いInGaNAs活性層が得られた。 Here, the growth conditions of the InGaNAs layer are basically the conditions shown in Example 1 and controlled to a composition that lattice matches with GaAs. Further, the AsH 3 partial pressure was 50 Pa, which was higher than before. As a result, an InGaNAs active layer having a high luminous efficiency with a lower group V vacancy concentration than the conventional one was obtained.

また、導電型とキャリア濃度の制御にはn型にはSe,p型にはZnを用いることが可能であった。すなわち、図8において、n型InGaNAs層72のn型不純物には、Se等を用い、p型InGaNAs層73のp型不純物には、Zn等を用いることができた。ここで、Seの原料としてはH2Se(セレン化水素)を用いることができ、Znの原料としてはDMZn(ジメチルジンク)またはDEZn(ジエチルジンク)を用いることができた。この場合、ドーピング効率は高かった。 In addition, it was possible to use Se for n-type and Zn for p-type for controlling the conductivity type and carrier concentration. That is, in FIG. 8, Se or the like can be used for the n-type impurity of the n-type InGaNAs layer 72, and Zn or the like can be used for the p-type impurity of the p-type InGaNAs layer 73. Here, H 2 Se (hydrogen selenide) could be used as the Se raw material, and DMZn (dimethyl zinc) or DEZn (diethyl zinc) could be used as the Zn raw material. In this case, the doping efficiency was high.

すなわち、実施例1,実施例2に示したダブルヘテロ構造の発光素子では、これが、ダブルヘテロ構造のレーザである場合、InGaNAs活性層は、通常、アンドープのものとなっており、不純物の制御は必要でないが(但し、ダブルヘテロ構造でも、LED(発光ダイオード)の場合は、活性層に不純物をドープする場合が多く、この場合には、不純物制御が必要)、実施例3に示すホモ接合構造の発光素子(LED)では、必ず、n型,p型不純物の制御(導電型とキャリア濃度の制御)が必要となり、この実施例3では、n型不純物として、Se等を用い、また、p型不純物としてZn等を用いることができた。   That is, in the double heterostructure light emitting device shown in Example 1 and Example 2, when this is a double heterostructure laser, the InGaNAs active layer is usually undoped, and the impurity control is Although not required (however, even in a double hetero structure, in the case of an LED (light emitting diode), the active layer is often doped with impurities, in which case impurity control is required), but the homojunction structure shown in Example 3 In this light emitting element (LED), it is necessary to control n-type and p-type impurities (control of conductivity type and carrier concentration). In this Example 3, Se or the like is used as the n-type impurity, and p Zn or the like could be used as the type impurity.

また、InGaNAs層はGaAsよりもバンドギャップエネルギーは小さく、InGaNAs層で発光した光はGaAsコンタクト層にとって透明である。このため、実施例2,実施例3の発光素子は、面発光型の発光素子において特に有利である。もちろん、不純物としてはSe,Znの他にSn,C,Si,Mg等を用いることもできる。しかしながら、IV族元素であるSi,C等は両性不純物でありIII族サイトおよびV族サイトに入り補償してしまう場合があるが、Se,ZnはそれぞれVI族,II族元素であり両性不純物ではなく、上記のような事態は生じないので、不純物としては、Se,Znを用いる方が望ましい。また、Zn等の不純物の拡散によりpn接合を形成しても良い。また、活性層はInGaNAsであるとしたが、AlやPを含んだ混晶であっても同時にNとAsを含んだ混晶であれば良い。
The InGaNAs layer has a smaller band gap energy than GaAs, and the light emitted from the InGaNAs layer is transparent to the GaAs contact layer. For this reason, the light-emitting elements of Example 2 and Example 3 are particularly advantageous in a surface-emitting light-emitting element. Of course, Sn, C, Si, Mg, etc. can be used as impurities in addition to Se and Zn. However, group IV elements such as Si and C are amphoteric impurities and may enter and compensate for group III and group V sites. However, Se and Zn are group VI and group II elements, respectively. In addition, since the above situation does not occur, it is preferable to use Se and Zn as impurities. Further, a pn junction may be formed by diffusion of impurities such as Zn. Moreover, although the active layer is InGaNAs, even if it is a mixed crystal containing Al or P, it may be a mixed crystal containing N and As at the same time.

本発明に係る半導体を製造するためのMOCVD装置の構成例を示す図である。It is a figure which shows the structural example of the MOCVD apparatus for manufacturing the semiconductor which concerns on this invention. InGaNAs層のSIMS分析結果を示す図である。It is a figure which shows the SIMS analysis result of an InGaNAs layer. InGaNAs層の室温PL特性を示す図である。It is a figure which shows the room temperature PL characteristic of an InGaNAs layer. 成膜可能な混晶(In0.13Ga0.87yAs1-y)のN組成の条件依存性を示す図である。Is a diagram showing a condition dependence of N composition of the film formation can be mixed (In 0.13 Ga 0.87 N y As 1-y). In0.06Ga0.940.02As0.98層の成長温度,AsH3分圧に対するPL強度の関係を示す図である。In 0.06 Ga 0.94 N 0.02 As 0.98 layers growth temperature is a diagram showing the relationship of PL intensity for AsH 3 partial pressure. Cu−Kα線(波長:Kα1=0.15405nm,Kα2=0.15444nm)を用いたX線回折法(θ−2θ測定)により、N組成4.6%が得られたIn0.08Ga0.92NAs層を分析した結果を示す図である。In 0.08 Ga 0.92 NAs layer in which 4.6% of N composition was obtained by X-ray diffraction method (θ-2θ measurement) using Cu—Kα rays (wavelength: Kα1 = 0.15405 nm, Kα2 = 0.15444 nm) It is a figure which shows the result of having analyzed. 実施例2の発光素子の断面図である。6 is a cross-sectional view of a light-emitting element according to Example 2. FIG. 実施例3の発光素子の断面図である。6 is a cross-sectional view of a light-emitting element according to Example 3. FIG.

符号の説明Explanation of symbols

11 ガス供給口
12 石英反応管
13 高周波加熱用コイル
14 カーボンサセプター
15 熱電対
16 排気装置
41 n型GaAs基板
42 n型Al0.4Ga0.6Asクラッド層
43 InGaNAs活性層
44 p型Al0.4Ga0.6Asクラッド層
45 p型GaAsコンタクト層
46 p側電極
47 n側電極
71 n型GaAs基板
72 n型InGaNAs層
73 p型InGaNAs層
74 p型GaAsコンタクト層
75 p側電極
76 n側電極
DESCRIPTION OF SYMBOLS 11 Gas supply port 12 Quartz reaction tube 13 High frequency heating coil 14 Carbon susceptor 15 Thermocouple 16 Exhaust device 41 n-type GaAs substrate 42 n-type Al 0.4 Ga 0.6 As cladding layer 43 InGaNAs active layer 44 p-type Al 0.4 Ga 0.6 As cladding Layer 45 p-type GaAs contact layer 46 p-side electrode 47 n-side electrode 71 n-type GaAs substrate 72 n-type InGaNAs layer 73 p-type InGaNAs layer 74 p-type GaAs contact layer 75 p-side electrode 76 n-side electrode

Claims (1)

所定の半導体基板上にNとAsを同時に含んだ複数のV族元素からなる少なくとも一層のIII−V族混晶半導体層を減圧条件および550℃以上の温度の下で形成する半導体の製造方法において、Nの原料として有機系窒素化合物を前記III−V族混晶半導体層のV族元素中に占めるN組成が0.5%以上となるように供給し、そしてAsの原料としてAsH3を用い、反応炉中のAsの原料の分圧を2Pa以上とすることを特徴とする半導体の製造方法。 In a semiconductor manufacturing method, at least one group III-V mixed crystal semiconductor layer composed of a plurality of group V elements simultaneously containing N and As is formed on a predetermined semiconductor substrate under reduced pressure conditions and a temperature of 550 ° C. or higher . , Supplying an organic nitrogen compound as a raw material of N so that an N composition in the group V element of the III-V mixed crystal semiconductor layer is 0.5% or more, and using AsH3 as a raw material of As, A method for producing a semiconductor, characterized in that a partial pressure of an As raw material in a reaction furnace is 2 Pa or more.
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Publication number Priority date Publication date Assignee Title
JPH07154023A (en) * 1993-11-29 1995-06-16 Fujitsu Ltd Semiconductor laser
JPH07240373A (en) * 1994-02-28 1995-09-12 Sumitomo Chem Co Ltd Vapor growing method of iii-v group compound semiconductor

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