JP2999858B2 - Manufacturing method of capacitive element - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a capacitor, particularly a capacitor mounted on an active matrix array of an active matrix type liquid crystal display device.

[0002]

2. Description of the Related Art In recent years, an active matrix type liquid crystal display device in which display electrodes are arranged in an active matrix array in which a large number of capacitive elements and thin film transistors are formed and a liquid crystal material is filled between a display electrode substrate and a counter electrode substrate has been commercialized. However, even now, improvements in display quality and manufacturing yield are being actively studied.

One factor that lowers display quality and manufacturing yield lies in the TFT itself.
In addition, realization of a manufacturing method is desired.

As a TFT for an active matrix type liquid crystal display device, a TFT called an inverted staggered type in which a gate electrode, a gate insulating film, a semiconductor film, a source and a drain electrode are sequentially laminated on an insulating substrate is generally used. Further, a storage capacitor is formed in each thin film transistor for stabilizing display performance. In this case, a short circuit between the electrodes due to a film formation defect of the gate insulating film is a serious defect that impairs reliability.

As a countermeasure against the short-circuit failure, there has been proposed a method of preventing a short-circuit with an upper electrode by etching and removing a lower electrode in a defective region of a gate insulating film (Japanese Patent Application Laid-Open No. Sho.
3-133675, JP-A-1-207779).

[0006]

FIG. 4 is a plan view of a TFT unit in a conventional active matrix type liquid crystal display device, and FIG. 5 is a TF along the line AA 'in FIG.
It is sectional drawing for every T manufacturing process. The conventional method and its problems will be described below with reference to FIG.

First Step [FIG. 5A] A gate electrode 2 serving as a lower electrode and an auxiliary capacitance electrode 3 are formed on an insulating substrate 1 with the same conductive material.

Second step [FIG. 5 (b)] The gate insulating film 4 and the semiconductor film 5 are deposited by P-CVD or the like, and the semiconductor film 5 is converted into islands. In such a case, insulating film defects 11 and 12 that cause a short circuit failure between the gate insulating film 4 and the semiconductor film 5 with the upper electrode due to foreign matter or the like are inevitably generated.

Third step [FIG. 5 (c)] The conductive material forming the gate electrode 2 and the auxiliary capacitance electrode 3 is etched with an etchant or an etching gas for selectively etching, and the lower electrode in the insulating film defect region is etched. Remove.

Fourth step [FIG. 5 (d)] The display electrode 6 as the upper electrode, the source electrode 7 and the drain electrode 8 are formed, and the TFT is completed. In the TFT manufactured by this method, since the lower electrode in the insulating film defect area is removed by etching, a short-circuit failure between the lower electrode and the upper electrode does not occur.

According to this method, after depositing the gate insulating film, the lower electrode (gate electrode, auxiliary capacitance electrode e) is not affected by the gate insulating film.
Short circuit failure can be eliminated by a relatively easy method of etching the lower electrode using the gate insulating film as a mask with an etchant or an etching gas that selectively attacks tc). Therefore, when a gate insulating film defect occurs in a wide area, there is a problem that lower electrodes such as the gate bus line 20 and the auxiliary capacitance line 30 are disconnected. This defect is fatal as a TFT for an active matrix type liquid crystal display device,
Improvement is strongly desired.

[0012]

According to the present invention, there is provided a capacitive element forming method, comprising: forming a lower electrode on an insulating substrate; forming an upper electrode on the electrode via an insulating film; The electrode is composed of at least two types of conductive materials having etching selectivity, and after the insulating film is deposited, a first etching process of selectively etching the first conductive material, which is the lower conductive material of the lower electrode, is performed. After selectively removing the first conductive material in the region, a second etching process for selectively etching the first conductive material, which is the upper conductive material of the lower electrode, is performed to selectively remove the second conductive material in the insulating film defect region. After the removal, the upper electrode is formed.

Further, the thickness of the upper electrode is made smaller than the thickness of the second conductive material forming the lower electrode.

Further, the insulating film has a laminated structure of at least upper and lower two layers. After the lower insulating film is deposited, the lower electrode in the lower insulating film defect region is removed by etching, and then the upper insulating film is deposited, and the insulating film is deposited on the etched region. This is for depositing a film.

Further, the first conductive material constituting the lower electrode is a transparent conductive material, and the second conductive material is Cr or C
This is a multilayer film containing r as one component.

[0016]

According to the present invention, the conductive material forming the lower electrode in the region where the insulating film defect is generated is not removed by etching at a time. After the insulating film is deposited, a first etching process for selectively etching the lower conductive material of the lower electrode is performed, and then a second etching process for selectively etching the upper conductive material of the lower electrode is performed. Thus, the conductive material exposed in the insulating film defect region is removed by etching in two stages.

Therefore, only one of the conductive materials in the insulating film defect region is removed by etching, and the lower electrode is not disconnected.

Further, since the cross-sectional shape of the insulating film defect region has an overhang shape in which the conductive material immediately below the insulating film is side-etched, even if the conductive material forming the lower electrode exists in that region. The upper electrode is disconnected, and short circuit failure between the lower electrode and the upper electrode does not occur.

As described above, according to the present invention, a short circuit with the upper electrode can be prevented without disconnecting the lower electrode.

[0020]

【Example】

<Embodiment 1> FIG. 1 is a plan view of a pixel unit of a TFT array of an active matrix display device obtained by the manufacturing method of the present invention, and a cross-sectional view along a line AA ′ in FIG. It is shown in FIG. This will be described below with reference to FIG.

First Step [FIG. 2 (a)] A gate bus line 20, a storage capacitor bus line 30, and a storage capacitor electrode 3, which are lower electrodes, are formed on the insulating substrate 1 using a first conductive material. .

Second Step [FIG. 2B] A gate bus line 20, an auxiliary capacitance bus line 30 (auxiliary capacitance electrode 3) and a gate electrode 2 are formed of a second conductive material.

Third step [FIG. 2C] The gate insulating film 4 and the semiconductor film 5 are deposited by P-CVD or the like, and the semiconductor film 5 is turned into islands. In this case, foreign matter or the like inevitably causes insulating film defects 13, 14, 15, 16 that cause a short circuit between the upper electrode and the lower electrode in the gate insulating film 4.

Fourth Step [FIG. 2 (d)] The first conductive material of the insulating film defect 14 is removed by etching with an etchant which selectively permeates the first conductive material. In the insulating film defects 13 and 16, the second conductive material serves as a mask, and the first conductive material is not removed by etching.

Subsequently, etching is performed with an etchant that selectively permeates the second conductive material to form the insulating film defects 13 and 1.
The second and fifth conductive materials 5 and 16 are removed by etching. At the insulating film defects 13 and 16 of the gate bus line 20 and the auxiliary capacitance bus line 30, only the second conductive material is removed by etching, and no disconnection of the bus line occurs.

Fifth Step [FIG. 2 (e)] A display electrode 6, a source electrode 7, and a drain electrode 8, which are upper electrodes, are formed. In the region of the insulating film defects 13 and 16, there is a lower electrode pattern formed of the first conductive material, but in that region, a so-called overhang in which the upper layer of the second conductive material is side-etched with respect to the insulating film. Due to the occurrence, the upper electrode breaks down,
Even if the upper electrode is formed, it is not electrically connected to the lower electrode. Since the lower electrode does not exist in the region of the insulating film defects 14 and 15, short-circuit failure with the upper electrode does not occur.

Regarding the regions of the insulating film defects 13 and 16,
If the thickness of the upper electrode is larger than the thickness of the second conductive material to be removed by etching, a short circuit failure between the upper electrode and the lower electrode rarely occurs. Therefore, if the thickness of the upper electrode is smaller than the thickness of the second conductive material to be removed by etching, the upper electrode is surely disconnected in this region, and short circuit failure can be prevented.

Further, it is necessary to increase the aperture ratio of a TFT for an active matrix type liquid crystal display device even slightly. In order to increase the aperture ratio of the TFT, the auxiliary capacitance electrode needs to be of a light transmission type.

Therefore, as the first conductive material forming the auxiliary capacitance electrode, a transparent conductive material such as ITO and SnO ₂ is advantageous. As a result of examining the transparent conductive material and a material having etching selectivity, Cr was most excellent. ITO
HCl-HNO ₃ etchant or F
Cr exhibits good etching corrosion resistance with respect to an eCl ₃ -HCl-based etchant, and IT exhibits resistance with respect to (NH ₃ ) Ce (NO ₃ ) ₆ -HClO ₄ which etches Cr.
O shows good etching corrosion resistance. Further, both etchants do not attack the insulating material such as SiO ₂ and SiOx.

Naturally, an etchant containing HF cannot be used because it etches the insulating film. Therefore, a transparent conductive film material is excellent as the first conductive material, and Cr is excellent as the second conductive material.

Further, in order to increase the size of the active matrix type liquid crystal display device, it is necessary to lower the bus line resistance of the TFT. However, the use of only the transparent conductive film material and Cr as the wiring material limits the reduction of the resistance. There is.

Therefore, it is effective to laminate a low resistance material such as Cu, Mo, and Al on Cr. This Cu, M
Low resistance materials such as o and Al are HC that etch ITO
Although it is attacked by the l-HNO ₃ -based etchant or the FeCl ₃ -HCl-based etchant, the fourth step (FIG. 2D) is performed because Cr serves as an etching stopper for the etchant.
That is, in the step of etching with an etchant that attacks the first conductive material (transparent conductive film), the second conductive material Cr
Serves as a mask during etching, the first conductive material under the second conductive material is not removed by etching, and the first and second conductive materials are not simultaneously attacked and disconnected. Therefore, as the second conductive material, not only a Cr single layer film but also a C
It may have a multilayer structure in which another conductive material is laminated on r.

In this embodiment, the TFT in which an auxiliary capacitance is formed by crossing the auxiliary capacitance electrode 3 and the display electrode 6 which are independently provided has been described. However, the front gate bus line and the display electrode 6 are crossed. The present invention is also applicable to a TFT that forms an auxiliary capacitance by using the same.

In this embodiment, the lower electrode is formed of two types of conductive films. However, the lower electrode may have a film configuration of more than that, and the lower electrode pattern to be removed by etching may have an island shape.

FIG. 3 shows the first gate insulating film 4 as a gate insulating film.
This is an embodiment in the case of forming a two-layer structure of the first and second gate insulating films 42. The etching process of the present invention is performed after the first gate insulating film 41 is deposited, and the second gate insulating film 42 is deposited after the second conductive material in the defect generation region of the first gate insulating film 41 is removed by etching; In this case, since the defect generation region of the first gate insulating film 41 is repaired by the second gate insulating film 42 for the defect of the insulating film, the occurrence of short-circuit failure is extremely reduced.

Naturally, the present invention is not limited to the TFT having the structure shown in the figure, but can be applied to an element structure in which a lower electrode and an upper electrode overlap with an insulating film interposed therebetween. It is also effective for an active matrix array.

[0037]

According to the present invention, in a device structure in which a lower electrode and an upper electrode overlap with each other via an insulating film, a short circuit between the lower electrode and the upper electrode can be prevented without disconnecting the lower electrode. It greatly contributes to improving the production yield of TFT arrays for active matrix type liquid crystal display devices.

[Brief description of the drawings]

FIG. 1 is a plan view of an active matrix substrate provided with a capacitive element of the present invention.

FIG. 2 is a cross-sectional view of a manufacturing process of a substrate provided with the capacitive element of the present invention.

FIG. 3 is a cross-sectional view of a substrate having a capacitor having a two-layer insulating film of the present invention.

FIG. 4 is a plan view of an active matrix substrate provided with a conventional capacitive element.

FIG. 5 is a cross-sectional view of a manufacturing process of a substrate provided with a conventional capacitive element.

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 insulating substrate 2 gate electrode 3 auxiliary capacitance electrode 4 gate insulating film 5 semiconductor film 6 display electrode 7 source electrode 8 drain electrode 11 insulating film defect 12 insulating film defect 13 insulating film defect 14 insulating film defect 15 insulating film defect 16 insulating film Defect 17 Defect of insulating film 18 Defect of insulating film 20 Gate bus line 30 Auxiliary capacitance bus line 41 First gate insulating film 42 Second gate insulating film

Continuation of the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) G02F 1/136 G02F 1/1343 H01L 27/12

Claims (4)

(57) [Claims] 1. A capacitor comprising a lower electrode formed on an insulating substrate and an upper electrode formed on the electrode via an insulating film, wherein the lower electrode has at least two types of conductive materials having etching selectivity. After the insulating film is deposited, the first etching process is performed to selectively etch the first conductive material that is the lower conductive material of the lower electrode after the insulating film is deposited, and the first conductive material in the insulating film defect region is selectively removed. A second etching process for selectively etching the second conductive material that is the upper conductive material of the lower electrode, and forming the upper electrode after selectively removing the second conductive material in the insulating film defect region. Of manufacturing a capacitive element. 2. The method according to claim 1, wherein the thickness of the upper electrode is smaller than the thickness of the second conductive material forming the lower electrode. 3. An insulating film having a laminated structure of at least upper and lower two layers, after depositing a lower insulating film, removing a lower electrode in a lower insulating film defect region by etching, and depositing an upper insulating film.
2. The method according to claim 1, wherein an insulating film is deposited on the etching region. 4. The method according to claim 1, wherein the first conductive material forming the lower electrode is a transparent conductive material, and the second conductive material is Cr or a multilayer film containing Cr as one component. A method for manufacturing a capacitor.